colour fix

[fpga-games] / galaxian / src / mc_top.v

diff --git a/galaxian/src/mc_top.v b/galaxian/src/mc_top.v
index 3e9526df7b41bbc49e53acfa41866c5aab35fd78..360a2f4cfdba194dd7923a58a715813693254026 100644 (file)
--- a/galaxian/src/mc_top.v
+++ b/galaxian/src/mc_top.v
@@ -88,30 +88,32 @@ output      psTXD,psCLK,psSEL;
 //output O_ROM_WEn;\r
 \r
 //    INPORT SW IF\r
-input  [4:0]I_PSW;\r
+input  [8:0]I_PSW;\r
 \r
 //    SOUND OUT \r
 output  O_SOUND_OUT_L;\r
 output  O_SOUND_OUT_R;\r
 \r
 //    VGA (VIDEO) IF\r
-output [4:0]O_VGA_R;\r
-output [4:0]O_VGA_G;\r
-output [4:0]O_VGA_B;\r
+output [3:0]O_VGA_R;\r
+output [3:0]O_VGA_G;\r
+output [3:0]O_VGA_B;\r
 output O_VGA_H_SYNCn;\r
 output O_VGA_V_SYNCn;\r
 \r
-wire   W_RESETn = |I_PSW[3:0];\r
+wire   W_RESETn = |(~I_PSW[8:5]);\r
 //------ CLOCK GEN ---------------------------\r
 wire   I_CLK_18432M;\r
 wire   W_CLK_12M,WB_CLK_12M;\r
 wire   W_CLK_6M,WB_CLK_6M;\r
 wire   W_STARS_CLK;\r
+wire   W_ROM_CLK;\r
 \r
-dcm clockgen(\r
+mc_dcm clockgen(\r
 .CLKIN_IN(I_CLK_125M),\r
 .RST_IN(! W_RESETn),\r
-.CLKFX_OUT(I_CLK_18432M)\r
+.CLKFX_OUT(I_CLK_18432M),\r
+.CLK0_OUT(W_ROM_CLK)\r
 );\r
 \r
 //------ H&V COUNTER -------------------------\r
@@ -367,18 +369,18 @@ wire   S2 = (D1|J1)  & ps_PSW[7];
 \r
 wire   C1 = (L1|R1|U1|~D1) & ps_PSW[4];\r
 `else\r
-wire   L1 = I_PSW[2];\r
-wire   R1 = I_PSW[3];\r
-wire   U1 = I_PSW[0];\r
-wire   D1 = I_PSW[1];\r
-wire   J1 = I_PSW[4];\r
+wire   L1 = ! I_PSW[2];\r
+wire   R1 = ! I_PSW[3];\r
+wire   U1 = ! I_PSW[0];\r
+wire   D1 = ! I_PSW[1];\r
+wire   J1 = ! I_PSW[4];\r
 \r
-wire   S1 = U1|J1;\r
-wire   S2 = D1|J1;\r
+wire   S1 = ! I_PSW[5];\r
+wire   S2 = ! I_PSW[7];\r
 \r
-wire   C1 = L1|R1|U1|~D1;\r
+wire   C1 = ! I_PSW[6];\r
 `endif\r
-wire   C2 = L1|R1|~U1|D1;\r
+wire   C2 = ! I_PSW[8];\r
 \r
 wire   L2 = L1;\r
 wire   R2 = R1;\r
@@ -425,8 +427,7 @@ wire   [7:0]ROM_D; // = I_ROM_DB;
 //assign O_ROM_WEn = 1'b1;\r
 \r
 galaxian_roms ROMS(\r
-.I_CLK_18432M(I_CLK_18432M),\r
-.I_CLK_12M(WB_CLK_12M),\r
+.I_ROM_CLK(W_ROM_CLK),\r
 .I_ADDR(ROM_A),\r
 .O_DATA(ROM_D)\r
 );\r
@@ -621,6 +622,10 @@ mc_vedio_mix MIX(
 \r
 );\r
 \r
+wire [2:0]W_VGA_R;\r
+wire [2:0]W_VGA_G;\r
+wire [1:0]W_VGA_B;\r
+\r
 `ifdef VGA_USE\r
 mc_vga_if  VGA(\r
 \r
@@ -633,9 +638,9 @@ mc_vga_if  VGA(
 .I_H_SYNC(W_H_SYNC),\r
 .I_V_SYNC(W_V_SYNC),\r
 // output\r
-.O_R(O_VGA_R),\r
-.O_G(O_VGA_G),\r
-.O_B(O_VGA_B),\r
+.O_R(W_VGA_R),\r
+.O_G(W_VGA_G),\r
+.O_B(W_VGA_B),\r
 .O_H_SYNCn(O_VGA_H_SYNCn),\r
 .O_V_SYNCn(O_VGA_V_SYNCn)\r
 \r
@@ -643,14 +648,11 @@ mc_vga_if  VGA(
 \r
 `else\r
 \r
-assign O_VGA_R[2:0] = W_R;\r
-assign O_VGA_R[4:3] = 1'b0;\r
+assign W_VGA_R[2:0] = W_R;\r
 \r
-assign O_VGA_G[2:0] = W_G;\r
-assign O_VGA_G[4:3] = 1'b0;\r
+assign W_VGA_G[2:0] = W_G;\r
 \r
-assign O_VGA_B[1:0] = W_B;\r
-assign O_VGA_B[4:2] = 1'b0;\r
+assign W_VGA_B[1:0] = W_B;\r
 \r
 //assign O_VGA_H_SYNCn = W_H_SYNC | W_V_SYNC ;  //  AKIDUKI LCD USED\r
 assign O_VGA_H_SYNCn = ~W_H_SYNC ;\r
@@ -658,6 +660,12 @@ assign O_VGA_V_SYNCn = ~W_V_SYNC ;
 \r
 `endif\r
 \r
+assign O_VGA_R[3:0] = {W_VGA_R[0], W_VGA_R[1], W_VGA_R[2], 1'b0};\r
+\r
+assign O_VGA_G[3:0] = {W_VGA_G[0], W_VGA_G[1], W_VGA_G[2], 1'b0};\r
+\r
+assign O_VGA_B[3:0] = {W_VGA_B[0], W_VGA_B[1], 2'b0};\r
+\r
 wire   [7:0]W_SDAT_A;\r
 \r
 mc_sound_a MC_SOUND_A(\r