update offsets to new european GB kernel, set software booting from USB

[ms2-kexec] / tlb-v7.S

diff --git a/tlb-v7.S b/tlb-v7.S
index 12e3bfee98fd6c1c83e128c9f989141ccfb333e4..f8f396242c24c25868e724aacdeed0e9e86377e0 100644 (file)
--- a/tlb-v7.S
+++ b/tlb-v7.S
@@ -3,7 +3,6 @@
  *
  *  Copyright (C) 1997-2002 Russell King
  *  Modified for ARMv7 by Catalin Marinas
- *  This Edition is maintained by Matthew Veety (aliasxerog) <mveety@gmail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -12,10 +11,12 @@
  *  ARM architecture version 6 TLB handling functions.
  *  These assume a split I/D TLB.
  */
+#include <linux/init.h>
 #include <linux/linkage.h>
+#include "assembler.h"
 #include <asm/asm-offsets.h>
 #include <asm/page.h>
-#include <asm/tlbflush.h>
+#include "tlbflush.h"
 #include "proc-macros.S"
 
 /*
@@ -40,16 +41,16 @@ ENTRY(v7wbi_flush_user_tlb_range)
        asid    r3, r3                          @ mask ASID
        orr     r0, r3, r0, lsl #PAGE_SHIFT     @ Create initial MVA
        mov     r1, r1, lsl #PAGE_SHIFT
-       vma_vm_flags r2, r2                     @ get vma->vm_flags
 1:
-       mcr     p15, 0, r0, c8, c6, 1           @ TLB invalidate D MVA (was 1)
-       tst     r2, #VM_EXEC                    @ Executable area ?
-       mcrne   p15, 0, r0, c8, c5, 1           @ TLB invalidate I MVA (was 1)
+       ALT_SMP(mcr     p15, 0, r0, c8, c3, 1)  @ TLB invalidate U MVA (shareable)
+       ALT_UP(mcr      p15, 0, r0, c8, c7, 1)  @ TLB invalidate U MVA
+
        add     r0, r0, #PAGE_SZ
        cmp     r0, r1
        blo     1b
        mov     ip, #0
-       mcr     p15, 0, ip, c7, c5, 6           @ flush BTAC/BTB
+       ALT_SMP(mcr     p15, 0, ip, c7, c1, 6)  @ flush BTAC/BTB Inner Shareable
+       ALT_UP(mcr      p15, 0, ip, c7, c5, 6)  @ flush BTAC/BTB
        dsb
        mov     pc, lr
 ENDPROC(v7wbi_flush_user_tlb_range)
@@ -69,23 +70,25 @@ ENTRY(v7wbi_flush_kern_tlb_range)
        mov     r0, r0, lsl #PAGE_SHIFT
        mov     r1, r1, lsl #PAGE_SHIFT
 1:
-       mcr     p15, 0, r0, c8, c6, 1           @ TLB invalidate D MVA
-       mcr     p15, 0, r0, c8, c5, 1           @ TLB invalidate I MVA
+       ALT_SMP(mcr     p15, 0, r0, c8, c3, 1)  @ TLB invalidate U MVA (shareable)
+       ALT_UP(mcr      p15, 0, r0, c8, c7, 1)  @ TLB invalidate U MVA
        add     r0, r0, #PAGE_SZ
        cmp     r0, r1
        blo     1b
        mov     r2, #0
-       mcr     p15, 0, r2, c7, c5, 6           @ flush BTAC/BTB
+       ALT_SMP(mcr     p15, 0, r2, c7, c1, 6)  @ flush BTAC/BTB Inner Shareable
+       ALT_UP(mcr      p15, 0, r2, c7, c5, 6)  @ flush BTAC/BTB
        dsb
        isb
        mov     pc, lr
 ENDPROC(v7wbi_flush_kern_tlb_range)
 
-       .section ".text.init", #alloc, #execinstr
+       __INIT
 
        .type   v7wbi_tlb_fns, #object
 ENTRY(v7wbi_tlb_fns)
        .long   v7wbi_flush_user_tlb_range
        .long   v7wbi_flush_kern_tlb_range
-       .long   v6wbi_tlb_flags
+       ALT_SMP(.long   v7wbi_tlb_flags_smp)
+       ALT_UP(.long    v7wbi_tlb_flags_up)
        .size   v7wbi_tlb_fns, . - v7wbi_tlb_fns