#define OMAP_CTRL_REGADDR(reg) (OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE) + (reg))
+static int (*my_pwrdm_clkdm_state_switch)(struct clockdomain *) = (int (*)(struct clockdomain *))0xc0041370;
+static int (*add_preferred_console)(char *, int, char*) = (int (*)(char*, int, char*))0xc0069208;
+
+
void omap_ctrl_writew(u16 val, u16 offset)
{
__raw_writew(val, OMAP_CTRL_REGADDR(offset));
clk_enable(uart->ick);
clk_enable(uart->fck);
+
+ if (uart->ick->clkdm != NULL)
+ my_pwrdm_clkdm_state_switch(uart->ick->clkdm);
+
+ if (uart->fck->clkdm != NULL)
+ my_pwrdm_clkdm_state_switch(uart->fck->clkdm);
+
uart->clocked = 1;
}