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Generic trace pt2: made iso14443b use standard trace format
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15c4dc5a 1//-----------------------------------------------------------------------------
bd20f8f4 2// Jonathan Westhues, split Nov 2006
3//
4// This code is licensed to you under the terms of the GNU GPL, version 2 or,
5// at your option, any later version. See the LICENSE.txt file for the text of
6// the license.
7//-----------------------------------------------------------------------------
15c4dc5a 8// Routines to support ISO 14443. This includes both the reader software and
9// the `fake tag' modes. At the moment only the Type B modulation is
10// supported.
15c4dc5a 11//-----------------------------------------------------------------------------
bd20f8f4 12
e30c654b 13#include "proxmark3.h"
15c4dc5a 14#include "apps.h"
f7e3ed82 15#include "util.h"
9ab7a6c7 16#include "string.h"
15c4dc5a 17
f7e3ed82 18#include "iso14443crc.h"
15c4dc5a 19
f7e3ed82 20//static void GetSamplesFor14443(int weTx, int n);
15c4dc5a 21
22#define DEMOD_TRACE_SIZE 4096
23#define READER_TAG_BUFFER_SIZE 2048
24#define TAG_READER_BUFFER_SIZE 2048
81cd0474 25#define DEMOD_DMA_BUFFER_SIZE 1024
15c4dc5a 26
27//=============================================================================
28// An ISO 14443 Type B tag. We listen for commands from the reader, using
29// a UART kind of thing that's implemented in software. When we get a
30// frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
31// If it's good, then we can do something appropriate with it, and send
32// a response.
33//=============================================================================
34
35//-----------------------------------------------------------------------------
36// Code up a string of octets at layer 2 (including CRC, we don't generate
37// that here) so that they can be transmitted to the reader. Doesn't transmit
38// them yet, just leaves them ready to send in ToSend[].
39//-----------------------------------------------------------------------------
f7e3ed82 40static void CodeIso14443bAsTag(const uint8_t *cmd, int len)
15c4dc5a 41{
42 int i;
43
44 ToSendReset();
45
46 // Transmit a burst of ones, as the initial thing that lets the
47 // reader get phase sync. This (TR1) must be > 80/fs, per spec,
48 // but tag that I've tried (a Paypass) exceeds that by a fair bit,
49 // so I will too.
50 for(i = 0; i < 20; i++) {
51 ToSendStuffBit(1);
52 ToSendStuffBit(1);
53 ToSendStuffBit(1);
54 ToSendStuffBit(1);
55 }
56
57 // Send SOF.
58 for(i = 0; i < 10; i++) {
59 ToSendStuffBit(0);
60 ToSendStuffBit(0);
61 ToSendStuffBit(0);
62 ToSendStuffBit(0);
63 }
64 for(i = 0; i < 2; i++) {
65 ToSendStuffBit(1);
66 ToSendStuffBit(1);
67 ToSendStuffBit(1);
68 ToSendStuffBit(1);
69 }
70
71 for(i = 0; i < len; i++) {
72 int j;
f7e3ed82 73 uint8_t b = cmd[i];
15c4dc5a 74
75 // Start bit
76 ToSendStuffBit(0);
77 ToSendStuffBit(0);
78 ToSendStuffBit(0);
79 ToSendStuffBit(0);
80
81 // Data bits
82 for(j = 0; j < 8; j++) {
83 if(b & 1) {
84 ToSendStuffBit(1);
85 ToSendStuffBit(1);
86 ToSendStuffBit(1);
87 ToSendStuffBit(1);
88 } else {
89 ToSendStuffBit(0);
90 ToSendStuffBit(0);
91 ToSendStuffBit(0);
92 ToSendStuffBit(0);
93 }
94 b >>= 1;
95 }
96
97 // Stop bit
98 ToSendStuffBit(1);
99 ToSendStuffBit(1);
100 ToSendStuffBit(1);
101 ToSendStuffBit(1);
102 }
103
104 // Send SOF.
105 for(i = 0; i < 10; i++) {
106 ToSendStuffBit(0);
107 ToSendStuffBit(0);
108 ToSendStuffBit(0);
109 ToSendStuffBit(0);
110 }
111 for(i = 0; i < 10; i++) {
112 ToSendStuffBit(1);
113 ToSendStuffBit(1);
114 ToSendStuffBit(1);
115 ToSendStuffBit(1);
116 }
117
118 // Convert from last byte pos to length
119 ToSendMax++;
120
121 // Add a few more for slop
122 ToSendMax += 2;
123}
124
125//-----------------------------------------------------------------------------
126// The software UART that receives commands from the reader, and its state
127// variables.
128//-----------------------------------------------------------------------------
129static struct {
130 enum {
131 STATE_UNSYNCD,
132 STATE_GOT_FALLING_EDGE_OF_SOF,
133 STATE_AWAITING_START_BIT,
134 STATE_RECEIVING_DATA,
135 STATE_ERROR_WAIT
136 } state;
f7e3ed82 137 uint16_t shiftReg;
15c4dc5a 138 int bitCnt;
139 int byteCnt;
140 int byteCntMax;
141 int posCnt;
f7e3ed82 142 uint8_t *output;
15c4dc5a 143} Uart;
144
145/* Receive & handle a bit coming from the reader.
146 *
147 * LED handling:
148 * LED A -> ON once we have received the SOF and are expecting the rest.
149 * LED A -> OFF once we have received EOF or are in error state or unsynced
150 *
151 * Returns: true if we received a EOF
152 * false if we are still waiting for some more
153 */
f7e3ed82 154static int Handle14443UartBit(int bit)
15c4dc5a 155{
156 switch(Uart.state) {
157 case STATE_UNSYNCD:
158 LED_A_OFF();
159 if(!bit) {
160 // we went low, so this could be the beginning
161 // of an SOF
162 Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF;
163 Uart.posCnt = 0;
164 Uart.bitCnt = 0;
165 }
166 break;
167
168 case STATE_GOT_FALLING_EDGE_OF_SOF:
169 Uart.posCnt++;
170 if(Uart.posCnt == 2) {
171 if(bit) {
172 if(Uart.bitCnt >= 10) {
173 // we've seen enough consecutive
174 // zeros that it's a valid SOF
175 Uart.posCnt = 0;
176 Uart.byteCnt = 0;
177 Uart.state = STATE_AWAITING_START_BIT;
178 LED_A_ON(); // Indicate we got a valid SOF
179 } else {
180 // didn't stay down long enough
181 // before going high, error
182 Uart.state = STATE_ERROR_WAIT;
183 }
184 } else {
185 // do nothing, keep waiting
186 }
187 Uart.bitCnt++;
188 }
189 if(Uart.posCnt >= 4) Uart.posCnt = 0;
190 if(Uart.bitCnt > 14) {
191 // Give up if we see too many zeros without
192 // a one, too.
193 Uart.state = STATE_ERROR_WAIT;
194 }
195 break;
196
197 case STATE_AWAITING_START_BIT:
198 Uart.posCnt++;
199 if(bit) {
200 if(Uart.posCnt > 25) {
201 // stayed high for too long between
202 // characters, error
203 Uart.state = STATE_ERROR_WAIT;
204 }
205 } else {
206 // falling edge, this starts the data byte
207 Uart.posCnt = 0;
208 Uart.bitCnt = 0;
209 Uart.shiftReg = 0;
210 Uart.state = STATE_RECEIVING_DATA;
211 LED_A_ON(); // Indicate we're receiving
212 }
213 break;
214
215 case STATE_RECEIVING_DATA:
216 Uart.posCnt++;
217 if(Uart.posCnt == 2) {
218 // time to sample a bit
219 Uart.shiftReg >>= 1;
220 if(bit) {
221 Uart.shiftReg |= 0x200;
222 }
223 Uart.bitCnt++;
224 }
225 if(Uart.posCnt >= 4) {
226 Uart.posCnt = 0;
227 }
228 if(Uart.bitCnt == 10) {
229 if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001))
230 {
231 // this is a data byte, with correct
232 // start and stop bits
233 Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff;
234 Uart.byteCnt++;
235
236 if(Uart.byteCnt >= Uart.byteCntMax) {
237 // Buffer overflowed, give up
238 Uart.posCnt = 0;
239 Uart.state = STATE_ERROR_WAIT;
240 } else {
241 // so get the next byte now
242 Uart.posCnt = 0;
243 Uart.state = STATE_AWAITING_START_BIT;
244 }
245 } else if(Uart.shiftReg == 0x000) {
246 // this is an EOF byte
247 LED_A_OFF(); // Finished receiving
248 return TRUE;
249 } else {
250 // this is an error
251 Uart.posCnt = 0;
252 Uart.state = STATE_ERROR_WAIT;
253 }
254 }
255 break;
256
257 case STATE_ERROR_WAIT:
258 // We're all screwed up, so wait a little while
259 // for whatever went wrong to finish, and then
260 // start over.
261 Uart.posCnt++;
262 if(Uart.posCnt > 10) {
263 Uart.state = STATE_UNSYNCD;
264 }
265 break;
266
267 default:
268 Uart.state = STATE_UNSYNCD;
269 break;
270 }
271
0318894e 272 // This row make the error blew circular buffer in hf 14b snoop
273 //if (Uart.state == STATE_ERROR_WAIT) LED_A_OFF(); // Error
15c4dc5a 274
275 return FALSE;
276}
277
278//-----------------------------------------------------------------------------
279// Receive a command (from the reader to us, where we are the simulated tag),
280// and store it in the given buffer, up to the given maximum length. Keeps
281// spinning, waiting for a well-framed command, until either we get one
282// (returns TRUE) or someone presses the pushbutton on the board (FALSE).
283//
284// Assume that we're called with the SSC (to the FPGA) and ADC path set
285// correctly.
286//-----------------------------------------------------------------------------
f7e3ed82 287static int GetIso14443CommandFromReader(uint8_t *received, int *len, int maxLen)
15c4dc5a 288{
f7e3ed82 289 uint8_t mask;
15c4dc5a 290 int i, bit;
291
292 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
293 // only, since we are receiving, not transmitting).
294 // Signal field is off with the appropriate LED
295 LED_D_OFF();
3fe4ff4f 296 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
15c4dc5a 297
298
299 // Now run a `software UART' on the stream of incoming samples.
300 Uart.output = received;
301 Uart.byteCntMax = maxLen;
302 Uart.state = STATE_UNSYNCD;
303
304 for(;;) {
305 WDT_HIT();
306
307 if(BUTTON_PRESS()) return FALSE;
308
309 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
310 AT91C_BASE_SSC->SSC_THR = 0x00;
311 }
312 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 313 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 314
315 mask = 0x80;
316 for(i = 0; i < 8; i++, mask >>= 1) {
317 bit = (b & mask);
318 if(Handle14443UartBit(bit)) {
319 *len = Uart.byteCnt;
320 return TRUE;
321 }
322 }
323 }
324 }
325}
326
327//-----------------------------------------------------------------------------
328// Main loop of simulated tag: receive commands from reader, decide what
329// response to send, and send it.
330//-----------------------------------------------------------------------------
331void SimulateIso14443Tag(void)
332{
f7e3ed82 333 static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
334 static const uint8_t response1[] = {
15c4dc5a 335 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
336 0x00, 0x21, 0x85, 0x5e, 0xd7
337 };
338
f7e3ed82 339 uint8_t *resp;
15c4dc5a 340 int respLen;
341
f7e3ed82 342 uint8_t *resp1 = (((uint8_t *)BigBuf) + 800);
15c4dc5a 343 int resp1Len;
344
f7e3ed82 345 uint8_t *receivedCmd = (uint8_t *)BigBuf;
15c4dc5a 346 int len;
347
348 int i;
349
350 int cmdsRecvd = 0;
351
7cc204bf 352 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
15c4dc5a 353 memset(receivedCmd, 0x44, 400);
354
355 CodeIso14443bAsTag(response1, sizeof(response1));
356 memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
357
358 // We need to listen to the high-frequency, peak-detected path.
359 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
360 FpgaSetupSsc();
361
362 cmdsRecvd = 0;
363
364 for(;;) {
f7e3ed82 365 uint8_t b1, b2;
15c4dc5a 366
367 if(!GetIso14443CommandFromReader(receivedCmd, &len, 100)) {
368 Dbprintf("button pressed, received %d commands", cmdsRecvd);
369 break;
370 }
371
372 // Good, look at the command now.
373
374 if(len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len)==0) {
375 resp = resp1; respLen = resp1Len;
376 } else {
377 Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
378 // And print whether the CRC fails, just for good measure
379 ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
380 if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
381 // Not so good, try again.
382 DbpString("+++CRC fail");
383 } else {
384 DbpString("CRC passes");
385 }
386 break;
387 }
388
389 memset(receivedCmd, 0x44, 32);
390
391 cmdsRecvd++;
392
393 if(cmdsRecvd > 0x30) {
394 DbpString("many commands later...");
395 break;
396 }
397
398 if(respLen <= 0) continue;
399
400 // Modulate BPSK
401 // Signal field is off with the appropriate LED
402 LED_D_OFF();
3fe4ff4f 403 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
15c4dc5a 404 AT91C_BASE_SSC->SSC_THR = 0xff;
405 FpgaSetupSsc();
406
407 // Transmit the response.
408 i = 0;
409 for(;;) {
410 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
f7e3ed82 411 uint8_t b = resp[i];
15c4dc5a 412
413 AT91C_BASE_SSC->SSC_THR = b;
414
415 i++;
416 if(i > respLen) {
417 break;
418 }
419 }
420 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 421 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 422 (void)b;
423 }
424 }
425 }
426}
427
428//=============================================================================
429// An ISO 14443 Type B reader. We take layer two commands, code them
430// appropriately, and then send them to the tag. We then listen for the
431// tag's response, which we leave in the buffer to be demodulated on the
432// PC side.
433//=============================================================================
434
435static struct {
436 enum {
437 DEMOD_UNSYNCD,
438 DEMOD_PHASE_REF_TRAINING,
439 DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
440 DEMOD_GOT_FALLING_EDGE_OF_SOF,
441 DEMOD_AWAITING_START_BIT,
442 DEMOD_RECEIVING_DATA,
443 DEMOD_ERROR_WAIT
444 } state;
445 int bitCount;
446 int posCount;
447 int thisBit;
448 int metric;
449 int metricN;
f7e3ed82 450 uint16_t shiftReg;
451 uint8_t *output;
15c4dc5a 452 int len;
453 int sumI;
454 int sumQ;
455} Demod;
456
457/*
458 * Handles reception of a bit from the tag
459 *
460 * LED handling:
461 * LED C -> ON once we have received the SOF and are expecting the rest.
462 * LED C -> OFF once we have received EOF or are unsynced
463 *
464 * Returns: true if we received a EOF
465 * false if we are still waiting for some more
466 *
467 */
0f7f9edc 468static RAMFUNC int Handle14443SamplesDemod(int ci, int cq)
15c4dc5a 469{
470 int v;
471
472 // The soft decision on the bit uses an estimate of just the
473 // quadrant of the reference angle, not the exact angle.
474#define MAKE_SOFT_DECISION() { \
475 if(Demod.sumI > 0) { \
476 v = ci; \
477 } else { \
478 v = -ci; \
479 } \
480 if(Demod.sumQ > 0) { \
481 v += cq; \
482 } else { \
483 v -= cq; \
484 } \
485 }
486
487 switch(Demod.state) {
488 case DEMOD_UNSYNCD:
489 v = ci;
490 if(v < 0) v = -v;
491 if(cq > 0) {
492 v += cq;
493 } else {
494 v -= cq;
495 }
496 if(v > 40) {
497 Demod.posCount = 0;
498 Demod.state = DEMOD_PHASE_REF_TRAINING;
499 Demod.sumI = 0;
500 Demod.sumQ = 0;
501 }
502 break;
503
504 case DEMOD_PHASE_REF_TRAINING:
505 if(Demod.posCount < 8) {
506 Demod.sumI += ci;
507 Demod.sumQ += cq;
508 } else if(Demod.posCount > 100) {
509 // error, waited too long
510 Demod.state = DEMOD_UNSYNCD;
511 } else {
512 MAKE_SOFT_DECISION();
513 if(v < 0) {
514 Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF;
515 Demod.posCount = 0;
516 }
517 }
518 Demod.posCount++;
519 break;
520
521 case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
522 MAKE_SOFT_DECISION();
523 if(v < 0) {
524 Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
525 Demod.posCount = 0;
526 } else {
527 if(Demod.posCount > 100) {
528 Demod.state = DEMOD_UNSYNCD;
529 }
530 }
531 Demod.posCount++;
532 break;
533
534 case DEMOD_GOT_FALLING_EDGE_OF_SOF:
535 MAKE_SOFT_DECISION();
536 if(v > 0) {
537 if(Demod.posCount < 12) {
538 Demod.state = DEMOD_UNSYNCD;
539 } else {
7cf3ef20 540 LED_C_ON(); // Got SOF
15c4dc5a 541 Demod.state = DEMOD_AWAITING_START_BIT;
542 Demod.posCount = 0;
543 Demod.len = 0;
544 Demod.metricN = 0;
545 Demod.metric = 0;
546 }
547 } else {
548 if(Demod.posCount > 100) {
549 Demod.state = DEMOD_UNSYNCD;
550 }
551 }
552 Demod.posCount++;
553 break;
554
555 case DEMOD_AWAITING_START_BIT:
556 MAKE_SOFT_DECISION();
557 if(v > 0) {
558 if(Demod.posCount > 10) {
559 Demod.state = DEMOD_UNSYNCD;
560 }
561 } else {
562 Demod.bitCount = 0;
563 Demod.posCount = 1;
564 Demod.thisBit = v;
565 Demod.shiftReg = 0;
566 Demod.state = DEMOD_RECEIVING_DATA;
567 }
568 break;
569
570 case DEMOD_RECEIVING_DATA:
571 MAKE_SOFT_DECISION();
572 if(Demod.posCount == 0) {
573 Demod.thisBit = v;
574 Demod.posCount = 1;
575 } else {
576 Demod.thisBit += v;
577
578 if(Demod.thisBit > 0) {
579 Demod.metric += Demod.thisBit;
580 } else {
581 Demod.metric -= Demod.thisBit;
582 }
583 (Demod.metricN)++;
584
585 Demod.shiftReg >>= 1;
586 if(Demod.thisBit > 0) {
587 Demod.shiftReg |= 0x200;
588 }
589
590 Demod.bitCount++;
591 if(Demod.bitCount == 10) {
f7e3ed82 592 uint16_t s = Demod.shiftReg;
15c4dc5a 593 if((s & 0x200) && !(s & 0x001)) {
f7e3ed82 594 uint8_t b = (s >> 1);
15c4dc5a 595 Demod.output[Demod.len] = b;
596 Demod.len++;
597 Demod.state = DEMOD_AWAITING_START_BIT;
598 } else if(s == 0x000) {
599 // This is EOF
600 LED_C_OFF();
15c4dc5a 601 Demod.state = DEMOD_UNSYNCD;
7cf3ef20 602 return TRUE;
15c4dc5a 603 } else {
604 Demod.state = DEMOD_UNSYNCD;
605 }
606 }
607 Demod.posCount = 0;
608 }
609 break;
610
611 default:
612 Demod.state = DEMOD_UNSYNCD;
613 break;
614 }
615
616 if (Demod.state == DEMOD_UNSYNCD) LED_C_OFF(); // Not synchronized...
617 return FALSE;
618}
619
620/*
355c8b4a 621 * Demodulate the samples we received from the tag, also log to tracebuffer
15c4dc5a 622 * weTx: set to 'TRUE' if we behave like a reader
623 * set to 'FALSE' if we behave like a snooper
624 * quiet: set to 'TRUE' to disable debug output
625 */
f7e3ed82 626static void GetSamplesFor14443Demod(int weTx, int n, int quiet)
15c4dc5a 627{
628 int max = 0;
f7e3ed82 629 int gotFrame = FALSE;
15c4dc5a 630
631//# define DMA_BUFFER_SIZE 8
f7e3ed82 632 int8_t *dmaBuf;
15c4dc5a 633
634 int lastRxCounter;
f7e3ed82 635 int8_t *upTo;
15c4dc5a 636
637 int ci, cq;
638
639 int samples = 0;
640
641 // Clear out the state of the "UART" that receives from the tag.
7cf3ef20 642 memset(BigBuf, 0x00, 400);
f7e3ed82 643 Demod.output = (uint8_t *)BigBuf;
15c4dc5a 644 Demod.len = 0;
645 Demod.state = DEMOD_UNSYNCD;
646
647 // And the UART that receives from the reader
f7e3ed82 648 Uart.output = (((uint8_t *)BigBuf) + 1024);
15c4dc5a 649 Uart.byteCntMax = 100;
650 Uart.state = STATE_UNSYNCD;
651
652 // Setup for the DMA.
f7e3ed82 653 dmaBuf = (int8_t *)(BigBuf + 32);
15c4dc5a 654 upTo = dmaBuf;
81cd0474 655 lastRxCounter = DEMOD_DMA_BUFFER_SIZE;
656 FpgaSetupSscDma((uint8_t *)dmaBuf, DEMOD_DMA_BUFFER_SIZE);
15c4dc5a 657
658 // Signal field is ON with the appropriate LED:
7cf3ef20 659 if (weTx) LED_D_ON(); else LED_D_OFF();
15c4dc5a 660 // And put the FPGA in the appropriate mode
661 FpgaWriteConfWord(
662 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
663 (weTx ? 0 : FPGA_HF_READER_RX_XCORR_SNOOP));
664
665 for(;;) {
666 int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
667 if(behindBy > max) max = behindBy;
668
81cd0474 669 while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (DEMOD_DMA_BUFFER_SIZE-1))
15c4dc5a 670 > 2)
671 {
672 ci = upTo[0];
673 cq = upTo[1];
674 upTo += 2;
81cd0474 675 if(upTo - dmaBuf > DEMOD_DMA_BUFFER_SIZE) {
676 upTo -= DEMOD_DMA_BUFFER_SIZE;
f7e3ed82 677 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
81cd0474 678 AT91C_BASE_PDC_SSC->PDC_RNCR = DEMOD_DMA_BUFFER_SIZE;
15c4dc5a 679 }
680 lastRxCounter -= 2;
681 if(lastRxCounter <= 0) {
81cd0474 682 lastRxCounter += DEMOD_DMA_BUFFER_SIZE;
15c4dc5a 683 }
684
685 samples += 2;
686
687 Handle14443UartBit(1);
688 Handle14443UartBit(1);
689
690 if(Handle14443SamplesDemod(ci, cq)) {
691 gotFrame = 1;
692 }
693 }
694
695 if(samples > 2000) {
696 break;
697 }
698 }
699 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
700 if (!quiet) Dbprintf("%x %x %x", max, gotFrame, Demod.len);
355c8b4a
MHS
701 //Tracing
702 if (tracing && Demod.len > 0) {
703 uint8_t parity[MAX_PARITY_SIZE];
704 GetParity(Demod.output , Demod.len, parity);
705 LogTrace(Demod.output,Demod.len, 0, 0, parity, FALSE);
706 }
15c4dc5a 707}
708
709//-----------------------------------------------------------------------------
710// Read the tag's response. We just receive a stream of slightly-processed
711// samples from the FPGA, which we will later do some signal processing on,
712// to get the bits.
713//-----------------------------------------------------------------------------
f7e3ed82 714/*static void GetSamplesFor14443(int weTx, int n)
15c4dc5a 715{
f7e3ed82 716 uint8_t *dest = (uint8_t *)BigBuf;
15c4dc5a 717 int c;
718
719 FpgaWriteConfWord(
720 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
721 (weTx ? 0 : FPGA_HF_READER_RX_XCORR_SNOOP));
722
723 c = 0;
724 for(;;) {
725 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
726 AT91C_BASE_SSC->SSC_THR = 0x43;
727 }
728 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 729 int8_t b;
730 b = (int8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 731
f7e3ed82 732 dest[c++] = (uint8_t)b;
15c4dc5a 733
734 if(c >= n) {
735 break;
736 }
737 }
738 }
739}*/
740
741//-----------------------------------------------------------------------------
742// Transmit the command (to the tag) that was placed in ToSend[].
743//-----------------------------------------------------------------------------
744static void TransmitFor14443(void)
745{
746 int c;
747
748 FpgaSetupSsc();
749
750 while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
751 AT91C_BASE_SSC->SSC_THR = 0xff;
752 }
753
754 // Signal field is ON with the appropriate Red LED
755 LED_D_ON();
756 // Signal we are transmitting with the Green LED
757 LED_B_ON();
758 FpgaWriteConfWord(
759 FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
760
761 for(c = 0; c < 10;) {
762 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
763 AT91C_BASE_SSC->SSC_THR = 0xff;
764 c++;
765 }
766 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 767 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 768 (void)r;
769 }
770 WDT_HIT();
771 }
772
773 c = 0;
774 for(;;) {
775 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
776 AT91C_BASE_SSC->SSC_THR = ToSend[c];
777 c++;
778 if(c >= ToSendMax) {
779 break;
780 }
781 }
782 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 783 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 784 (void)r;
785 }
786 WDT_HIT();
787 }
788 LED_B_OFF(); // Finished sending
789}
790
791//-----------------------------------------------------------------------------
792// Code a layer 2 command (string of octets, including CRC) into ToSend[],
793// so that it is ready to transmit to the tag using TransmitFor14443().
794//-----------------------------------------------------------------------------
7cf3ef20 795static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
15c4dc5a 796{
797 int i, j;
f7e3ed82 798 uint8_t b;
15c4dc5a 799
800 ToSendReset();
801
802 // Establish initial reference level
803 for(i = 0; i < 40; i++) {
804 ToSendStuffBit(1);
805 }
806 // Send SOF
807 for(i = 0; i < 10; i++) {
808 ToSendStuffBit(0);
809 }
810
811 for(i = 0; i < len; i++) {
812 // Stop bits/EGT
813 ToSendStuffBit(1);
814 ToSendStuffBit(1);
815 // Start bit
816 ToSendStuffBit(0);
817 // Data bits
818 b = cmd[i];
819 for(j = 0; j < 8; j++) {
820 if(b & 1) {
821 ToSendStuffBit(1);
822 } else {
823 ToSendStuffBit(0);
824 }
825 b >>= 1;
826 }
827 }
828 // Send EOF
829 ToSendStuffBit(1);
830 for(i = 0; i < 10; i++) {
831 ToSendStuffBit(0);
832 }
833 for(i = 0; i < 8; i++) {
834 ToSendStuffBit(1);
835 }
836
837 // And then a little more, to make sure that the last character makes
838 // it out before we switch to rx mode.
839 for(i = 0; i < 24; i++) {
840 ToSendStuffBit(1);
841 }
842
843 // Convert from last character reference to length
844 ToSendMax++;
845}
846
847//-----------------------------------------------------------------------------
848// Read an ISO 14443 tag. We send it some set of commands, and record the
849// responses.
850// The command name is misleading, it actually decodes the reponse in HEX
851// into the output buffer (read the result using hexsamples, not hisamples)
7cf3ef20 852//
853// obsolete function only for test
15c4dc5a 854//-----------------------------------------------------------------------------
f7e3ed82 855void AcquireRawAdcSamplesIso14443(uint32_t parameter)
15c4dc5a 856{
f7e3ed82 857 uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
15c4dc5a 858
7cf3ef20 859 SendRawCommand14443B(sizeof(cmd1),1,1,cmd1);
15c4dc5a 860}
861
355c8b4a
MHS
862/**
863 Convenience function to encode, transmit and trace iso 14443b comms
864 **/
865static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len)
866{
867 CodeIso14443bAsReader(cmd, len);
868 TransmitFor14443();
869 if (tracing) {
870 uint8_t parity[MAX_PARITY_SIZE];
871 GetParity(cmd, len, parity);
872 LogTrace(cmd,len, 0, 0, parity, TRUE);
873 }
874}
875
15c4dc5a 876//-----------------------------------------------------------------------------
877// Read a SRI512 ISO 14443 tag.
878//
879// SRI512 tags are just simple memory tags, here we're looking at making a dump
880// of the contents of the memory. No anticollision algorithm is done, we assume
881// we have a single tag in the field.
882//
883// I tried to be systematic and check every answer of the tag, every CRC, etc...
884//-----------------------------------------------------------------------------
7cf3ef20 885void ReadSTMemoryIso14443(uint32_t dwLast)
15c4dc5a 886{
355c8b4a
MHS
887 clear_trace();
888 set_tracing(TRUE);
889
f7e3ed82 890 uint8_t i = 0x00;
15c4dc5a 891
7cc204bf 892 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
15c4dc5a 893 // Make sure that we start from off, since the tags are stateful;
894 // confusing things will happen if we don't reset them between reads.
895 LED_D_OFF();
896 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
897 SpinDelay(200);
898
899 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
900 FpgaSetupSsc();
901
902 // Now give it time to spin up.
903 // Signal field is on with the appropriate LED
904 LED_D_ON();
905 FpgaWriteConfWord(
906 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
907 SpinDelay(200);
908
909 // First command: wake up the tag using the INITIATE command
f7e3ed82 910 uint8_t cmd1[] = { 0x06, 0x00, 0x97, 0x5b};
355c8b4a
MHS
911
912 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
15c4dc5a 913// LED_A_ON();
914 GetSamplesFor14443Demod(TRUE, 2000,TRUE);
915// LED_A_OFF();
916
917 if (Demod.len == 0) {
918 DbpString("No response from tag");
919 return;
920 } else {
921 Dbprintf("Randomly generated UID from tag (+ 2 byte CRC): %x %x %x",
922 Demod.output[0], Demod.output[1],Demod.output[2]);
923 }
924 // There is a response, SELECT the uid
925 DbpString("Now SELECT tag:");
926 cmd1[0] = 0x0E; // 0x0E is SELECT
927 cmd1[1] = Demod.output[0];
928 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
355c8b4a
MHS
929 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
930
15c4dc5a 931// LED_A_ON();
932 GetSamplesFor14443Demod(TRUE, 2000,TRUE);
933// LED_A_OFF();
934 if (Demod.len != 3) {
935 Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
936 return;
937 }
938 // Check the CRC of the answer:
939 ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]);
940 if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) {
941 DbpString("CRC Error reading select response.");
942 return;
943 }
944 // Check response from the tag: should be the same UID as the command we just sent:
945 if (cmd1[1] != Demod.output[0]) {
946 Dbprintf("Bad response to SELECT from Tag, aborting: %x %x", cmd1[1], Demod.output[0]);
947 return;
948 }
949 // Tag is now selected,
950 // First get the tag's UID:
951 cmd1[0] = 0x0B;
952 ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]);
355c8b4a
MHS
953 CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one
954
15c4dc5a 955// LED_A_ON();
956 GetSamplesFor14443Demod(TRUE, 2000,TRUE);
957// LED_A_OFF();
958 if (Demod.len != 10) {
959 Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
960 return;
961 }
962 // The check the CRC of the answer (use cmd1 as temporary variable):
963 ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]);
964 if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) {
965 Dbprintf("CRC Error reading block! - Below: expected, got %x %x",
966 (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]);
967 // Do not return;, let's go on... (we should retry, maybe ?)
968 }
969 Dbprintf("Tag UID (64 bits): %08x %08x",
970 (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
971 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]);
972
7cf3ef20 973 // Now loop to read all 16 blocks, address from 0 to last block
974 Dbprintf("Tag memory dump, block 0 to %d",dwLast);
15c4dc5a 975 cmd1[0] = 0x08;
976 i = 0x00;
977 dwLast++;
978 for (;;) {
979 if (i == dwLast) {
980 DbpString("System area block (0xff):");
981 i = 0xff;
982 }
983 cmd1[1] = i;
984 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
355c8b4a
MHS
985 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
986
15c4dc5a 987// LED_A_ON();
988 GetSamplesFor14443Demod(TRUE, 2000,TRUE);
989// LED_A_OFF();
990 if (Demod.len != 6) { // Check if we got an answer from the tag
991 DbpString("Expected 6 bytes from tag, got less...");
992 return;
993 }
994 // The check the CRC of the answer (use cmd1 as temporary variable):
995 ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]);
996 if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) {
997 Dbprintf("CRC Error reading block! - Below: expected, got %x %x",
998 (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]);
999 // Do not return;, let's go on... (we should retry, maybe ?)
1000 }
1001 // Now print out the memory location:
1002 Dbprintf("Address=%x, Contents=%x, CRC=%x", i,
1003 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0],
1004 (Demod.output[4]<<8)+Demod.output[5]);
1005 if (i == 0xff) {
1006 break;
1007 }
1008 i++;
1009 }
1010}
1011
1012
1013//=============================================================================
1014// Finally, the `sniffer' combines elements from both the reader and
1015// simulated tag, to show both sides of the conversation.
1016//=============================================================================
1017
1018//-----------------------------------------------------------------------------
1019// Record the sequence of commands sent by the reader to the tag, with
1020// triggering so that we start recording at the point that the tag is moved
1021// near the reader.
1022//-----------------------------------------------------------------------------
1023/*
1024 * Memory usage for this function, (within BigBuf)
1025 * 0-4095 : Demodulated samples receive (4096 bytes) - DEMOD_TRACE_SIZE
1026 * 4096-6143 : Last Received command, 2048 bytes (reader->tag) - READER_TAG_BUFFER_SIZE
1027 * 6144-8191 : Last Received command, 2048 bytes(tag->reader) - TAG_READER_BUFFER_SIZE
81cd0474 1028 * 8192-9215 : DMA Buffer, 1024 bytes (samples) - DEMOD_DMA_BUFFER_SIZE
15c4dc5a 1029 */
0f7f9edc 1030void RAMFUNC SnoopIso14443(void)
15c4dc5a 1031{
1032 // We won't start recording the frames that we acquire until we trigger;
1033 // a good trigger condition to get started is probably when we see a
1034 // response from the tag.
0f7f9edc 1035 int triggered = TRUE;
15c4dc5a 1036
7cc204bf 1037 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
15c4dc5a 1038 // The command (reader -> tag) that we're working on receiving.
f7e3ed82 1039 uint8_t *receivedCmd = (uint8_t *)(BigBuf) + DEMOD_TRACE_SIZE;
15c4dc5a 1040 // The response (tag -> reader) that we're working on receiving.
f7e3ed82 1041 uint8_t *receivedResponse = (uint8_t *)(BigBuf) + DEMOD_TRACE_SIZE + READER_TAG_BUFFER_SIZE;
15c4dc5a 1042
1043 // As we receive stuff, we copy it from receivedCmd or receivedResponse
1044 // into trace, along with its length and other annotations.
f7e3ed82 1045 uint8_t *trace = (uint8_t *)BigBuf;
15c4dc5a 1046 int traceLen = 0;
1047
1048 // The DMA buffer, used to stream samples from the FPGA.
f7e3ed82 1049 int8_t *dmaBuf = (int8_t *)(BigBuf) + DEMOD_TRACE_SIZE + READER_TAG_BUFFER_SIZE + TAG_READER_BUFFER_SIZE;
15c4dc5a 1050 int lastRxCounter;
f7e3ed82 1051 int8_t *upTo;
15c4dc5a 1052 int ci, cq;
1053 int maxBehindBy = 0;
1054
1055 // Count of samples received so far, so that we can include timing
1056 // information in the trace buffer.
1057 int samples = 0;
1058
1059 // Initialize the trace buffer
1060 memset(trace, 0x44, DEMOD_TRACE_SIZE);
1061
1062 // Set up the demodulator for tag -> reader responses.
1063 Demod.output = receivedResponse;
1064 Demod.len = 0;
1065 Demod.state = DEMOD_UNSYNCD;
1066
1067 // And the reader -> tag commands
1068 memset(&Uart, 0, sizeof(Uart));
1069 Uart.output = receivedCmd;
1070 Uart.byteCntMax = 100;
1071 Uart.state = STATE_UNSYNCD;
1072
7cf3ef20 1073 // Print some debug information about the buffer sizes
1074 Dbprintf("Snooping buffers initialized:");
1075 Dbprintf(" Trace: %i bytes", DEMOD_TRACE_SIZE);
1076 Dbprintf(" Reader -> tag: %i bytes", READER_TAG_BUFFER_SIZE);
1077 Dbprintf(" tag -> Reader: %i bytes", TAG_READER_BUFFER_SIZE);
1078 Dbprintf(" DMA: %i bytes", DEMOD_DMA_BUFFER_SIZE);
e30c654b 1079
15c4dc5a 1080 // And put the FPGA in the appropriate mode
1081 // Signal field is off with the appropriate LED
1082 LED_D_OFF();
1083 FpgaWriteConfWord(
1084 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
1085 FPGA_HF_READER_RX_XCORR_SNOOP);
1086 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1087
1088 // Setup for the DMA.
1089 FpgaSetupSsc();
1090 upTo = dmaBuf;
81cd0474 1091 lastRxCounter = DEMOD_DMA_BUFFER_SIZE;
1092 FpgaSetupSscDma((uint8_t *)dmaBuf, DEMOD_DMA_BUFFER_SIZE);
0f7f9edc 1093
1094 LED_A_ON();
1095
15c4dc5a 1096 // And now we loop, receiving samples.
1097 for(;;) {
15c4dc5a 1098 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
81cd0474 1099 (DEMOD_DMA_BUFFER_SIZE-1);
15c4dc5a 1100 if(behindBy > maxBehindBy) {
1101 maxBehindBy = behindBy;
81cd0474 1102 if(behindBy > (DEMOD_DMA_BUFFER_SIZE-2)) { // TODO: understand whether we can increase/decrease as we want or not?
7e758047 1103 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
15c4dc5a 1104 goto done;
1105 }
1106 }
1107 if(behindBy < 2) continue;
1108
1109 ci = upTo[0];
1110 cq = upTo[1];
1111 upTo += 2;
1112 lastRxCounter -= 2;
81cd0474 1113 if(upTo - dmaBuf > DEMOD_DMA_BUFFER_SIZE) {
1114 upTo -= DEMOD_DMA_BUFFER_SIZE;
1115 lastRxCounter += DEMOD_DMA_BUFFER_SIZE;
f7e3ed82 1116 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
81cd0474 1117 AT91C_BASE_PDC_SSC->PDC_RNCR = DEMOD_DMA_BUFFER_SIZE;
15c4dc5a 1118 }
1119
1120 samples += 2;
1121
1122#define HANDLE_BIT_IF_BODY \
355c8b4a
MHS
1123 if(triggered && tracing) {\
1124 uint8_t parity[MAX_PARITY_SIZE];\
1125 GetParity(receivedCmd, Uart.byteCnt, parity);\
1126 LogTrace(receivedCmd,Uart.byteCnt,samples, samples,parity,TRUE);\
1127 if(!tracing) {\
1128 DbpString("Reached trace limit");\
1129 break;\
1130 }\
1131 }\
15c4dc5a 1132 /* And ready to receive another command. */ \
1133 memset(&Uart, 0, sizeof(Uart)); \
1134 Uart.output = receivedCmd; \
1135 Uart.byteCntMax = 100; \
1136 Uart.state = STATE_UNSYNCD; \
1137 /* And also reset the demod code, which might have been */ \
1138 /* false-triggered by the commands from the reader. */ \
1139 memset(&Demod, 0, sizeof(Demod)); \
1140 Demod.output = receivedResponse; \
1141 Demod.state = DEMOD_UNSYNCD; \
1142
1143 if(Handle14443UartBit(ci & 1)) {
1144 HANDLE_BIT_IF_BODY
1145 }
1146 if(Handle14443UartBit(cq & 1)) {
1147 HANDLE_BIT_IF_BODY
1148 }
1149
1150 if(Handle14443SamplesDemod(ci, cq)) {
15c4dc5a 1151
355c8b4a
MHS
1152 //Use samples as a time measurement
1153 if(tracing)
1154 {
1155 uint8_t parity[MAX_PARITY_SIZE];
1156 GetParity(receivedResponse, Demod.len, parity);
1157 LogTrace(receivedResponse,Demod.len,samples, samples,parity,FALSE);
1158 if(!tracing) {
1159 DbpString("Reached trace limit");
1160 break;
1161 }
1162 }
15c4dc5a 1163 triggered = TRUE;
0f7f9edc 1164 LED_A_OFF();
1165 LED_B_ON();
15c4dc5a 1166
1167 // And ready to receive another response.
1168 memset(&Demod, 0, sizeof(Demod));
1169 Demod.output = receivedResponse;
1170 Demod.state = DEMOD_UNSYNCD;
1171 }
7cf3ef20 1172 WDT_HIT();
15c4dc5a 1173
1174 if(BUTTON_PRESS()) {
1175 DbpString("cancelled");
1176 goto done;
1177 }
1178 }
1179
1180done:
0f7f9edc 1181 LED_A_OFF();
1182 LED_B_OFF();
1183 LED_C_OFF();
1184 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
15c4dc5a 1185 DbpString("Snoop statistics:");
355c8b4a 1186 Dbprintf(" Max behind by: %i", maxBehindBy);
15c4dc5a 1187 Dbprintf(" Uart State: %x", Uart.state);
1188 Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt);
1189 Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax);
1190 Dbprintf(" Trace length: %i", traceLen);
1191}
7cf3ef20 1192
1193/*
1194 * Send raw command to tag ISO14443B
1195 * @Input
1196 * datalen len of buffer data
1197 * recv bool when true wait for data from tag and send to client
1198 * powerfield bool leave the field on when true
1199 * data buffer with byte to send
1200 *
1201 * @Output
1202 * none
1203 *
1204 */
1205
1206void SendRawCommand14443B(uint32_t datalen, uint32_t recv,uint8_t powerfield, uint8_t data[])
1207{
7cc204bf 1208 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
7cf3ef20 1209 if(!powerfield)
1210 {
1211 // Make sure that we start from off, since the tags are stateful;
1212 // confusing things will happen if we don't reset them between reads.
1213 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1214 LED_D_OFF();
1215 SpinDelay(200);
1216 }
1217
1218 if(!GETBIT(GPIO_LED_D))
1219 {
1220 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1221 FpgaSetupSsc();
1222
1223 // Now give it time to spin up.
1224 // Signal field is on with the appropriate LED
1225 LED_D_ON();
1226 FpgaWriteConfWord(
1227 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
1228 SpinDelay(200);
1229 }
1230
355c8b4a
MHS
1231 CodeAndTransmit14443bAsReader(data, datalen);
1232
7cf3ef20 1233 if(recv)
1234 {
1235 uint16_t iLen = MIN(Demod.len,USB_CMD_DATA_SIZE);
1236 GetSamplesFor14443Demod(TRUE, 2000, TRUE);
1237 cmd_send(CMD_ACK,iLen,0,0,Demod.output,iLen);
1238 }
1239 if(!powerfield)
1240 {
1241 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1242 LED_D_OFF();
1243 }
1244}
1245
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