]> git.zerfleddert.de Git - proxmark3-svn/blame - armsrc/iclass.c
Implemented the correct way to calculate MAC from a tag, feeding it an extra 32 zeroe...
[proxmark3-svn] / armsrc / iclass.c
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cee5a30d 1//-----------------------------------------------------------------------------
2// Gerhard de Koning Gans - May 2008
3// Hagen Fritsch - June 2010
4// Gerhard de Koning Gans - May 2011
1e262141 5// Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
cee5a30d 6//
7// This code is licensed to you under the terms of the GNU GPL, version 2 or,
8// at your option, any later version. See the LICENSE.txt file for the text of
9// the license.
10//-----------------------------------------------------------------------------
11// Routines to support iClass.
12//-----------------------------------------------------------------------------
13// Based on ISO14443a implementation. Still in experimental phase.
14// Contribution made during a security research at Radboud University Nijmegen
15//
16// Please feel free to contribute and extend iClass support!!
17//-----------------------------------------------------------------------------
18//
cee5a30d 19// FIX:
20// ====
21// We still have sometimes a demodulation error when snooping iClass communication.
22// The resulting trace of a read-block-03 command may look something like this:
23//
24// + 22279: : 0c 03 e8 01
25//
26// ...with an incorrect answer...
27//
28// + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29//
30// We still left the error signalling bytes in the traces like 0xbb
31//
32// A correct trace should look like this:
33//
34// + 21112: : 0c 03 e8 01
35// + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36//
37//-----------------------------------------------------------------------------
38
39#include "proxmark3.h"
40#include "apps.h"
41#include "util.h"
42#include "string.h"
7e67e42f 43#include "common.h"
fecd8202 44#include "cmd.h"
1e262141 45// Needed for CRC in emulation mode;
46// same construction as in ISO 14443;
47// different initial value (CRC_ICLASS)
48#include "iso14443crc.h"
c3963755 49#include "iso15693tools.h"
b67f7ec3 50#include "protocols.h"
10a8875c
MHS
51#include "optimized_cipher.h"
52
1e262141 53static int timeout = 4096;
cee5a30d 54
cee5a30d 55
1e262141 56static int SendIClassAnswer(uint8_t *resp, int respLen, int delay);
cee5a30d 57
58//-----------------------------------------------------------------------------
59// The software UART that receives commands from the reader, and its state
60// variables.
61//-----------------------------------------------------------------------------
62static struct {
63 enum {
64 STATE_UNSYNCD,
65 STATE_START_OF_COMMUNICATION,
66 STATE_RECEIVING
67 } state;
68 uint16_t shiftReg;
69 int bitCnt;
70 int byteCnt;
71 int byteCntMax;
72 int posCnt;
73 int nOutOfCnt;
74 int OutOfCnt;
75 int syncBit;
1e262141 76 int samples;
cee5a30d 77 int highCnt;
78 int swapper;
79 int counter;
80 int bitBuffer;
81 int dropPosition;
6a1f2d82 82 uint8_t *output;
cee5a30d 83} Uart;
84
1e262141 85static RAMFUNC int OutOfNDecoding(int bit)
cee5a30d 86{
9f693930 87 //int error = 0;
cee5a30d 88 int bitright;
89
90 if(!Uart.bitBuffer) {
91 Uart.bitBuffer = bit ^ 0xFF0;
92 return FALSE;
93 }
94 else {
95 Uart.bitBuffer <<= 4;
96 Uart.bitBuffer ^= bit;
97 }
98
99 /*if(Uart.swapper) {
100 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
101 Uart.byteCnt++;
102 Uart.swapper = 0;
103 if(Uart.byteCnt > 15) { return TRUE; }
104 }
105 else {
106 Uart.swapper = 1;
107 }*/
108
109 if(Uart.state != STATE_UNSYNCD) {
110 Uart.posCnt++;
111
112 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
113 bit = 0x00;
114 }
115 else {
116 bit = 0x01;
117 }
118 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
119 bitright = 0x00;
120 }
121 else {
122 bitright = 0x01;
123 }
124 if(bit != bitright) { bit = bitright; }
125
126
127 // So, now we only have to deal with *bit*, lets see...
128 if(Uart.posCnt == 1) {
129 // measurement first half bitperiod
130 if(!bit) {
131 // Drop in first half means that we are either seeing
132 // an SOF or an EOF.
133
134 if(Uart.nOutOfCnt == 1) {
135 // End of Communication
136 Uart.state = STATE_UNSYNCD;
137 Uart.highCnt = 0;
138 if(Uart.byteCnt == 0) {
139 // Its not straightforward to show single EOFs
140 // So just leave it and do not return TRUE
6a1f2d82 141 Uart.output[0] = 0xf0;
cee5a30d 142 Uart.byteCnt++;
cee5a30d 143 }
144 else {
145 return TRUE;
146 }
147 }
148 else if(Uart.state != STATE_START_OF_COMMUNICATION) {
149 // When not part of SOF or EOF, it is an error
150 Uart.state = STATE_UNSYNCD;
151 Uart.highCnt = 0;
9f693930 152 //error = 4;
cee5a30d 153 }
154 }
155 }
156 else {
157 // measurement second half bitperiod
158 // Count the bitslot we are in... (ISO 15693)
159 Uart.nOutOfCnt++;
160
161 if(!bit) {
162 if(Uart.dropPosition) {
163 if(Uart.state == STATE_START_OF_COMMUNICATION) {
9f693930 164 //error = 1;
cee5a30d 165 }
166 else {
9f693930 167 //error = 7;
cee5a30d 168 }
169 // It is an error if we already have seen a drop in current frame
170 Uart.state = STATE_UNSYNCD;
171 Uart.highCnt = 0;
172 }
173 else {
174 Uart.dropPosition = Uart.nOutOfCnt;
175 }
176 }
177
178 Uart.posCnt = 0;
179
180
181 if(Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
182 Uart.nOutOfCnt = 0;
183
184 if(Uart.state == STATE_START_OF_COMMUNICATION) {
185 if(Uart.dropPosition == 4) {
186 Uart.state = STATE_RECEIVING;
187 Uart.OutOfCnt = 256;
188 }
189 else if(Uart.dropPosition == 3) {
190 Uart.state = STATE_RECEIVING;
191 Uart.OutOfCnt = 4;
192 //Uart.output[Uart.byteCnt] = 0xdd;
193 //Uart.byteCnt++;
194 }
195 else {
196 Uart.state = STATE_UNSYNCD;
197 Uart.highCnt = 0;
198 }
199 Uart.dropPosition = 0;
200 }
201 else {
202 // RECEIVING DATA
203 // 1 out of 4
204 if(!Uart.dropPosition) {
205 Uart.state = STATE_UNSYNCD;
206 Uart.highCnt = 0;
9f693930 207 //error = 9;
cee5a30d 208 }
209 else {
210 Uart.shiftReg >>= 2;
211
212 // Swap bit order
213 Uart.dropPosition--;
214 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
215 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
216
217 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
218 Uart.bitCnt += 2;
219 Uart.dropPosition = 0;
220
221 if(Uart.bitCnt == 8) {
222 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
223 Uart.byteCnt++;
cee5a30d 224 Uart.bitCnt = 0;
225 Uart.shiftReg = 0;
226 }
227 }
228 }
229 }
230 else if(Uart.nOutOfCnt == Uart.OutOfCnt) {
231 // RECEIVING DATA
232 // 1 out of 256
233 if(!Uart.dropPosition) {
234 Uart.state = STATE_UNSYNCD;
235 Uart.highCnt = 0;
9f693930 236 //error = 3;
cee5a30d 237 }
238 else {
239 Uart.dropPosition--;
240 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
241 Uart.byteCnt++;
cee5a30d 242 Uart.bitCnt = 0;
243 Uart.shiftReg = 0;
244 Uart.nOutOfCnt = 0;
245 Uart.dropPosition = 0;
246 }
247 }
248
249 /*if(error) {
250 Uart.output[Uart.byteCnt] = 0xAA;
251 Uart.byteCnt++;
252 Uart.output[Uart.byteCnt] = error & 0xFF;
253 Uart.byteCnt++;
254 Uart.output[Uart.byteCnt] = 0xAA;
255 Uart.byteCnt++;
256 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
257 Uart.byteCnt++;
258 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
259 Uart.byteCnt++;
260 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
261 Uart.byteCnt++;
262 Uart.output[Uart.byteCnt] = 0xAA;
263 Uart.byteCnt++;
264 return TRUE;
265 }*/
266 }
267
268 }
269 else {
270 bit = Uart.bitBuffer & 0xf0;
271 bit >>= 4;
272 bit ^= 0x0F; // drops become 1s ;-)
273 if(bit) {
274 // should have been high or at least (4 * 128) / fc
275 // according to ISO this should be at least (9 * 128 + 20) / fc
276 if(Uart.highCnt == 8) {
277 // we went low, so this could be start of communication
278 // it turns out to be safer to choose a less significant
279 // syncbit... so we check whether the neighbour also represents the drop
280 Uart.posCnt = 1; // apparently we are busy with our first half bit period
281 Uart.syncBit = bit & 8;
282 Uart.samples = 3;
283 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
284 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
285 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
286 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
287 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
288 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
289 Uart.syncBit = 8;
290
291 // the first half bit period is expected in next sample
292 Uart.posCnt = 0;
293 Uart.samples = 3;
294 }
295 }
296 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
297
298 Uart.syncBit <<= 4;
299 Uart.state = STATE_START_OF_COMMUNICATION;
300 Uart.bitCnt = 0;
301 Uart.byteCnt = 0;
cee5a30d 302 Uart.nOutOfCnt = 0;
303 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
304 Uart.dropPosition = 0;
305 Uart.shiftReg = 0;
9f693930 306 //error = 0;
cee5a30d 307 }
308 else {
309 Uart.highCnt = 0;
310 }
311 }
312 else {
313 if(Uart.highCnt < 8) {
314 Uart.highCnt++;
315 }
316 }
317 }
318
319 return FALSE;
320}
321
322//=============================================================================
1e262141 323// Manchester
cee5a30d 324//=============================================================================
325
326static struct {
327 enum {
328 DEMOD_UNSYNCD,
329 DEMOD_START_OF_COMMUNICATION,
330 DEMOD_START_OF_COMMUNICATION2,
331 DEMOD_START_OF_COMMUNICATION3,
332 DEMOD_SOF_COMPLETE,
333 DEMOD_MANCHESTER_D,
334 DEMOD_MANCHESTER_E,
335 DEMOD_END_OF_COMMUNICATION,
336 DEMOD_END_OF_COMMUNICATION2,
337 DEMOD_MANCHESTER_F,
338 DEMOD_ERROR_WAIT
339 } state;
340 int bitCount;
341 int posCount;
342 int syncBit;
cee5a30d 343 uint16_t shiftReg;
344 int buffer;
345 int buffer2;
346 int buffer3;
347 int buff;
348 int samples;
349 int len;
350 enum {
351 SUB_NONE,
352 SUB_FIRST_HALF,
353 SUB_SECOND_HALF,
354 SUB_BOTH
355 } sub;
6a1f2d82 356 uint8_t *output;
cee5a30d 357} Demod;
358
359static RAMFUNC int ManchesterDecoding(int v)
360{
361 int bit;
362 int modulation;
363 int error = 0;
364
365 bit = Demod.buffer;
366 Demod.buffer = Demod.buffer2;
367 Demod.buffer2 = Demod.buffer3;
368 Demod.buffer3 = v;
369
370 if(Demod.buff < 3) {
371 Demod.buff++;
372 return FALSE;
373 }
374
375 if(Demod.state==DEMOD_UNSYNCD) {
376 Demod.output[Demod.len] = 0xfa;
377 Demod.syncBit = 0;
378 //Demod.samples = 0;
379 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
cee5a30d 380
381 if(bit & 0x08) {
382 Demod.syncBit = 0x08;
383 }
384
385 if(bit & 0x04) {
386 if(Demod.syncBit) {
387 bit <<= 4;
388 }
389 Demod.syncBit = 0x04;
390 }
391
392 if(bit & 0x02) {
393 if(Demod.syncBit) {
394 bit <<= 2;
395 }
396 Demod.syncBit = 0x02;
397 }
398
399 if(bit & 0x01 && Demod.syncBit) {
400 Demod.syncBit = 0x01;
401 }
402
403 if(Demod.syncBit) {
404 Demod.len = 0;
405 Demod.state = DEMOD_START_OF_COMMUNICATION;
406 Demod.sub = SUB_FIRST_HALF;
407 Demod.bitCount = 0;
408 Demod.shiftReg = 0;
cee5a30d 409 Demod.samples = 0;
410 if(Demod.posCount) {
411 //if(trigger) LED_A_OFF(); // Not useful in this case...
412 switch(Demod.syncBit) {
413 case 0x08: Demod.samples = 3; break;
414 case 0x04: Demod.samples = 2; break;
415 case 0x02: Demod.samples = 1; break;
416 case 0x01: Demod.samples = 0; break;
417 }
418 // SOF must be long burst... otherwise stay unsynced!!!
419 if(!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
420 Demod.state = DEMOD_UNSYNCD;
421 }
422 }
423 else {
424 // SOF must be long burst... otherwise stay unsynced!!!
425 if(!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
426 Demod.state = DEMOD_UNSYNCD;
427 error = 0x88;
428 }
429
430 }
431 error = 0;
432
433 }
434 }
435 else {
436 modulation = bit & Demod.syncBit;
437 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
cee5a30d 438
439 Demod.samples += 4;
440
441 if(Demod.posCount==0) {
442 Demod.posCount = 1;
443 if(modulation) {
444 Demod.sub = SUB_FIRST_HALF;
445 }
446 else {
447 Demod.sub = SUB_NONE;
448 }
449 }
450 else {
451 Demod.posCount = 0;
452 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
453 if(Demod.state!=DEMOD_ERROR_WAIT) {
454 Demod.state = DEMOD_ERROR_WAIT;
455 Demod.output[Demod.len] = 0xaa;
456 error = 0x01;
457 }
458 }*/
459 //else if(modulation) {
460 if(modulation) {
461 if(Demod.sub == SUB_FIRST_HALF) {
462 Demod.sub = SUB_BOTH;
463 }
464 else {
465 Demod.sub = SUB_SECOND_HALF;
466 }
467 }
468 else if(Demod.sub == SUB_NONE) {
469 if(Demod.state == DEMOD_SOF_COMPLETE) {
470 Demod.output[Demod.len] = 0x0f;
471 Demod.len++;
cee5a30d 472 Demod.state = DEMOD_UNSYNCD;
473// error = 0x0f;
474 return TRUE;
475 }
476 else {
477 Demod.state = DEMOD_ERROR_WAIT;
478 error = 0x33;
479 }
480 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
481 Demod.state = DEMOD_ERROR_WAIT;
482 Demod.output[Demod.len] = 0xaa;
483 error = 0x01;
484 }*/
485 }
486
487 switch(Demod.state) {
488 case DEMOD_START_OF_COMMUNICATION:
489 if(Demod.sub == SUB_BOTH) {
490 //Demod.state = DEMOD_MANCHESTER_D;
491 Demod.state = DEMOD_START_OF_COMMUNICATION2;
492 Demod.posCount = 1;
493 Demod.sub = SUB_NONE;
494 }
495 else {
496 Demod.output[Demod.len] = 0xab;
497 Demod.state = DEMOD_ERROR_WAIT;
498 error = 0xd2;
499 }
500 break;
501 case DEMOD_START_OF_COMMUNICATION2:
502 if(Demod.sub == SUB_SECOND_HALF) {
503 Demod.state = DEMOD_START_OF_COMMUNICATION3;
504 }
505 else {
506 Demod.output[Demod.len] = 0xab;
507 Demod.state = DEMOD_ERROR_WAIT;
508 error = 0xd3;
509 }
510 break;
511 case DEMOD_START_OF_COMMUNICATION3:
512 if(Demod.sub == SUB_SECOND_HALF) {
513// Demod.state = DEMOD_MANCHESTER_D;
514 Demod.state = DEMOD_SOF_COMPLETE;
515 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
516 //Demod.len++;
517 }
518 else {
519 Demod.output[Demod.len] = 0xab;
520 Demod.state = DEMOD_ERROR_WAIT;
521 error = 0xd4;
522 }
523 break;
524 case DEMOD_SOF_COMPLETE:
525 case DEMOD_MANCHESTER_D:
526 case DEMOD_MANCHESTER_E:
527 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
528 // 00001111 = 1 (0 in 14443)
529 if(Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
530 Demod.bitCount++;
531 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
532 Demod.state = DEMOD_MANCHESTER_D;
533 }
534 else if(Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
535 Demod.bitCount++;
536 Demod.shiftReg >>= 1;
537 Demod.state = DEMOD_MANCHESTER_E;
538 }
539 else if(Demod.sub == SUB_BOTH) {
540 Demod.state = DEMOD_MANCHESTER_F;
541 }
542 else {
543 Demod.state = DEMOD_ERROR_WAIT;
544 error = 0x55;
545 }
546 break;
547
548 case DEMOD_MANCHESTER_F:
549 // Tag response does not need to be a complete byte!
550 if(Demod.len > 0 || Demod.bitCount > 0) {
551 if(Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
6a1f2d82 552 Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
cee5a30d 553 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
554 Demod.len++;
cee5a30d 555 }
556
557 Demod.state = DEMOD_UNSYNCD;
558 return TRUE;
559 }
560 else {
561 Demod.output[Demod.len] = 0xad;
562 Demod.state = DEMOD_ERROR_WAIT;
563 error = 0x03;
564 }
565 break;
566
567 case DEMOD_ERROR_WAIT:
568 Demod.state = DEMOD_UNSYNCD;
569 break;
570
571 default:
572 Demod.output[Demod.len] = 0xdd;
573 Demod.state = DEMOD_UNSYNCD;
574 break;
575 }
576
577 /*if(Demod.bitCount>=9) {
578 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
579 Demod.len++;
580
581 Demod.parityBits <<= 1;
582 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
583
584 Demod.bitCount = 0;
585 Demod.shiftReg = 0;
586 }*/
587 if(Demod.bitCount>=8) {
588 Demod.shiftReg >>= 1;
589 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
590 Demod.len++;
cee5a30d 591 Demod.bitCount = 0;
592 Demod.shiftReg = 0;
593 }
594
595 if(error) {
596 Demod.output[Demod.len] = 0xBB;
597 Demod.len++;
598 Demod.output[Demod.len] = error & 0xFF;
599 Demod.len++;
600 Demod.output[Demod.len] = 0xBB;
601 Demod.len++;
602 Demod.output[Demod.len] = bit & 0xFF;
603 Demod.len++;
604 Demod.output[Demod.len] = Demod.buffer & 0xFF;
605 Demod.len++;
606 // Look harder ;-)
607 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
608 Demod.len++;
609 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
610 Demod.len++;
611 Demod.output[Demod.len] = 0xBB;
612 Demod.len++;
613 return TRUE;
614 }
615
616 }
617
618 } // end (state != UNSYNCED)
619
620 return FALSE;
621}
622
623//=============================================================================
1e262141 624// Finally, a `sniffer' for iClass communication
cee5a30d 625// Both sides of communication!
626//=============================================================================
627
628//-----------------------------------------------------------------------------
629// Record the sequence of commands sent by the reader to the tag, with
630// triggering so that we start recording at the point that the tag is moved
631// near the reader.
632//-----------------------------------------------------------------------------
633void RAMFUNC SnoopIClass(void)
634{
17cba269 635
cee5a30d 636
637 // We won't start recording the frames that we acquire until we trigger;
638 // a good trigger condition to get started is probably when we see a
639 // response from the tag.
9f693930 640 //int triggered = FALSE; // FALSE to wait first for card
cee5a30d 641
642 // The command (reader -> tag) that we're receiving.
643 // The length of a received command will in most cases be no more than 18 bytes.
644 // So 32 should be enough!
f71f4deb 645 #define ICLASS_BUFFER_SIZE 32
646 uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
cee5a30d 647 // The response (tag -> reader) that we're receiving.
f71f4deb 648 uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
6a1f2d82 649
7cc204bf 650 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
651
f71f4deb 652 // free all BigBuf memory
653 BigBuf_free();
654 // The DMA buffer, used to stream samples from the FPGA
655 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
656
3000dc4e
MHS
657 set_tracing(TRUE);
658 clear_trace();
1e262141 659 iso14a_set_trigger(FALSE);
cee5a30d 660
f71f4deb 661 int lastRxCounter;
117d9ec2 662 uint8_t *upTo;
cee5a30d 663 int smpl;
664 int maxBehindBy = 0;
665
666 // Count of samples received so far, so that we can include timing
667 // information in the trace buffer.
668 int samples = 0;
669 rsamples = 0;
670
cee5a30d 671 // Set up the demodulator for tag -> reader responses.
17cba269 672 Demod.output = tagToReaderResponse;
cee5a30d 673 Demod.len = 0;
674 Demod.state = DEMOD_UNSYNCD;
675
676 // Setup for the DMA.
677 FpgaSetupSsc();
678 upTo = dmaBuf;
679 lastRxCounter = DMA_BUFFER_SIZE;
680 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
681
682 // And the reader -> tag commands
683 memset(&Uart, 0, sizeof(Uart));
17cba269 684 Uart.output = readerToTagCmd;
cee5a30d 685 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
686 Uart.state = STATE_UNSYNCD;
687
688 // And put the FPGA in the appropriate mode
689 // Signal field is off with the appropriate LED
690 LED_D_OFF();
691 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
692 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
693
81012e67 694 uint32_t time_0 = GetCountSspClk();
55eaed8f
MHS
695 uint32_t time_start = 0;
696 uint32_t time_stop = 0;
81012e67 697
cee5a30d 698 int div = 0;
699 //int div2 = 0;
700 int decbyte = 0;
701 int decbyter = 0;
702
703 // And now we loop, receiving samples.
704 for(;;) {
705 LED_A_ON();
706 WDT_HIT();
707 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
708 (DMA_BUFFER_SIZE-1);
709 if(behindBy > maxBehindBy) {
710 maxBehindBy = behindBy;
f71f4deb 711 if(behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
cee5a30d 712 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
713 goto done;
714 }
715 }
716 if(behindBy < 1) continue;
717
718 LED_A_OFF();
719 smpl = upTo[0];
720 upTo++;
721 lastRxCounter -= 1;
722 if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
723 upTo -= DMA_BUFFER_SIZE;
724 lastRxCounter += DMA_BUFFER_SIZE;
725 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
726 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
727 }
728
729 //samples += 4;
730 samples += 1;
cee5a30d 731
cee5a30d 732 if(smpl & 0xF) {
733 decbyte ^= (1 << (3 - div));
734 }
cee5a30d 735
736 // FOR READER SIDE COMMUMICATION...
17cba269 737
cee5a30d 738 decbyter <<= 2;
739 decbyter ^= (smpl & 0x30);
740
741 div++;
742
743 if((div + 1) % 2 == 0) {
744 smpl = decbyter;
1e262141 745 if(OutOfNDecoding((smpl & 0xF0) >> 4)) {
cee5a30d 746 rsamples = samples - Uart.samples;
55eaed8f 747 time_stop = (GetCountSspClk()-time_0) << 4;
cee5a30d 748 LED_C_ON();
17cba269 749
81012e67 750 //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,TRUE)) break;
17cba269 751 //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
6a1f2d82 752 if(tracing) {
753 uint8_t parity[MAX_PARITY_SIZE];
754 GetParity(Uart.output, Uart.byteCnt, parity);
55eaed8f 755 LogTrace(Uart.output,Uart.byteCnt, time_start, time_stop, parity, TRUE);
81012e67
MHS
756 }
757
17cba269
MHS
758
759 /* And ready to receive another command. */
cee5a30d 760 Uart.state = STATE_UNSYNCD;
761 /* And also reset the demod code, which might have been */
762 /* false-triggered by the commands from the reader. */
763 Demod.state = DEMOD_UNSYNCD;
764 LED_B_OFF();
765 Uart.byteCnt = 0;
55eaed8f
MHS
766 }else{
767 time_start = (GetCountSspClk()-time_0) << 4;
cee5a30d 768 }
769 decbyter = 0;
770 }
771
772 if(div > 3) {
773 smpl = decbyte;
774 if(ManchesterDecoding(smpl & 0x0F)) {
55eaed8f
MHS
775 time_stop = (GetCountSspClk()-time_0) << 4;
776
777 rsamples = samples - Demod.samples;
cee5a30d 778 LED_B_ON();
779
6a1f2d82 780 if(tracing) {
781 uint8_t parity[MAX_PARITY_SIZE];
782 GetParity(Demod.output, Demod.len, parity);
55eaed8f 783 LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, FALSE);
81012e67 784 }
17cba269 785
cee5a30d 786 // And ready to receive another response.
787 memset(&Demod, 0, sizeof(Demod));
17cba269 788 Demod.output = tagToReaderResponse;
cee5a30d 789 Demod.state = DEMOD_UNSYNCD;
790 LED_C_OFF();
55eaed8f
MHS
791 }else{
792 time_start = (GetCountSspClk()-time_0) << 4;
cee5a30d 793 }
794
795 div = 0;
796 decbyte = 0x00;
797 }
798 //}
799
800 if(BUTTON_PRESS()) {
801 DbpString("cancelled_a");
802 goto done;
803 }
804 }
805
806 DbpString("COMMAND FINISHED");
807
808 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
3000dc4e 809 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
cee5a30d 810
811done:
812 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
813 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
3000dc4e 814 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
cee5a30d 815 LED_A_OFF();
816 LED_B_OFF();
1e262141 817 LED_C_OFF();
818 LED_D_OFF();
819}
820
912a3e94 821void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
822 int i;
823 for(i = 0; i < 8; i++) {
824 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
1e262141 825 }
826}
827
828//-----------------------------------------------------------------------------
829// Wait for commands from reader
830// Stop when button is pressed
831// Or return TRUE when command is captured
832//-----------------------------------------------------------------------------
833static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen)
834{
912a3e94 835 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1e262141 836 // only, since we are receiving, not transmitting).
837 // Signal field is off with the appropriate LED
838 LED_D_OFF();
839 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
840
841 // Now run a `software UART' on the stream of incoming samples.
842 Uart.output = received;
843 Uart.byteCntMax = maxLen;
844 Uart.state = STATE_UNSYNCD;
845
846 for(;;) {
847 WDT_HIT();
848
849 if(BUTTON_PRESS()) return FALSE;
850
851 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
852 AT91C_BASE_SSC->SSC_THR = 0x00;
853 }
854 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
855 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
3fe4ff4f 856
1e262141 857 if(OutOfNDecoding(b & 0x0f)) {
858 *len = Uart.byteCnt;
859 return TRUE;
860 }
861 }
862 }
863}
864
645c960f
MHS
865static uint8_t encode4Bits(const uint8_t b)
866{
867 uint8_t c = b & 0xF;
868 // OTA, the least significant bits first
869 // The columns are
870 // 1 - Bit value to send
871 // 2 - Reversed (big-endian)
872 // 3 - Encoded
873 // 4 - Hex values
874
875 switch(c){
876 // 1 2 3 4
877 case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
878 case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
879 case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
880 case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
881 case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
882 case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
883 case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
884 case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
885 case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
886 case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
887 case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
888 case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
889 case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
890 case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
891 case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
892 default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
893
894 }
895}
1e262141 896
897//-----------------------------------------------------------------------------
898// Prepare tag messages
899//-----------------------------------------------------------------------------
900static void CodeIClassTagAnswer(const uint8_t *cmd, int len)
901{
645c960f
MHS
902
903 /*
904 * SOF comprises 3 parts;
905 * * An unmodulated time of 56.64 us
906 * * 24 pulses of 423.75 KHz (fc/32)
907 * * A logic 1, which starts with an unmodulated time of 18.88us
908 * followed by 8 pulses of 423.75kHz (fc/32)
909 *
910 *
911 * EOF comprises 3 parts:
912 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
913 * time of 18.88us.
914 * - 24 pulses of fc/32
915 * - An unmodulated time of 56.64 us
916 *
917 *
918 * A logic 0 starts with 8 pulses of fc/32
919 * followed by an unmodulated time of 256/fc (~18,88us).
920 *
921 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
922 * 8 pulses of fc/32 (also 18.88us)
923 *
924 * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag,
925 * works like this.
926 * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
927 * - A 0-bit inptu to the FPGA becomes an unmodulated time of 18.88us
928 *
6b038d19 929 * In this mode the SOF can be written as 00011101 = 0x1D
645c960f
MHS
930 * The EOF can be written as 10111000 = 0xb8
931 * A logic 1 is 01
932 * A logic 0 is 10
933 *
934 * */
935
1e262141 936 int i;
937
938 ToSendReset();
939
940 // Send SOF
645c960f 941 ToSend[++ToSendMax] = 0x1D;
1e262141 942
943 for(i = 0; i < len; i++) {
1e262141 944 uint8_t b = cmd[i];
645c960f
MHS
945 ToSend[++ToSendMax] = encode4Bits(b & 0xF); //Least significant half
946 ToSend[++ToSendMax] = encode4Bits((b >>4) & 0xF);//Most significant half
1e262141 947 }
948
949 // Send EOF
645c960f 950 ToSend[++ToSendMax] = 0xB8;
81012e67 951 //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
1e262141 952 // Convert from last byte pos to length
953 ToSendMax++;
954}
955
956// Only SOF
957static void CodeIClassTagSOF()
958{
81012e67
MHS
959 //So far a dummy implementation, not used
960 //int lastProxToAirDuration =0;
1e262141 961
81012e67 962 ToSendReset();
1e262141 963 // Send SOF
645c960f 964 ToSend[++ToSendMax] = 0x1D;
81012e67
MHS
965// lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
966
1e262141 967 // Convert from last byte pos to length
968 ToSendMax++;
969}
b67f7ec3
MHS
970#define MODE_SIM_CSN 0
971#define MODE_EXIT_AFTER_MAC 1
972#define MODE_FULLSIM 2
55eaed8f 973
b67f7ec3 974int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf);
ff7bb4ef
MHS
975/**
976 * @brief SimulateIClass simulates an iClass card.
977 * @param arg0 type of simulation
978 * - 0 uses the first 8 bytes in usb data as CSN
979 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
980 * in the usb data. This mode collects MAC from the reader, in order to do an offline
981 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
982 * - Other : Uses the default CSN (031fec8af7ff12e0)
983 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
984 * @param arg2
985 * @param datain
986 */
987void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain)
1e262141 988{
ff7bb4ef
MHS
989 uint32_t simType = arg0;
990 uint32_t numberOfCSNS = arg1;
7cc204bf 991 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1e262141 992
ff7bb4ef 993 // Enable and clear the trace
3000dc4e
MHS
994 set_tracing(TRUE);
995 clear_trace();
b67f7ec3
MHS
996 //Use the emulator memory for SIM
997 uint8_t *emulator = BigBuf_get_EM_addr();
81cd0474 998
ff7bb4ef
MHS
999 if(simType == 0) {
1000 // Use the CSN from commandline
b67f7ec3
MHS
1001 memcpy(emulator, datain, 8);
1002 doIClassSimulation(MODE_SIM_CSN,NULL);
ff7bb4ef
MHS
1003 }else if(simType == 1)
1004 {
b67f7ec3
MHS
1005 //Default CSN
1006 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1007 // Use the CSN from commandline
1008 memcpy(emulator, csn_crc, 8);
1009 doIClassSimulation(MODE_SIM_CSN,NULL);
ff7bb4ef
MHS
1010 }
1011 else if(simType == 2)
1012 {
9f6e9d15 1013
7b941c8d 1014 uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
eabba3df 1015 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
ff7bb4ef
MHS
1016 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1017 // in order to collect MAC's from the reader. This can later be used in an offlne-attack
1018 // in order to obtain the keys, as in the "dismantling iclass"-paper.
9f6e9d15
MHS
1019 int i = 0;
1020 for( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++)
ff7bb4ef
MHS
1021 {
1022 // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
1023
b67f7ec3
MHS
1024 memcpy(emulator, datain+(i*8), 8);
1025 if(doIClassSimulation(MODE_EXIT_AFTER_MAC,mac_responses+i*8))
f83cc126 1026 {
645c960f 1027 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
f83cc126
MHS
1028 return; // Button pressed
1029 }
ff7bb4ef 1030 }
9f6e9d15
MHS
1031 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1032
b67f7ec3
MHS
1033 }else if(simType == 3){
1034 //This is 'full sim' mode, where we use the emulator storage for data.
1035 doIClassSimulation(MODE_FULLSIM, NULL);
81012e67
MHS
1036 }
1037 else{
ff7bb4ef
MHS
1038 // We may want a mode here where we hardcode the csns to use (from proxclone).
1039 // That will speed things up a little, but not required just yet.
1040 Dbprintf("The mode is not implemented, reserved for future use");
1041 }
9f6e9d15 1042 Dbprintf("Done...");
ff7bb4ef
MHS
1043
1044}
b67f7ec3 1045
ff7bb4ef
MHS
1046/**
1047 * @brief Does the actual simulation
1048 * @param csn - csn to use
1049 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
1050 */
b67f7ec3 1051int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
ff7bb4ef 1052{
b67f7ec3
MHS
1053 // free eventually allocated BigBuf memory
1054 BigBuf_free_keep_EM();
55eaed8f 1055
61fe9073
MHS
1056 State cipher_state;
1057// State cipher_state_reserve;
b67f7ec3
MHS
1058 uint8_t *csn = BigBuf_get_EM_addr();
1059 uint8_t *emulator = csn;
1060 uint8_t sof_data[] = { 0x0F} ;
1e262141 1061 // CSN followed by two CRC bytes
b67f7ec3
MHS
1062 uint8_t anticoll_data[10] = { 0 };
1063 uint8_t csn_data[10] = { 0 };
1064 memcpy(csn_data,csn,sizeof(csn_data));
f83cc126 1065 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1e262141 1066
1e262141 1067 // Construct anticollision-CSN
b67f7ec3 1068 rotateCSN(csn_data,anticoll_data);
1e262141 1069
1070 // Compute CRC on both CSNs
b67f7ec3
MHS
1071 ComputeCrc14443(CRC_ICLASS, anticoll_data, 8, &anticoll_data[8], &anticoll_data[9]);
1072 ComputeCrc14443(CRC_ICLASS, csn_data, 8, &csn_data[8], &csn_data[9]);
1073
61fe9073
MHS
1074 //The diversified key should be stored on block 3
1075 uint8_t diversified_key[8] = { 0 };
1076 //Get the diversified key from emulator memory
1077 memcpy(diversified_key, emulator+(8*3),8);
b67f7ec3
MHS
1078 // e-Purse
1079 uint8_t card_challenge_data[8] = { 0x00 };
1080 if(simulationMode == MODE_FULLSIM)
1081 {
1082 //Card challenge, a.k.a e-purse is on block 2
1083 memcpy(card_challenge_data,emulator + (8 * 2) , 8);
61fe9073
MHS
1084 //Precalculate the cipher state, feeding it the CC
1085 opt_doTagMAC_1(card_challenge_data,diversified_key);
b67f7ec3 1086 }
1e262141 1087
ff7bb4ef 1088 int exitLoop = 0;
1e262141 1089 // Reader 0a
1090 // Tag 0f
1091 // Reader 0c
1092 // Tag anticoll. CSN
1093 // Reader 81 anticoll. CSN
1094 // Tag CSN
1095
55eaed8f 1096 uint8_t *modulated_response;
b19caaef 1097 int modulated_response_size = 0;
55eaed8f
MHS
1098 uint8_t* trace_data = NULL;
1099 int trace_data_size = 0;
1e262141 1100
b67f7ec3 1101
645c960f 1102 // Respond SOF -- takes 1 bytes
b67f7ec3
MHS
1103 uint8_t *resp_sof = BigBuf_malloc(2);
1104 int resp_sof_Len;
1e262141 1105
1106 // Anticollision CSN (rotated CSN)
645c960f 1107 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
b67f7ec3
MHS
1108 uint8_t *resp_anticoll = BigBuf_malloc(28);
1109 int resp_anticoll_len;
1e262141 1110
1111 // CSN
645c960f 1112 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
b67f7ec3
MHS
1113 uint8_t *resp_csn = BigBuf_malloc(30);
1114 int resp_csn_len;
1e262141 1115
1116 // e-Purse
b3cc5f29 1117 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
b67f7ec3
MHS
1118 uint8_t *resp_cc = BigBuf_malloc(20);
1119 int resp_cc_len;
1e262141 1120
f71f4deb 1121 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
6a1f2d82 1122 memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
1e262141 1123 int len;
1124
1e262141 1125 // Prepare card messages
1126 ToSendMax = 0;
1127
1128 // First card answer: SOF
1129 CodeIClassTagSOF();
b67f7ec3 1130 memcpy(resp_sof, ToSend, ToSendMax); resp_sof_Len = ToSendMax;
1e262141 1131
1132 // Anticollision CSN
b67f7ec3
MHS
1133 CodeIClassTagAnswer(anticoll_data, sizeof(anticoll_data));
1134 memcpy(resp_anticoll, ToSend, ToSendMax); resp_anticoll_len = ToSendMax;
1e262141 1135
1136 // CSN
b67f7ec3
MHS
1137 CodeIClassTagAnswer(csn_data, sizeof(csn_data));
1138 memcpy(resp_csn, ToSend, ToSendMax); resp_csn_len = ToSendMax;
1e262141 1139
1140 // e-Purse
b67f7ec3
MHS
1141 CodeIClassTagAnswer(card_challenge_data, sizeof(card_challenge_data));
1142 memcpy(resp_cc, ToSend, ToSendMax); resp_cc_len = ToSendMax;
1e262141 1143
b19caaef 1144 //This is used for responding to READ-block commands or other data which is dynamically generated
b67f7ec3 1145 uint8_t *data_response = BigBuf_malloc(8 * 2 + 2);
b19caaef
MHS
1146 //This is used for responding to READ-block commands or other data which is dynamically generated
1147 uint8_t *data_generic_trace = BigBuf_malloc(8 * 2 + 2);
e3dc1e4c
MHS
1148
1149 // Start from off (no field generated)
fa541aca
MHS
1150 //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1151 //SpinDelay(200);
1152 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1153 SpinDelay(100);
1154 StartCountSspClk();
1e262141 1155 // We need to listen to the high-frequency, peak-detected path.
1156 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1157 FpgaSetupSsc();
1158
1159 // To control where we are in the protocol
1e262141 1160 int cmdsRecvd = 0;
81012e67
MHS
1161 uint32_t time_0 = GetCountSspClk();
1162 uint32_t t2r_time =0;
1163 uint32_t r2t_time =0;
912a3e94 1164
1e262141 1165 LED_A_ON();
f83cc126 1166 bool buttonPressed = false;
9f6e9d15 1167
ff7bb4ef 1168 while(!exitLoop) {
81012e67 1169
1e262141 1170 LED_B_OFF();
e3dc1e4c
MHS
1171 //Signal tracer
1172 // Can be used to get a trigger for an oscilloscope..
1173 LED_C_OFF();
3fe4ff4f 1174
1e262141 1175 if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
f83cc126 1176 buttonPressed = true;
1e262141 1177 break;
81cd0474 1178 }
81012e67 1179 r2t_time = GetCountSspClk();
e3dc1e4c
MHS
1180 //Signal tracer
1181 LED_C_ON();
1e262141 1182
81cd0474 1183 // Okay, look at the command now.
b67f7ec3 1184 if(receivedCmd[0] == ICLASS_CMD_ACTALL ) {
1e262141 1185 // Reader in anticollission phase
b67f7ec3
MHS
1186 modulated_response = resp_sof; modulated_response_size = resp_sof_Len; //order = 1;
1187 trace_data = sof_data;
1188 trace_data_size = sizeof(sof_data);
1189 } else if(receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) {
1e262141 1190 // Reader asks for anticollission CSN
b67f7ec3
MHS
1191 modulated_response = resp_anticoll; modulated_response_size = resp_anticoll_len; //order = 2;
1192 trace_data = anticoll_data;
1193 trace_data_size = sizeof(anticoll_data);
1e262141 1194 //DbpString("Reader requests anticollission CSN:");
b67f7ec3 1195 } else if(receivedCmd[0] == ICLASS_CMD_SELECT) {
1e262141 1196 // Reader selects anticollission CSN.
1197 // Tag sends the corresponding real CSN
b67f7ec3
MHS
1198 modulated_response = resp_csn; modulated_response_size = resp_csn_len; //order = 3;
1199 trace_data = csn_data;
1200 trace_data_size = sizeof(csn_data);
1e262141 1201 //DbpString("Reader selects anticollission CSN:");
b67f7ec3 1202 } else if(receivedCmd[0] == ICLASS_CMD_READCHECK_KD) {
1e262141 1203 // Read e-purse (88 02)
b67f7ec3
MHS
1204 modulated_response = resp_cc; modulated_response_size = resp_cc_len; //order = 4;
1205 trace_data = card_challenge_data;
1206 trace_data_size = sizeof(card_challenge_data);
1e262141 1207 LED_B_ON();
b67f7ec3 1208 } else if(receivedCmd[0] == ICLASS_CMD_CHECK) {
1e262141 1209 // Reader random and reader MAC!!!
b67f7ec3 1210 if(simulationMode == MODE_FULLSIM)
61fe9073
MHS
1211 {
1212 //NR, from reader, is in receivedCmd +1
1213 opt_doTagMAC_2(cipher_state,receivedCmd+1,data_generic_trace,diversified_key);
1214
b19caaef 1215 trace_data = data_generic_trace;
b67f7ec3
MHS
1216 trace_data_size = 4;
1217 CodeIClassTagAnswer(trace_data , trace_data_size);
1218 memcpy(data_response, ToSend, ToSendMax);
1219 modulated_response = data_response;
1220 modulated_response_size = ToSendMax;
10a8875c 1221 //exitLoop = true;
b67f7ec3
MHS
1222 }else
1223 { //Not fullsim, we don't respond
1224 // We do not know what to answer, so lets keep quiet
1225 modulated_response = resp_sof; modulated_response_size = 0;
1226 trace_data = NULL;
1227 trace_data_size = 0;
1228 if (simulationMode == MODE_EXIT_AFTER_MAC){
1229 // dbprintf:ing ...
1230 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x"
1231 ,csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1232 Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len,
1233 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1234 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1235 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1236 if (reader_mac_buf != NULL)
1237 {
1238 memcpy(reader_mac_buf,receivedCmd+1,8);
1239 }
1240 exitLoop = true;
9f6e9d15 1241 }
ff7bb4ef 1242 }
b67f7ec3
MHS
1243
1244 } else if(receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
1e262141 1245 // Reader ends the session
b67f7ec3 1246 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
55eaed8f
MHS
1247 trace_data = NULL;
1248 trace_data_size = 0;
b67f7ec3
MHS
1249 } else if(simulationMode == MODE_FULLSIM && receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4){
1250 //Read block
1251 uint16_t blk = receivedCmd[1];
1252 trace_data = emulator+(blk << 3);
1253 trace_data_size = 8;
1254 CodeIClassTagAnswer(trace_data , trace_data_size);
1255 memcpy(data_response, ToSend, ToSendMax);
1256 modulated_response = data_response;
1257 modulated_response_size = ToSendMax;
1258 }
b19caaef
MHS
1259 else if(receivedCmd[0] == ICLASS_CMD_PAGESEL)
1260 {//Pagesel
1261 //Pagesel enables to select a page in the selected chip memory and return its configuration block
1262 //Chips with a single page will not answer to this command
1263 // It appears we're fine ignoring this.
1264 //Otherwise, we should answer 8bytes (block) + 2bytes CRC
1265 }
b67f7ec3 1266 else {
17cba269 1267 //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
1e262141 1268 // Never seen this command before
1269 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1270 len,
1271 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1272 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1273 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1274 // Do not respond
b67f7ec3 1275 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
55eaed8f
MHS
1276 trace_data = NULL;
1277 trace_data_size = 0;
1e262141 1278 }
1279
81012e67
MHS
1280 if(cmdsRecvd > 100) {
1281 //DbpString("100 commands later...");
9f6e9d15 1282 //break;
1e262141 1283 }
1284 else {
1285 cmdsRecvd++;
1286 }
55eaed8f 1287 /**
6b038d19 1288 A legit tag has about 380us delay between reader EOT and tag SOF.
55eaed8f
MHS
1289 **/
1290 if(modulated_response_size > 0) {
645c960f 1291 SendIClassAnswer(modulated_response, modulated_response_size, 1);
81012e67 1292 t2r_time = GetCountSspClk();
81cd0474 1293 }
f83cc126 1294
81cd0474 1295 if (tracing) {
6a1f2d82 1296 uint8_t parity[MAX_PARITY_SIZE];
1297 GetParity(receivedCmd, len, parity);
1298 LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, (r2t_time-time_0) << 4, parity, TRUE);
17cba269 1299
55eaed8f
MHS
1300 if (trace_data != NULL) {
1301 GetParity(trace_data, trace_data_size, parity);
1302 LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, FALSE);
17cba269 1303 }
81012e67
MHS
1304 if(!tracing) {
1305 DbpString("Trace full");
1306 //break;
1307 }
1308
81cd0474 1309 }
6a1f2d82 1310 memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
81cd0474 1311 }
1e262141 1312
9f6e9d15 1313 //Dbprintf("%x", cmdsRecvd);
1e262141 1314 LED_A_OFF();
1315 LED_B_OFF();
7b941c8d
MHS
1316 LED_C_OFF();
1317
f83cc126
MHS
1318 if(buttonPressed)
1319 {
1320 DbpString("Button pressed");
1321 }
f83cc126 1322 return buttonPressed;
1e262141 1323}
1324
1325static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
1326{
e3dc1e4c 1327 int i = 0, d=0;//, u = 0, d = 0;
1e262141 1328 uint8_t b = 0;
e3dc1e4c 1329
645c960f
MHS
1330 //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
1331 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
e3dc1e4c 1332
1e262141 1333 AT91C_BASE_SSC->SSC_THR = 0x00;
1334 FpgaSetupSsc();
e3dc1e4c
MHS
1335 while(!BUTTON_PRESS()) {
1336 if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
1337 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1e262141 1338 }
e3dc1e4c
MHS
1339 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
1340 b = 0x00;
1e262141 1341 if(d < delay) {
1e262141 1342 d++;
1343 }
e3dc1e4c
MHS
1344 else {
1345 if( i < respLen){
1346 b = resp[i];
1347 //Hack
1348 //b = 0xAC;
1349 }
1350 i++;
1e262141 1351 }
1352 AT91C_BASE_SSC->SSC_THR = b;
1e262141 1353 }
e3dc1e4c 1354
645c960f
MHS
1355// if (i > respLen +4) break;
1356 if (i > respLen +1) break;
1e262141 1357 }
1358
1359 return 0;
1360}
1361
1362/// THE READER CODE
1363
1364//-----------------------------------------------------------------------------
1365// Transmit the command (to the tag) that was placed in ToSend[].
1366//-----------------------------------------------------------------------------
1367static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait)
1368{
1369 int c;
1e262141 1370 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1371 AT91C_BASE_SSC->SSC_THR = 0x00;
1372 FpgaSetupSsc();
1373
1374 if (wait)
2ed270a8
MHS
1375 {
1376 if(*wait < 10) *wait = 10;
1377
1378 for(c = 0; c < *wait;) {
1379 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1380 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1381 c++;
1382 }
1383 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1384 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1385 (void)r;
1386 }
1387 WDT_HIT();
1388 }
1389
1390 }
1e262141 1391
1e262141 1392
1393 uint8_t sendbyte;
1394 bool firstpart = TRUE;
1395 c = 0;
1396 for(;;) {
1397 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1398
1399 // DOUBLE THE SAMPLES!
1400 if(firstpart) {
1401 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1402 }
1403 else {
1404 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1405 c++;
1406 }
1407 if(sendbyte == 0xff) {
1408 sendbyte = 0xfe;
1409 }
1410 AT91C_BASE_SSC->SSC_THR = sendbyte;
1411 firstpart = !firstpart;
1412
1413 if(c >= len) {
1414 break;
1415 }
1416 }
1417 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1418 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1419 (void)r;
1420 }
1421 WDT_HIT();
1422 }
1423 if (samples) *samples = (c + *wait) << 3;
1424}
1425
1426
1427//-----------------------------------------------------------------------------
1428// Prepare iClass reader command to send to FPGA
1429//-----------------------------------------------------------------------------
1430void CodeIClassCommand(const uint8_t * cmd, int len)
1431{
1432 int i, j, k;
1433 uint8_t b;
1434
1435 ToSendReset();
1436
1437 // Start of Communication: 1 out of 4
1438 ToSend[++ToSendMax] = 0xf0;
1439 ToSend[++ToSendMax] = 0x00;
1440 ToSend[++ToSendMax] = 0x0f;
1441 ToSend[++ToSendMax] = 0x00;
1442
1443 // Modulate the bytes
1444 for (i = 0; i < len; i++) {
1445 b = cmd[i];
1446 for(j = 0; j < 4; j++) {
1447 for(k = 0; k < 4; k++) {
e3dc1e4c
MHS
1448 if(k == (b & 3)) {
1449 ToSend[++ToSendMax] = 0x0f;
1450 }
1451 else {
1452 ToSend[++ToSendMax] = 0x00;
1453 }
1e262141 1454 }
1455 b >>= 2;
1456 }
1457 }
1458
1459 // End of Communication
1460 ToSend[++ToSendMax] = 0x00;
1461 ToSend[++ToSendMax] = 0x00;
1462 ToSend[++ToSendMax] = 0xf0;
1463 ToSend[++ToSendMax] = 0x00;
1464
1465 // Convert from last character reference to length
1466 ToSendMax++;
1467}
1468
1469void ReaderTransmitIClass(uint8_t* frame, int len)
1470{
6a1f2d82 1471 int wait = 0;
1472 int samples = 0;
1473
1474 // This is tied to other size changes
6a1f2d82 1475 CodeIClassCommand(frame,len);
1476
1477 // Select the card
1478 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1479 if(trigger)
1480 LED_A_ON();
1481
1482 // Store reader command in buffer
1483 if (tracing) {
1484 uint8_t par[MAX_PARITY_SIZE];
1485 GetParity(frame, len, par);
1486 LogTrace(frame, len, rsamples, rsamples, par, TRUE);
1487 }
1e262141 1488}
1489
1490//-----------------------------------------------------------------------------
1491// Wait a certain time for tag response
1492// If a response is captured return TRUE
1493// If it takes too long return FALSE
1494//-----------------------------------------------------------------------------
1495static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1496{
1497 // buffer needs to be 512 bytes
1498 int c;
1499
1500 // Set FPGA mode to "reader listen mode", no modulation (listen
1501 // only, since we are receiving, not transmitting).
1502 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1503
1504 // Now get the answer from the card
1505 Demod.output = receivedResponse;
1506 Demod.len = 0;
1507 Demod.state = DEMOD_UNSYNCD;
1508
1509 uint8_t b;
1510 if (elapsed) *elapsed = 0;
1511
1512 bool skip = FALSE;
1513
1514 c = 0;
1515 for(;;) {
1516 WDT_HIT();
1517
1518 if(BUTTON_PRESS()) return FALSE;
1519
1520 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1521 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1522 if (elapsed) (*elapsed)++;
1523 }
1524 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1525 if(c < timeout) { c++; } else { return FALSE; }
1526 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1527 skip = !skip;
1528 if(skip) continue;
3fe4ff4f 1529
1e262141 1530 if(ManchesterDecoding(b & 0x0f)) {
1531 *samples = c << 3;
1532 return TRUE;
1533 }
1534 }
1535 }
1536}
1537
1538int ReaderReceiveIClass(uint8_t* receivedAnswer)
1539{
1540 int samples = 0;
1541 if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return FALSE;
7bc95e2e 1542 rsamples += samples;
6a1f2d82 1543 if (tracing) {
1544 uint8_t parity[MAX_PARITY_SIZE];
1545 GetParity(receivedAnswer, Demod.len, parity);
1546 LogTrace(receivedAnswer,Demod.len,rsamples,rsamples,parity,FALSE);
1547 }
1e262141 1548 if(samples == 0) return FALSE;
1549 return Demod.len;
1550}
1551
aa41c605
MHS
1552void setupIclassReader()
1553{
1554 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1555 // Reset trace buffer
3000dc4e
MHS
1556 set_tracing(TRUE);
1557 clear_trace();
aa41c605
MHS
1558
1559 // Setup SSC
1560 FpgaSetupSsc();
1561 // Start from off (no field generated)
1562 // Signal field is off with the appropriate LED
1563 LED_D_OFF();
1564 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1565 SpinDelay(200);
1566
1567 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1568
1569 // Now give it time to spin up.
1570 // Signal field is on with the appropriate LED
1571 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1572 SpinDelay(200);
1573 LED_A_ON();
1574
1575}
1576
c8dd9b09
MHS
1577size_t sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, uint8_t expected_size, uint8_t retries)
1578{
1579 while(retries-- > 0)
1580 {
1581 ReaderTransmitIClass(command, cmdsize);
1582 if(expected_size == ReaderReceiveIClass(resp)){
1583 return 0;
1584 }
1585 }
1586 return 1;//Error
1587}
1588
1589/**
1590 * @brief Talks to an iclass tag, sends the commands to get CSN and CC.
1591 * @param card_data where the CSN and CC are stored for return
1592 * @return 0 = fail
1593 * 1 = Got CSN
1594 * 2 = Got CSN and CC
1595 */
1596uint8_t handshakeIclassTag(uint8_t *card_data)
1597{
1598 static uint8_t act_all[] = { 0x0a };
1599 static uint8_t identify[] = { 0x0c };
1600 static uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1601 static uint8_t readcheck_cc[]= { 0x88, 0x02 };
f71f4deb 1602 uint8_t resp[ICLASS_BUFFER_SIZE];
c8dd9b09
MHS
1603
1604 uint8_t read_status = 0;
1605
1606 // Send act_all
1607 ReaderTransmitIClass(act_all, 1);
1608 // Card present?
1609 if(!ReaderReceiveIClass(resp)) return read_status;//Fail
1610 //Send Identify
1611 ReaderTransmitIClass(identify, 1);
1612 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1613 uint8_t len = ReaderReceiveIClass(resp);
1614 if(len != 10) return read_status;//Fail
1615
1616 //Copy the Anti-collision CSN to our select-packet
1617 memcpy(&select[1],resp,8);
1618 //Select the card
1619 ReaderTransmitIClass(select, sizeof(select));
1620 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1621 len = ReaderReceiveIClass(resp);
1622 if(len != 10) return read_status;//Fail
1623
1624 //Success - level 1, we got CSN
1625 //Save CSN in response data
1626 memcpy(card_data,resp,8);
1627
1628 //Flag that we got to at least stage 1, read CSN
1629 read_status = 1;
1630
1631 // Card selected, now read e-purse (cc)
1632 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1633 if(ReaderReceiveIClass(resp) == 8) {
1634 //Save CC (e-purse) in response data
1635 memcpy(card_data+8,resp,8);
1636
1637 //Got both
1638 read_status = 2;
1639 }
1640
1641 return read_status;
1642}
1643
1e262141 1644// Reader iClass Anticollission
1645void ReaderIClass(uint8_t arg0) {
1e262141 1646
aa41c605
MHS
1647 uint8_t card_data[24]={0};
1648 uint8_t last_csn[8]={0};
6a1f2d82 1649
aa41c605
MHS
1650 int read_status= 0;
1651 bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE;
c8dd9b09 1652 bool get_cc = arg0 & FLAG_ICLASS_READER_GET_CC;
3000dc4e 1653 set_tracing(TRUE);
aa41c605 1654 setupIclassReader();
1e262141 1655
aa41c605
MHS
1656 size_t datasize = 0;
1657 while(!BUTTON_PRESS())
1658 {
1e262141 1659
3000dc4e 1660 if(!tracing) {
c8dd9b09
MHS
1661 DbpString("Trace full");
1662 break;
1663 }
1664 WDT_HIT();
4ab4336a 1665
c8dd9b09 1666 read_status = handshakeIclassTag(card_data);
2e9d4b3f 1667
c8dd9b09
MHS
1668 if(read_status == 0) continue;
1669 if(read_status == 1) datasize = 8;
1670 if(read_status == 2) datasize = 16;
1671
b67f7ec3
MHS
1672 //Todo, read the public blocks 1,5 aswell:
1673 //
1674 // 0 : CSN (we already have)
1675 // 1 : Configuration
1676 // 2 : e-purse (we already have)
1677 // (3,4 write-only)
1678 // 5 Application issuer area
1679 //
1680 //Then we can 'ship' back the 8 * 5 bytes of data,
1681 // with 0xFF:s in block 3 and 4.
1682
c8dd9b09
MHS
1683 LED_B_ON();
1684 //Send back to client, but don't bother if we already sent this
1685 if(memcmp(last_csn, card_data, 8) != 0)
1686 {
2e9d4b3f 1687
c8dd9b09
MHS
1688 if(!get_cc || (get_cc && read_status == 2))
1689 {
1690 cmd_send(CMD_ACK,read_status,0,0,card_data,datasize);
1691 if(abort_after_read) {
1692 LED_A_OFF();
1693 return;
1694 }
1695 //Save that we already sent this....
1696 memcpy(last_csn, card_data, 8);
1697 }
1698 //If 'get_cc' was specified and we didn't get a CC, we'll just keep trying...
1699 }
1700 LED_B_OFF();
1701 }
1702 cmd_send(CMD_ACK,0,0,0,card_data, 0);
aa41c605 1703 LED_A_OFF();
cee5a30d 1704}
1705
c3963755 1706void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
c8dd9b09 1707
cb29e00a 1708 uint8_t card_data[USB_CMD_DATA_SIZE]={0};
39d3ce5d
MHS
1709 uint16_t block_crc_LUT[255] = {0};
1710
1711 {//Generate a lookup table for block crc
1712 for(int block = 0; block < 255; block++){
1713 char bl = block;
1714 block_crc_LUT[block] = iclass_crc16(&bl ,1);
1715 }
1716 }
1717 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
c8dd9b09 1718
c3963755 1719 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1720 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1721
fecd8202 1722 uint16_t crc = 0;
c3963755 1723 uint8_t cardsize=0;
c3963755 1724 uint8_t mem=0;
1725
1726 static struct memory_t{
1727 int k16;
1728 int book;
1729 int k2;
1730 int lockauth;
1731 int keyaccess;
1732 } memory;
1733
f71f4deb 1734 uint8_t resp[ICLASS_BUFFER_SIZE];
6a1f2d82 1735
9b82de75 1736 setupIclassReader();
3000dc4e 1737 set_tracing(TRUE);
c3963755 1738
c8dd9b09 1739 while(!BUTTON_PRESS()) {
c3963755 1740
39d3ce5d
MHS
1741 WDT_HIT();
1742
3000dc4e 1743 if(!tracing) {
c3963755 1744 DbpString("Trace full");
1745 break;
1746 }
1747
c8dd9b09
MHS
1748 uint8_t read_status = handshakeIclassTag(card_data);
1749 if(read_status < 2) continue;
1750
1751 //for now replay captured auth (as cc not updated)
1752 memcpy(check+5,MAC,4);
1753
1754 if(sendCmdGetResponseWithRetries(check, sizeof(check),resp, 4, 5))
1755 {
1756 Dbprintf("Error: Authentication Fail!");
1757 continue;
1758 }
1759
39d3ce5d
MHS
1760 //first get configuration block (block 1)
1761 crc = block_crc_LUT[1];
c8dd9b09 1762 read[1]=1;
c8dd9b09
MHS
1763 read[2] = crc >> 8;
1764 read[3] = crc & 0xff;
1765
1766 if(sendCmdGetResponseWithRetries(read, sizeof(read),resp, 10, 10))
1767 {
39d3ce5d 1768 Dbprintf("Dump config (block 1) failed");
c8dd9b09
MHS
1769 continue;
1770 }
1771
1772 mem=resp[5];
1773 memory.k16= (mem & 0x80);
1774 memory.book= (mem & 0x20);
1775 memory.k2= (mem & 0x8);
1776 memory.lockauth= (mem & 0x2);
1777 memory.keyaccess= (mem & 0x1);
1778
1779 cardsize = memory.k16 ? 255 : 32;
1780 WDT_HIT();
cb29e00a
MHS
1781 //Set card_data to all zeroes, we'll fill it with data
1782 memset(card_data,0x0,USB_CMD_DATA_SIZE);
1783 uint8_t failedRead =0;
428d6221 1784 uint32_t stored_data_length =0;
c8dd9b09 1785 //then loop around remaining blocks
39d3ce5d 1786 for(int block=0; block < cardsize; block++){
c8dd9b09
MHS
1787
1788 read[1]= block;
39d3ce5d 1789 crc = block_crc_LUT[block];
c8dd9b09
MHS
1790 read[2] = crc >> 8;
1791 read[3] = crc & 0xff;
1792
1793 if(!sendCmdGetResponseWithRetries(read, sizeof(read), resp, 10, 10))
1794 {
1795 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1796 block, resp[0], resp[1], resp[2],
1797 resp[3], resp[4], resp[5],
1798 resp[6], resp[7]);
1799
cb29e00a
MHS
1800 //Fill up the buffer
1801 memcpy(card_data+stored_data_length,resp,8);
1802 stored_data_length += 8;
cb29e00a
MHS
1803 if(stored_data_length +8 > USB_CMD_DATA_SIZE)
1804 {//Time to send this off and start afresh
1805 cmd_send(CMD_ACK,
1806 stored_data_length,//data length
1807 failedRead,//Failed blocks?
1808 0,//Not used ATM
1809 card_data, stored_data_length);
1810 //reset
1811 stored_data_length = 0;
1812 failedRead = 0;
1813 }
1814
c8dd9b09 1815 }else{
cb29e00a
MHS
1816 failedRead = 1;
1817 stored_data_length +=8;//Otherwise, data becomes misaligned
c8dd9b09 1818 Dbprintf("Failed to dump block %d", block);
c3963755 1819 }
1820 }
428d6221 1821
cb29e00a
MHS
1822 //Send off any remaining data
1823 if(stored_data_length > 0)
1824 {
1825 cmd_send(CMD_ACK,
1826 stored_data_length,//data length
1827 failedRead,//Failed blocks?
1828 0,//Not used ATM
1829 card_data, stored_data_length);
1830 }
c8dd9b09
MHS
1831 //If we got here, let's break
1832 break;
c3963755 1833 }
cb29e00a
MHS
1834 //Signal end of transmission
1835 cmd_send(CMD_ACK,
1836 0,//data length
1837 0,//Failed blocks?
1838 0,//Not used ATM
1839 card_data, 0);
1840
c3963755 1841 LED_A_OFF();
1842}
1843
fecd8202 1844//2. Create Read method (cut-down from above) based off responses from 1.
1845// Since we have the MAC could continue to use replay function.
1846//3. Create Write method
1847/*
1848void IClass_iso14443A_write(uint8_t arg0, uint8_t blockNo, uint8_t *data, uint8_t *MAC) {
1849 uint8_t act_all[] = { 0x0a };
1850 uint8_t identify[] = { 0x0c };
1851 uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1852 uint8_t readcheck_cc[]= { 0x88, 0x02 };
1853 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1854 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1855 uint8_t write[] = { 0x87, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1856
1857 uint16_t crc = 0;
1858
6a1f2d82 1859 uint8_t* resp = (((uint8_t *)BigBuf) + 3560);
912a3e94 1860
fecd8202 1861 // Reset trace buffer
1862 memset(trace, 0x44, RECV_CMD_OFFSET);
1863 traceLen = 0;
1864
1865 // Setup SSC
1866 FpgaSetupSsc();
1867 // Start from off (no field generated)
1868 // Signal field is off with the appropriate LED
1869 LED_D_OFF();
1870 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1871 SpinDelay(200);
1872
1873 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1874
1875 // Now give it time to spin up.
1876 // Signal field is on with the appropriate LED
1877 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1878 SpinDelay(200);
1879
1880 LED_A_ON();
1881
1882 for(int i=0;i<1;i++) {
1883
1884 if(traceLen > TRACE_SIZE) {
1885 DbpString("Trace full");
1886 break;
1887 }
1888
1889 if (BUTTON_PRESS()) break;
1890
1891 // Send act_all
1892 ReaderTransmitIClass(act_all, 1);
1893 // Card present?
1894 if(ReaderReceiveIClass(resp)) {
1895 ReaderTransmitIClass(identify, 1);
1896 if(ReaderReceiveIClass(resp) == 10) {
1897 // Select card
1898 memcpy(&select[1],resp,8);
1899 ReaderTransmitIClass(select, sizeof(select));
1900
1901 if(ReaderReceiveIClass(resp) == 10) {
1902 Dbprintf(" Selected CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1903 resp[0], resp[1], resp[2],
1904 resp[3], resp[4], resp[5],
1905 resp[6], resp[7]);
1906 }
1907 // Card selected
1908 Dbprintf("Readcheck on Sector 2");
1909 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1910 if(ReaderReceiveIClass(resp) == 8) {
1911 Dbprintf(" CC: %02x %02x %02x %02x %02x %02x %02x %02x",
1912 resp[0], resp[1], resp[2],
1913 resp[3], resp[4], resp[5],
1914 resp[6], resp[7]);
1915 }else return;
1916 Dbprintf("Authenticate");
1917 //for now replay captured auth (as cc not updated)
1918 memcpy(check+5,MAC,4);
1919 Dbprintf(" AA: %02x %02x %02x %02x",
1920 check[5], check[6], check[7],check[8]);
1921 ReaderTransmitIClass(check, sizeof(check));
1922 if(ReaderReceiveIClass(resp) == 4) {
1923 Dbprintf(" AR: %02x %02x %02x %02x",
1924 resp[0], resp[1], resp[2],resp[3]);
1925 }else {
1926 Dbprintf("Error: Authentication Fail!");
1927 return;
1928 }
1929 Dbprintf("Write Block");
1930
1931 //read configuration for max block number
1932 read_success=false;
1933 read[1]=1;
1934 uint8_t *blockno=&read[1];
1935 crc = iclass_crc16((char *)blockno,1);
1936 read[2] = crc >> 8;
1937 read[3] = crc & 0xff;
1938 while(!read_success){
1939 ReaderTransmitIClass(read, sizeof(read));
1940 if(ReaderReceiveIClass(resp) == 10) {
1941 read_success=true;
1942 mem=resp[5];
1943 memory.k16= (mem & 0x80);
1944 memory.book= (mem & 0x20);
1945 memory.k2= (mem & 0x8);
1946 memory.lockauth= (mem & 0x2);
1947 memory.keyaccess= (mem & 0x1);
1948
1949 }
1950 }
1951 if (memory.k16){
1952 cardsize=255;
1953 }else cardsize=32;
1954 //check card_size
1955
1956 memcpy(write+1,blockNo,1);
1957 memcpy(write+2,data,8);
1958 memcpy(write+10,mac,4);
1959 while(!send_success){
1960 ReaderTransmitIClass(write, sizeof(write));
1961 if(ReaderReceiveIClass(resp) == 10) {
1962 write_success=true;
1963 }
1964 }//
1965 }
1966 WDT_HIT();
1967 }
1968
1969 LED_A_OFF();
1970}*/
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