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fix issue #103: revert type change. Samples from FPGA are signed.
[proxmark3-svn] / armsrc / iso14443b.c
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15c4dc5a 1//-----------------------------------------------------------------------------
bd20f8f4 2// Jonathan Westhues, split Nov 2006
3//
4// This code is licensed to you under the terms of the GNU GPL, version 2 or,
5// at your option, any later version. See the LICENSE.txt file for the text of
6// the license.
7//-----------------------------------------------------------------------------
15c4dc5a 8// Routines to support ISO 14443. This includes both the reader software and
9// the `fake tag' modes. At the moment only the Type B modulation is
10// supported.
15c4dc5a 11//-----------------------------------------------------------------------------
bd20f8f4 12
e30c654b 13#include "proxmark3.h"
15c4dc5a 14#include "apps.h"
f7e3ed82 15#include "util.h"
9ab7a6c7 16#include "string.h"
15c4dc5a 17
f7e3ed82 18#include "iso14443crc.h"
15c4dc5a 19
f7e3ed82 20//static void GetSamplesFor14443(int weTx, int n);
15c4dc5a 21
aeadbdb2 22/*#define DEMOD_TRACE_SIZE 4096
15c4dc5a 23#define READER_TAG_BUFFER_SIZE 2048
24#define TAG_READER_BUFFER_SIZE 2048
81cd0474 25#define DEMOD_DMA_BUFFER_SIZE 1024
aeadbdb2 26*/
0d9a86c7 27
28#define RECEIVE_SAMPLES_TIMEOUT 2000
29
15c4dc5a 30//=============================================================================
31// An ISO 14443 Type B tag. We listen for commands from the reader, using
32// a UART kind of thing that's implemented in software. When we get a
33// frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
34// If it's good, then we can do something appropriate with it, and send
35// a response.
36//=============================================================================
37
38//-----------------------------------------------------------------------------
39// Code up a string of octets at layer 2 (including CRC, we don't generate
40// that here) so that they can be transmitted to the reader. Doesn't transmit
41// them yet, just leaves them ready to send in ToSend[].
42//-----------------------------------------------------------------------------
f7e3ed82 43static void CodeIso14443bAsTag(const uint8_t *cmd, int len)
15c4dc5a 44{
7d5ebac9
MHS
45 int i;
46
47 ToSendReset();
48
49 // Transmit a burst of ones, as the initial thing that lets the
50 // reader get phase sync. This (TR1) must be > 80/fs, per spec,
51 // but tag that I've tried (a Paypass) exceeds that by a fair bit,
52 // so I will too.
53 for(i = 0; i < 20; i++) {
54 ToSendStuffBit(1);
55 ToSendStuffBit(1);
56 ToSendStuffBit(1);
57 ToSendStuffBit(1);
58 }
59
60 // Send SOF.
61 for(i = 0; i < 10; i++) {
62 ToSendStuffBit(0);
63 ToSendStuffBit(0);
64 ToSendStuffBit(0);
65 ToSendStuffBit(0);
66 }
67 for(i = 0; i < 2; i++) {
68 ToSendStuffBit(1);
69 ToSendStuffBit(1);
70 ToSendStuffBit(1);
71 ToSendStuffBit(1);
72 }
73
74 for(i = 0; i < len; i++) {
75 int j;
76 uint8_t b = cmd[i];
77
78 // Start bit
79 ToSendStuffBit(0);
80 ToSendStuffBit(0);
81 ToSendStuffBit(0);
82 ToSendStuffBit(0);
83
84 // Data bits
85 for(j = 0; j < 8; j++) {
86 if(b & 1) {
87 ToSendStuffBit(1);
88 ToSendStuffBit(1);
89 ToSendStuffBit(1);
90 ToSendStuffBit(1);
91 } else {
92 ToSendStuffBit(0);
93 ToSendStuffBit(0);
94 ToSendStuffBit(0);
95 ToSendStuffBit(0);
96 }
97 b >>= 1;
98 }
99
100 // Stop bit
101 ToSendStuffBit(1);
102 ToSendStuffBit(1);
103 ToSendStuffBit(1);
104 ToSendStuffBit(1);
105 }
106
107 // Send SOF.
108 for(i = 0; i < 10; i++) {
109 ToSendStuffBit(0);
110 ToSendStuffBit(0);
111 ToSendStuffBit(0);
112 ToSendStuffBit(0);
113 }
114 for(i = 0; i < 10; i++) {
115 ToSendStuffBit(1);
116 ToSendStuffBit(1);
117 ToSendStuffBit(1);
118 ToSendStuffBit(1);
119 }
120
121 // Convert from last byte pos to length
122 ToSendMax++;
123
124 // Add a few more for slop
125 ToSendMax += 2;
15c4dc5a 126}
127
128//-----------------------------------------------------------------------------
129// The software UART that receives commands from the reader, and its state
130// variables.
131//-----------------------------------------------------------------------------
132static struct {
7d5ebac9
MHS
133 enum {
134 STATE_UNSYNCD,
135 STATE_GOT_FALLING_EDGE_OF_SOF,
136 STATE_AWAITING_START_BIT,
137 STATE_RECEIVING_DATA,
138 STATE_ERROR_WAIT
139 } state;
140 uint16_t shiftReg;
141 int bitCnt;
142 int byteCnt;
143 int byteCntMax;
144 int posCnt;
145 uint8_t *output;
15c4dc5a 146} Uart;
147
148/* Receive & handle a bit coming from the reader.
149 *
150 * LED handling:
151 * LED A -> ON once we have received the SOF and are expecting the rest.
152 * LED A -> OFF once we have received EOF or are in error state or unsynced
153 *
154 * Returns: true if we received a EOF
155 * false if we are still waiting for some more
156 */
f7e3ed82 157static int Handle14443UartBit(int bit)
15c4dc5a 158{
7d5ebac9 159 switch(Uart.state) {
03dc1740 160 case STATE_UNSYNCD:
7d5ebac9
MHS
161 LED_A_OFF();
162 if(!bit) {
163 // we went low, so this could be the beginning
164 // of an SOF
165 Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF;
166 Uart.posCnt = 0;
167 Uart.bitCnt = 0;
168 }
169 break;
170
171 case STATE_GOT_FALLING_EDGE_OF_SOF:
172 Uart.posCnt++;
173 if(Uart.posCnt == 2) {
174 if(bit) {
175 if(Uart.bitCnt >= 10) {
176 // we've seen enough consecutive
177 // zeros that it's a valid SOF
178 Uart.posCnt = 0;
179 Uart.byteCnt = 0;
180 Uart.state = STATE_AWAITING_START_BIT;
181 LED_A_ON(); // Indicate we got a valid SOF
182 } else {
183 // didn't stay down long enough
184 // before going high, error
185 Uart.state = STATE_ERROR_WAIT;
186 }
187 } else {
188 // do nothing, keep waiting
189 }
190 Uart.bitCnt++;
191 }
192 if(Uart.posCnt >= 4) Uart.posCnt = 0;
193 if(Uart.bitCnt > 14) {
194 // Give up if we see too many zeros without
195 // a one, too.
196 Uart.state = STATE_ERROR_WAIT;
197 }
198 break;
199
200 case STATE_AWAITING_START_BIT:
201 Uart.posCnt++;
202 if(bit) {
203 if(Uart.posCnt > 25) {
204 // stayed high for too long between
205 // characters, error
206 Uart.state = STATE_ERROR_WAIT;
207 }
208 } else {
209 // falling edge, this starts the data byte
210 Uart.posCnt = 0;
211 Uart.bitCnt = 0;
212 Uart.shiftReg = 0;
213 Uart.state = STATE_RECEIVING_DATA;
214 LED_A_ON(); // Indicate we're receiving
215 }
216 break;
217
218 case STATE_RECEIVING_DATA:
219 Uart.posCnt++;
220 if(Uart.posCnt == 2) {
221 // time to sample a bit
222 Uart.shiftReg >>= 1;
223 if(bit) {
224 Uart.shiftReg |= 0x200;
225 }
226 Uart.bitCnt++;
227 }
228 if(Uart.posCnt >= 4) {
229 Uart.posCnt = 0;
230 }
231 if(Uart.bitCnt == 10) {
232 if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001))
233 {
234 // this is a data byte, with correct
235 // start and stop bits
236 Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff;
237 Uart.byteCnt++;
238
239 if(Uart.byteCnt >= Uart.byteCntMax) {
240 // Buffer overflowed, give up
241 Uart.posCnt = 0;
242 Uart.state = STATE_ERROR_WAIT;
243 } else {
244 // so get the next byte now
245 Uart.posCnt = 0;
246 Uart.state = STATE_AWAITING_START_BIT;
247 }
248 } else if(Uart.shiftReg == 0x000) {
249 // this is an EOF byte
250 LED_A_OFF(); // Finished receiving
251 return TRUE;
252 } else {
253 // this is an error
254 Uart.posCnt = 0;
255 Uart.state = STATE_ERROR_WAIT;
256 }
257 }
258 break;
259
260 case STATE_ERROR_WAIT:
261 // We're all screwed up, so wait a little while
262 // for whatever went wrong to finish, and then
263 // start over.
264 Uart.posCnt++;
265 if(Uart.posCnt > 10) {
266 Uart.state = STATE_UNSYNCD;
267 }
268 break;
269
270 default:
271 Uart.state = STATE_UNSYNCD;
272 break;
273 }
274
275 // This row make the error blew circular buffer in hf 14b snoop
276 //if (Uart.state == STATE_ERROR_WAIT) LED_A_OFF(); // Error
277
278 return FALSE;
15c4dc5a 279}
280
281//-----------------------------------------------------------------------------
282// Receive a command (from the reader to us, where we are the simulated tag),
283// and store it in the given buffer, up to the given maximum length. Keeps
284// spinning, waiting for a well-framed command, until either we get one
285// (returns TRUE) or someone presses the pushbutton on the board (FALSE).
286//
287// Assume that we're called with the SSC (to the FPGA) and ADC path set
288// correctly.
289//-----------------------------------------------------------------------------
f7e3ed82 290static int GetIso14443CommandFromReader(uint8_t *received, int *len, int maxLen)
15c4dc5a 291{
7d5ebac9
MHS
292 uint8_t mask;
293 int i, bit;
294
295 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
296 // only, since we are receiving, not transmitting).
297 // Signal field is off with the appropriate LED
298 LED_D_OFF();
299 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
300
301
302 // Now run a `software UART' on the stream of incoming samples.
303 Uart.output = received;
304 Uart.byteCntMax = maxLen;
305 Uart.state = STATE_UNSYNCD;
306
307 for(;;) {
308 WDT_HIT();
309
310 if(BUTTON_PRESS()) return FALSE;
311
312 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
313 AT91C_BASE_SSC->SSC_THR = 0x00;
314 }
315 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
316 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
317
318 mask = 0x80;
319 for(i = 0; i < 8; i++, mask >>= 1) {
320 bit = (b & mask);
321 if(Handle14443UartBit(bit)) {
322 *len = Uart.byteCnt;
323 return TRUE;
324 }
325 }
326 }
327 }
15c4dc5a 328}
329
330//-----------------------------------------------------------------------------
331// Main loop of simulated tag: receive commands from reader, decide what
332// response to send, and send it.
333//-----------------------------------------------------------------------------
334void SimulateIso14443Tag(void)
335{
7d5ebac9
MHS
336 static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
337 static const uint8_t response1[] = {
338 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
339 0x00, 0x21, 0x85, 0x5e, 0xd7
340 };
15c4dc5a 341
7d5ebac9
MHS
342 uint8_t *resp;
343 int respLen;
15c4dc5a 344
7d5ebac9
MHS
345 uint8_t *resp1 = BigBuf_get_addr() + 800;
346 int resp1Len;
15c4dc5a 347
7d5ebac9
MHS
348 uint8_t *receivedCmd = BigBuf_get_addr();
349 int len;
15c4dc5a 350
7d5ebac9 351 int i;
15c4dc5a 352
7d5ebac9 353 int cmdsRecvd = 0;
15c4dc5a 354
7d5ebac9
MHS
355 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
356 memset(receivedCmd, 0x44, 400);
15c4dc5a 357
7d5ebac9
MHS
358 CodeIso14443bAsTag(response1, sizeof(response1));
359 memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
15c4dc5a 360
7d5ebac9
MHS
361 // We need to listen to the high-frequency, peak-detected path.
362 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
363 FpgaSetupSsc();
15c4dc5a 364
7d5ebac9 365 cmdsRecvd = 0;
15c4dc5a 366
7d5ebac9
MHS
367 for(;;) {
368 uint8_t b1, b2;
15c4dc5a 369
7d5ebac9 370 if(!GetIso14443CommandFromReader(receivedCmd, &len, 100)) {
15c4dc5a 371 Dbprintf("button pressed, received %d commands", cmdsRecvd);
372 break;
7d5ebac9
MHS
373 }
374
375 // Good, look at the command now.
376
377 if(len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len)==0) {
378 resp = resp1; respLen = resp1Len;
379 } else {
380 Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
381 // And print whether the CRC fails, just for good measure
382 ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
383 if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
384 // Not so good, try again.
385 DbpString("+++CRC fail");
386 } else {
387 DbpString("CRC passes");
388 }
389 break;
390 }
391
392 memset(receivedCmd, 0x44, 32);
393
394 cmdsRecvd++;
395
396 if(cmdsRecvd > 0x30) {
397 DbpString("many commands later...");
398 break;
399 }
400
401 if(respLen <= 0) continue;
402
403 // Modulate BPSK
404 // Signal field is off with the appropriate LED
405 LED_D_OFF();
406 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
407 AT91C_BASE_SSC->SSC_THR = 0xff;
408 FpgaSetupSsc();
409
410 // Transmit the response.
411 i = 0;
412 for(;;) {
413 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
414 uint8_t b = resp[i];
415
416 AT91C_BASE_SSC->SSC_THR = b;
417
418 i++;
419 if(i > respLen) {
420 break;
421 }
422 }
423 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
424 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
425 (void)b;
426 }
427 }
428 }
15c4dc5a 429}
430
431//=============================================================================
432// An ISO 14443 Type B reader. We take layer two commands, code them
433// appropriately, and then send them to the tag. We then listen for the
434// tag's response, which we leave in the buffer to be demodulated on the
435// PC side.
436//=============================================================================
437
438static struct {
7d5ebac9
MHS
439 enum {
440 DEMOD_UNSYNCD,
441 DEMOD_PHASE_REF_TRAINING,
442 DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
443 DEMOD_GOT_FALLING_EDGE_OF_SOF,
444 DEMOD_AWAITING_START_BIT,
445 DEMOD_RECEIVING_DATA,
446 DEMOD_ERROR_WAIT
447 } state;
448 int bitCount;
449 int posCount;
450 int thisBit;
451 int metric;
452 int metricN;
453 uint16_t shiftReg;
454 uint8_t *output;
455 int len;
456 int sumI;
457 int sumQ;
15c4dc5a 458} Demod;
459
460/*
461 * Handles reception of a bit from the tag
462 *
463 * LED handling:
464 * LED C -> ON once we have received the SOF and are expecting the rest.
465 * LED C -> OFF once we have received EOF or are unsynced
466 *
467 * Returns: true if we received a EOF
468 * false if we are still waiting for some more
469 *
470 */
0f7f9edc 471static RAMFUNC int Handle14443SamplesDemod(int ci, int cq)
15c4dc5a 472{
7d5ebac9 473 int v;
15c4dc5a 474
7d5ebac9
MHS
475 // The soft decision on the bit uses an estimate of just the
476 // quadrant of the reference angle, not the exact angle.
15c4dc5a 477#define MAKE_SOFT_DECISION() { \
7d5ebac9
MHS
478 if(Demod.sumI > 0) { \
479 v = ci; \
480 } else { \
481 v = -ci; \
482 } \
483 if(Demod.sumQ > 0) { \
484 v += cq; \
485 } else { \
486 v -= cq; \
487 } \
488 }
15c4dc5a 489
7d5ebac9
MHS
490 switch(Demod.state) {
491 case DEMOD_UNSYNCD:
492 v = ci;
493 if(v < 0) v = -v;
494 if(cq > 0) {
495 v += cq;
496 } else {
497 v -= cq;
498 }
499 if(v > 40) {
500 Demod.posCount = 0;
501 Demod.state = DEMOD_PHASE_REF_TRAINING;
502 Demod.sumI = 0;
503 Demod.sumQ = 0;
504 }
505 break;
506
507 case DEMOD_PHASE_REF_TRAINING:
508 if(Demod.posCount < 8) {
509 Demod.sumI += ci;
510 Demod.sumQ += cq;
511 } else if(Demod.posCount > 100) {
512 // error, waited too long
513 Demod.state = DEMOD_UNSYNCD;
514 } else {
515 MAKE_SOFT_DECISION();
516 if(v < 0) {
517 Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF;
518 Demod.posCount = 0;
519 }
520 }
521 Demod.posCount++;
522 break;
523
524 case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
525 MAKE_SOFT_DECISION();
526 if(v < 0) {
527 Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
528 Demod.posCount = 0;
529 } else {
530 if(Demod.posCount > 100) {
531 Demod.state = DEMOD_UNSYNCD;
532 }
533 }
534 Demod.posCount++;
535 break;
536
537 case DEMOD_GOT_FALLING_EDGE_OF_SOF:
538 MAKE_SOFT_DECISION();
539 if(v > 0) {
540 if(Demod.posCount < 12) {
541 Demod.state = DEMOD_UNSYNCD;
542 } else {
543 LED_C_ON(); // Got SOF
544 Demod.state = DEMOD_AWAITING_START_BIT;
545 Demod.posCount = 0;
546 Demod.len = 0;
547 Demod.metricN = 0;
548 Demod.metric = 0;
549 }
550 } else {
551 if(Demod.posCount > 100) {
552 Demod.state = DEMOD_UNSYNCD;
553 }
554 }
555 Demod.posCount++;
556 break;
557
558 case DEMOD_AWAITING_START_BIT:
559 MAKE_SOFT_DECISION();
560 if(v > 0) {
561 if(Demod.posCount > 10) {
562 Demod.state = DEMOD_UNSYNCD;
563 }
564 } else {
565 Demod.bitCount = 0;
566 Demod.posCount = 1;
567 Demod.thisBit = v;
568 Demod.shiftReg = 0;
569 Demod.state = DEMOD_RECEIVING_DATA;
570 }
571 break;
572
573 case DEMOD_RECEIVING_DATA:
574 MAKE_SOFT_DECISION();
575 if(Demod.posCount == 0) {
576 Demod.thisBit = v;
577 Demod.posCount = 1;
578 } else {
579 Demod.thisBit += v;
580
581 if(Demod.thisBit > 0) {
582 Demod.metric += Demod.thisBit;
583 } else {
584 Demod.metric -= Demod.thisBit;
585 }
586 (Demod.metricN)++;
587
588 Demod.shiftReg >>= 1;
589 if(Demod.thisBit > 0) {
590 Demod.shiftReg |= 0x200;
591 }
592
593 Demod.bitCount++;
594 if(Demod.bitCount == 10) {
595 uint16_t s = Demod.shiftReg;
596 if((s & 0x200) && !(s & 0x001)) {
597 uint8_t b = (s >> 1);
598 Demod.output[Demod.len] = b;
599 Demod.len++;
600 Demod.state = DEMOD_AWAITING_START_BIT;
601 } else if(s == 0x000) {
602 // This is EOF
603 LED_C_OFF();
604 Demod.state = DEMOD_UNSYNCD;
605 return TRUE;
606 } else {
607 Demod.state = DEMOD_UNSYNCD;
608 }
609 }
610 Demod.posCount = 0;
611 }
612 break;
613
614 default:
615 Demod.state = DEMOD_UNSYNCD;
616 break;
617 }
618
619 if (Demod.state == DEMOD_UNSYNCD) LED_C_OFF(); // Not synchronized...
620 return FALSE;
621}
67ac4bf7 622
623
aeadbdb2
MHS
624static void DemodReset()
625{
626 // Clear out the state of the "UART" that receives from the tag.
aeadbdb2
MHS
627 Demod.len = 0;
628 Demod.state = DEMOD_UNSYNCD;
629 memset(Demod.output, 0x00, MAX_FRAME_SIZE);
7d5ebac9 630}
67ac4bf7 631
632
7d5ebac9
MHS
633static void DemodInit(uint8_t *data)
634{
635 Demod.output = data;
636 DemodReset();
aeadbdb2
MHS
637}
638
67ac4bf7 639
aeadbdb2
MHS
640static void UartReset()
641{
aeadbdb2
MHS
642 Uart.byteCntMax = MAX_FRAME_SIZE;
643 Uart.state = STATE_UNSYNCD;
16b75f27
MHS
644 Uart.byteCnt = 0;
645 Uart.bitCnt = 0;
aeadbdb2 646}
67ac4bf7 647
648
7d5ebac9
MHS
649static void UartInit(uint8_t *data)
650{
651 Uart.output = data;
652 UartReset();
15c4dc5a 653}
aeadbdb2 654
67ac4bf7 655
15c4dc5a 656/*
355c8b4a 657 * Demodulate the samples we received from the tag, also log to tracebuffer
15c4dc5a 658 * weTx: set to 'TRUE' if we behave like a reader
659 * set to 'FALSE' if we behave like a snooper
660 * quiet: set to 'TRUE' to disable debug output
661 */
f7e3ed82 662static void GetSamplesFor14443Demod(int weTx, int n, int quiet)
15c4dc5a 663{
7d5ebac9
MHS
664 int max = 0;
665 int gotFrame = FALSE;
666 int lastRxCounter, ci, cq, samples = 0;
667
668 // Allocate memory from BigBuf for some buffers
669 // free all previous allocations first
670 BigBuf_free();
671
7d5ebac9
MHS
672 // The response (tag -> reader) that we're receiving.
673 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
674
675 // The DMA buffer, used to stream samples from the FPGA
67ac4bf7 676 int8_t *dmaBuf = (int8_t*) BigBuf_malloc(DMA_BUFFER_SIZE);
15c4dc5a 677
7d5ebac9
MHS
678 // Set up the demodulator for tag -> reader responses.
679 DemodInit(receivedResponse);
15c4dc5a 680
7d5ebac9 681 // Setup and start DMA.
67ac4bf7 682 FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE);
15c4dc5a 683
67ac4bf7 684 int8_t *upTo = dmaBuf;
aeadbdb2 685 lastRxCounter = DMA_BUFFER_SIZE;
15c4dc5a 686
7d5ebac9
MHS
687 // Signal field is ON with the appropriate LED:
688 if (weTx) LED_D_ON(); else LED_D_OFF();
689 // And put the FPGA in the appropriate mode
690 FpgaWriteConfWord(
691 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
692 (weTx ? 0 : FPGA_HF_READER_RX_XCORR_SNOOP));
15c4dc5a 693
7d5ebac9
MHS
694 for(;;) {
695 int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
696 if(behindBy > max) max = behindBy;
15c4dc5a 697
aeadbdb2 698 while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1))
7d5ebac9
MHS
699 > 2)
700 {
701 ci = upTo[0];
702 cq = upTo[1];
703 upTo += 2;
0d9a86c7 704 if(upTo >= dmaBuf + DMA_BUFFER_SIZE) {
705 upTo = dmaBuf;
7d5ebac9 706 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
aeadbdb2 707 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
7d5ebac9
MHS
708 }
709 lastRxCounter -= 2;
710 if(lastRxCounter <= 0) {
aeadbdb2 711 lastRxCounter += DMA_BUFFER_SIZE;
7d5ebac9 712 }
15c4dc5a 713
7d5ebac9 714 samples += 2;
15c4dc5a 715
7d5ebac9
MHS
716 if(Handle14443SamplesDemod(ci, cq)) {
717 gotFrame = 1;
718 }
719 }
15c4dc5a 720
0d9a86c7 721 if(samples > n) {
7d5ebac9
MHS
722 break;
723 }
724 }
725 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
726 if (!quiet) Dbprintf("%x %x %x", max, gotFrame, Demod.len);
355c8b4a
MHS
727 //Tracing
728 if (tracing && Demod.len > 0) {
729 uint8_t parity[MAX_PARITY_SIZE];
0d9a86c7 730 GetParity(Demod.output, Demod.len, parity);
731 LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE);
355c8b4a 732 }
15c4dc5a 733}
734
67ac4bf7 735
15c4dc5a 736//-----------------------------------------------------------------------------
737// Read the tag's response. We just receive a stream of slightly-processed
738// samples from the FPGA, which we will later do some signal processing on,
739// to get the bits.
740//-----------------------------------------------------------------------------
f7e3ed82 741/*static void GetSamplesFor14443(int weTx, int n)
15c4dc5a 742{
7d5ebac9
MHS
743 uint8_t *dest = (uint8_t *)BigBuf;
744 int c;
745
746 FpgaWriteConfWord(
747 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
748 (weTx ? 0 : FPGA_HF_READER_RX_XCORR_SNOOP));
749
750 c = 0;
751 for(;;) {
752 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
753 AT91C_BASE_SSC->SSC_THR = 0x43;
754 }
755 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
756 int8_t b;
757 b = (int8_t)AT91C_BASE_SSC->SSC_RHR;
758
759 dest[c++] = (uint8_t)b;
760
761 if(c >= n) {
762 break;
763 }
764 }
765 }
15c4dc5a 766}*/
767
67ac4bf7 768
15c4dc5a 769//-----------------------------------------------------------------------------
770// Transmit the command (to the tag) that was placed in ToSend[].
771//-----------------------------------------------------------------------------
772static void TransmitFor14443(void)
773{
7d5ebac9 774 int c;
15c4dc5a 775
7d5ebac9 776 FpgaSetupSsc();
15c4dc5a 777
7d5ebac9
MHS
778 while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
779 AT91C_BASE_SSC->SSC_THR = 0xff;
780 }
15c4dc5a 781
7d5ebac9 782 // Signal field is ON with the appropriate Red LED
15c4dc5a 783 LED_D_ON();
784 // Signal we are transmitting with the Green LED
785 LED_B_ON();
786 FpgaWriteConfWord(
7d5ebac9
MHS
787 FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
788
789 for(c = 0; c < 10;) {
790 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
791 AT91C_BASE_SSC->SSC_THR = 0xff;
792 c++;
793 }
794 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
795 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
796 (void)r;
797 }
798 WDT_HIT();
799 }
800
801 c = 0;
802 for(;;) {
803 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
804 AT91C_BASE_SSC->SSC_THR = ToSend[c];
805 c++;
806 if(c >= ToSendMax) {
807 break;
808 }
809 }
810 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
811 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
812 (void)r;
813 }
814 WDT_HIT();
815 }
816 LED_B_OFF(); // Finished sending
15c4dc5a 817}
818
67ac4bf7 819
15c4dc5a 820//-----------------------------------------------------------------------------
821// Code a layer 2 command (string of octets, including CRC) into ToSend[],
822// so that it is ready to transmit to the tag using TransmitFor14443().
823//-----------------------------------------------------------------------------
7cf3ef20 824static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
15c4dc5a 825{
7d5ebac9
MHS
826 int i, j;
827 uint8_t b;
828
829 ToSendReset();
830
831 // Establish initial reference level
832 for(i = 0; i < 40; i++) {
833 ToSendStuffBit(1);
834 }
835 // Send SOF
836 for(i = 0; i < 10; i++) {
837 ToSendStuffBit(0);
838 }
839
840 for(i = 0; i < len; i++) {
841 // Stop bits/EGT
842 ToSendStuffBit(1);
843 ToSendStuffBit(1);
844 // Start bit
845 ToSendStuffBit(0);
846 // Data bits
847 b = cmd[i];
848 for(j = 0; j < 8; j++) {
849 if(b & 1) {
850 ToSendStuffBit(1);
851 } else {
852 ToSendStuffBit(0);
853 }
854 b >>= 1;
855 }
856 }
857 // Send EOF
858 ToSendStuffBit(1);
859 for(i = 0; i < 10; i++) {
860 ToSendStuffBit(0);
861 }
862 for(i = 0; i < 8; i++) {
863 ToSendStuffBit(1);
864 }
865
866 // And then a little more, to make sure that the last character makes
867 // it out before we switch to rx mode.
868 for(i = 0; i < 24; i++) {
869 ToSendStuffBit(1);
870 }
871
872 // Convert from last character reference to length
873 ToSendMax++;
15c4dc5a 874}
875
67ac4bf7 876
15c4dc5a 877//-----------------------------------------------------------------------------
878// Read an ISO 14443 tag. We send it some set of commands, and record the
879// responses.
880// The command name is misleading, it actually decodes the reponse in HEX
881// into the output buffer (read the result using hexsamples, not hisamples)
7cf3ef20 882//
883// obsolete function only for test
15c4dc5a 884//-----------------------------------------------------------------------------
f7e3ed82 885void AcquireRawAdcSamplesIso14443(uint32_t parameter)
15c4dc5a 886{
7d5ebac9 887 uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
15c4dc5a 888
7d5ebac9 889 SendRawCommand14443B(sizeof(cmd1),1,1,cmd1);
15c4dc5a 890}
891
67ac4bf7 892
355c8b4a
MHS
893/**
894 Convenience function to encode, transmit and trace iso 14443b comms
895 **/
896static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len)
897{
898 CodeIso14443bAsReader(cmd, len);
899 TransmitFor14443();
900 if (tracing) {
901 uint8_t parity[MAX_PARITY_SIZE];
902 GetParity(cmd, len, parity);
903 LogTrace(cmd,len, 0, 0, parity, TRUE);
904 }
905}
906
67ac4bf7 907
15c4dc5a 908//-----------------------------------------------------------------------------
909// Read a SRI512 ISO 14443 tag.
910//
911// SRI512 tags are just simple memory tags, here we're looking at making a dump
912// of the contents of the memory. No anticollision algorithm is done, we assume
913// we have a single tag in the field.
914//
915// I tried to be systematic and check every answer of the tag, every CRC, etc...
916//-----------------------------------------------------------------------------
7cf3ef20 917void ReadSTMemoryIso14443(uint32_t dwLast)
15c4dc5a 918{
355c8b4a
MHS
919 clear_trace();
920 set_tracing(TRUE);
921
7d5ebac9 922 uint8_t i = 0x00;
15c4dc5a 923
7d5ebac9
MHS
924 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
925 // Make sure that we start from off, since the tags are stateful;
926 // confusing things will happen if we don't reset them between reads.
927 LED_D_OFF();
928 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
929 SpinDelay(200);
15c4dc5a 930
7d5ebac9
MHS
931 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
932 FpgaSetupSsc();
15c4dc5a 933
7d5ebac9
MHS
934 // Now give it time to spin up.
935 // Signal field is on with the appropriate LED
936 LED_D_ON();
937 FpgaWriteConfWord(
938 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
939 SpinDelay(200);
15c4dc5a 940
7d5ebac9
MHS
941 // First command: wake up the tag using the INITIATE command
942 uint8_t cmd1[] = { 0x06, 0x00, 0x97, 0x5b};
355c8b4a
MHS
943
944 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
15c4dc5a 945// LED_A_ON();
0d9a86c7 946 GetSamplesFor14443Demod(TRUE, RECEIVE_SAMPLES_TIMEOUT, TRUE);
15c4dc5a 947// LED_A_OFF();
948
7d5ebac9 949 if (Demod.len == 0) {
15c4dc5a 950 DbpString("No response from tag");
951 return;
7d5ebac9 952 } else {
15c4dc5a 953 Dbprintf("Randomly generated UID from tag (+ 2 byte CRC): %x %x %x",
954 Demod.output[0], Demod.output[1],Demod.output[2]);
7d5ebac9
MHS
955 }
956 // There is a response, SELECT the uid
957 DbpString("Now SELECT tag:");
958 cmd1[0] = 0x0E; // 0x0E is SELECT
959 cmd1[1] = Demod.output[0];
960 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
355c8b4a
MHS
961 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
962
15c4dc5a 963// LED_A_ON();
0d9a86c7 964 GetSamplesFor14443Demod(TRUE, RECEIVE_SAMPLES_TIMEOUT, TRUE);
15c4dc5a 965// LED_A_OFF();
7d5ebac9 966 if (Demod.len != 3) {
15c4dc5a 967 Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
968 return;
7d5ebac9
MHS
969 }
970 // Check the CRC of the answer:
971 ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]);
972 if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) {
15c4dc5a 973 DbpString("CRC Error reading select response.");
974 return;
7d5ebac9
MHS
975 }
976 // Check response from the tag: should be the same UID as the command we just sent:
977 if (cmd1[1] != Demod.output[0]) {
15c4dc5a 978 Dbprintf("Bad response to SELECT from Tag, aborting: %x %x", cmd1[1], Demod.output[0]);
979 return;
7d5ebac9
MHS
980 }
981 // Tag is now selected,
982 // First get the tag's UID:
983 cmd1[0] = 0x0B;
984 ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]);
355c8b4a
MHS
985 CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one
986
15c4dc5a 987// LED_A_ON();
0d9a86c7 988 GetSamplesFor14443Demod(TRUE, RECEIVE_SAMPLES_TIMEOUT, TRUE);
15c4dc5a 989// LED_A_OFF();
7d5ebac9 990 if (Demod.len != 10) {
15c4dc5a 991 Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
992 return;
7d5ebac9
MHS
993 }
994 // The check the CRC of the answer (use cmd1 as temporary variable):
995 ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]);
996 if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) {
15c4dc5a 997 Dbprintf("CRC Error reading block! - Below: expected, got %x %x",
998 (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]);
999 // Do not return;, let's go on... (we should retry, maybe ?)
7d5ebac9
MHS
1000 }
1001 Dbprintf("Tag UID (64 bits): %08x %08x",
15c4dc5a 1002 (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
1003 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]);
1004
7d5ebac9
MHS
1005 // Now loop to read all 16 blocks, address from 0 to last block
1006 Dbprintf("Tag memory dump, block 0 to %d",dwLast);
1007 cmd1[0] = 0x08;
1008 i = 0x00;
1009 dwLast++;
1010 for (;;) {
1011 if (i == dwLast) {
1012 DbpString("System area block (0xff):");
1013 i = 0xff;
1014 }
1015 cmd1[1] = i;
1016 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
355c8b4a
MHS
1017 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
1018
15c4dc5a 1019// LED_A_ON();
0d9a86c7 1020 GetSamplesFor14443Demod(TRUE, RECEIVE_SAMPLES_TIMEOUT, TRUE);
15c4dc5a 1021// LED_A_OFF();
7d5ebac9 1022 if (Demod.len != 6) { // Check if we got an answer from the tag
15c4dc5a 1023 DbpString("Expected 6 bytes from tag, got less...");
1024 return;
7d5ebac9
MHS
1025 }
1026 // The check the CRC of the answer (use cmd1 as temporary variable):
1027 ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]);
1028 if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) {
15c4dc5a 1029 Dbprintf("CRC Error reading block! - Below: expected, got %x %x",
1030 (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]);
1031 // Do not return;, let's go on... (we should retry, maybe ?)
7d5ebac9
MHS
1032 }
1033 // Now print out the memory location:
1034 Dbprintf("Address=%x, Contents=%x, CRC=%x", i,
15c4dc5a 1035 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0],
1036 (Demod.output[4]<<8)+Demod.output[5]);
7d5ebac9 1037 if (i == 0xff) {
15c4dc5a 1038 break;
7d5ebac9
MHS
1039 }
1040 i++;
1041 }
15c4dc5a 1042}
1043
1044
1045//=============================================================================
1046// Finally, the `sniffer' combines elements from both the reader and
1047// simulated tag, to show both sides of the conversation.
1048//=============================================================================
1049
1050//-----------------------------------------------------------------------------
1051// Record the sequence of commands sent by the reader to the tag, with
1052// triggering so that we start recording at the point that the tag is moved
1053// near the reader.
1054//-----------------------------------------------------------------------------
1055/*
1056 * Memory usage for this function, (within BigBuf)
1057 * 0-4095 : Demodulated samples receive (4096 bytes) - DEMOD_TRACE_SIZE
1058 * 4096-6143 : Last Received command, 2048 bytes (reader->tag) - READER_TAG_BUFFER_SIZE
1059 * 6144-8191 : Last Received command, 2048 bytes(tag->reader) - TAG_READER_BUFFER_SIZE
81cd0474 1060 * 8192-9215 : DMA Buffer, 1024 bytes (samples) - DEMOD_DMA_BUFFER_SIZE
15c4dc5a 1061 */
0f7f9edc 1062void RAMFUNC SnoopIso14443(void)
15c4dc5a 1063{
7d5ebac9
MHS
1064 // We won't start recording the frames that we acquire until we trigger;
1065 // a good trigger condition to get started is probably when we see a
1066 // response from the tag.
1067 int triggered = TRUE;
15c4dc5a 1068
7d5ebac9 1069 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
f71f4deb 1070 BigBuf_free();
15c4dc5a 1071
aeadbdb2
MHS
1072 clear_trace();
1073 set_tracing(TRUE);
1074
7d5ebac9 1075 // The DMA buffer, used to stream samples from the FPGA
67ac4bf7 1076 int8_t *dmaBuf = (int8_t*) BigBuf_malloc(DMA_BUFFER_SIZE);
7d5ebac9 1077 int lastRxCounter;
67ac4bf7 1078 int8_t *upTo;
7d5ebac9
MHS
1079 int ci, cq;
1080 int maxBehindBy = 0;
1081
1082 // Count of samples received so far, so that we can include timing
1083 // information in the trace buffer.
1084 int samples = 0;
15c4dc5a 1085
7d5ebac9
MHS
1086 DemodInit(BigBuf_malloc(MAX_FRAME_SIZE));
1087 UartInit(BigBuf_malloc(MAX_FRAME_SIZE));
15c4dc5a 1088
7d5ebac9
MHS
1089 // Print some debug information about the buffer sizes
1090 Dbprintf("Snooping buffers initialized:");
1091 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
aeadbdb2
MHS
1092 Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE);
1093 Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE);
1094 Dbprintf(" DMA: %i bytes", DMA_BUFFER_SIZE);
e30c654b 1095
aeadbdb2
MHS
1096 // Signal field is off with the appropriate LED
1097 LED_D_OFF();
1098
1099 // And put the FPGA in the appropriate mode
7d5ebac9
MHS
1100 FpgaWriteConfWord(
1101 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
1102 FPGA_HF_READER_RX_XCORR_SNOOP);
1103 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1104
1105 // Setup for the DMA.
1106 FpgaSetupSsc();
1107 upTo = dmaBuf;
aeadbdb2 1108 lastRxCounter = DMA_BUFFER_SIZE;
67ac4bf7 1109 FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE);
aeadbdb2 1110 uint8_t parity[MAX_PARITY_SIZE];
7d5ebac9 1111 LED_A_ON();
0f7f9edc 1112
7d5ebac9
MHS
1113 // And now we loop, receiving samples.
1114 for(;;) {
1115 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
aeadbdb2 1116 (DMA_BUFFER_SIZE-1);
7d5ebac9
MHS
1117 if(behindBy > maxBehindBy) {
1118 maxBehindBy = behindBy;
1119 if(behindBy > (9*DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not?
1120 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
aeadbdb2 1121 break;
7d5ebac9
MHS
1122 }
1123 }
1124 if(behindBy < 2) continue;
1125
1126 ci = upTo[0];
1127 cq = upTo[1];
1128 upTo += 2;
1129 lastRxCounter -= 2;
0d9a86c7 1130 if(upTo >= dmaBuf + DMA_BUFFER_SIZE) {
1131 upTo = dmaBuf;
aeadbdb2 1132 lastRxCounter += DMA_BUFFER_SIZE;
0d9a86c7 1133 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
aeadbdb2 1134 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
7d5ebac9 1135 }
15c4dc5a 1136
7d5ebac9 1137 samples += 2;
15c4dc5a 1138
16b75f27 1139 if(Handle14443UartBit(ci & 1)) {
aeadbdb2 1140 if(triggered && tracing) {
03dc1740
MHS
1141 GetParity(Uart.output, Uart.byteCnt, parity);
1142 LogTrace(Uart.output,Uart.byteCnt,samples, samples,parity,TRUE);
aeadbdb2 1143 }
16b75f27
MHS
1144 if(Uart.byteCnt==0) Dbprintf("[1] Error, Uart.byteCnt==0, Uart.bitCnt=%d", Uart.bitCnt);
1145
aeadbdb2
MHS
1146 /* And ready to receive another command. */
1147 UartReset();
1148 /* And also reset the demod code, which might have been */
1149 /* false-triggered by the commands from the reader. */
1150 DemodReset();
1151 }
7d5ebac9 1152 if(Handle14443UartBit(cq & 1)) {
aeadbdb2 1153 if(triggered && tracing) {
03dc1740 1154 GetParity(Uart.output, Uart.byteCnt, parity);
67ac4bf7 1155 LogTrace(Uart.output,Uart.byteCnt,samples, samples, parity, TRUE);
aeadbdb2 1156 }
16b75f27
MHS
1157 if(Uart.byteCnt==0) Dbprintf("[2] Error, Uart.byteCnt==0, Uart.bitCnt=%d", Uart.bitCnt);
1158
aeadbdb2
MHS
1159 /* And ready to receive another command. */
1160 UartReset();
1161 /* And also reset the demod code, which might have been */
1162 /* false-triggered by the commands from the reader. */
1163 DemodReset();
1164 }
15c4dc5a 1165
7d5ebac9 1166 if(Handle14443SamplesDemod(ci, cq)) {
15c4dc5a 1167
355c8b4a
MHS
1168 //Use samples as a time measurement
1169 if(tracing)
1170 {
1171 uint8_t parity[MAX_PARITY_SIZE];
03dc1740 1172 GetParity(Demod.output, Demod.len, parity);
67ac4bf7 1173 LogTrace(Demod.output, Demod.len,samples, samples, parity, FALSE);
355c8b4a 1174 }
7d5ebac9
MHS
1175 triggered = TRUE;
1176 LED_A_OFF();
1177 LED_B_ON();
15c4dc5a 1178
7d5ebac9 1179 // And ready to receive another response.
aeadbdb2 1180 DemodReset();
7d5ebac9 1181 }
aeadbdb2
MHS
1182 WDT_HIT();
1183
1184 if(!tracing) {
1185 DbpString("Reached trace limit");
1186 break;
1187 }
15c4dc5a 1188
7d5ebac9
MHS
1189 if(BUTTON_PRESS()) {
1190 DbpString("cancelled");
aeadbdb2 1191 break;
7d5ebac9
MHS
1192 }
1193 }
aeadbdb2 1194 FpgaDisableSscDma();
0f7f9edc 1195 LED_A_OFF();
1196 LED_B_OFF();
1197 LED_C_OFF();
aeadbdb2 1198 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
15c4dc5a 1199 DbpString("Snoop statistics:");
355c8b4a 1200 Dbprintf(" Max behind by: %i", maxBehindBy);
15c4dc5a 1201 Dbprintf(" Uart State: %x", Uart.state);
1202 Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt);
1203 Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax);
3000dc4e 1204 Dbprintf(" Trace length: %i", BigBuf_get_traceLen());
15c4dc5a 1205}
7cf3ef20 1206
67ac4bf7 1207
7cf3ef20 1208/*
1209 * Send raw command to tag ISO14443B
1210 * @Input
1211 * datalen len of buffer data
1212 * recv bool when true wait for data from tag and send to client
1213 * powerfield bool leave the field on when true
1214 * data buffer with byte to send
1215 *
1216 * @Output
1217 * none
1218 *
1219 */
67ac4bf7 1220void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[])
7cf3ef20 1221{
7d5ebac9
MHS
1222 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1223 if(!powerfield)
1224 {
1225 // Make sure that we start from off, since the tags are stateful;
1226 // confusing things will happen if we don't reset them between reads.
1227 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1228 LED_D_OFF();
1229 SpinDelay(200);
1230 }
1231
1232 if(!GETBIT(GPIO_LED_D))
1233 {
1234 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1235 FpgaSetupSsc();
1236
1237 // Now give it time to spin up.
1238 // Signal field is on with the appropriate LED
1239 LED_D_ON();
1240 FpgaWriteConfWord(
1241 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
1242 SpinDelay(200);
1243 }
7cf3ef20 1244
355c8b4a
MHS
1245 CodeAndTransmit14443bAsReader(data, datalen);
1246
7d5ebac9
MHS
1247 if(recv)
1248 {
0d9a86c7 1249 GetSamplesFor14443Demod(TRUE, RECEIVE_SAMPLES_TIMEOUT, TRUE);
7d5ebac9 1250 uint16_t iLen = MIN(Demod.len,USB_CMD_DATA_SIZE);
7d5ebac9
MHS
1251 cmd_send(CMD_ACK,iLen,0,0,Demod.output,iLen);
1252 }
1253 if(!powerfield)
1254 {
1255 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1256 LED_D_OFF();
1257 }
7cf3ef20 1258}
1259
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