]> git.zerfleddert.de Git - proxmark3-svn/blame - armsrc/iclass.c
iClass support is tweaked so it works with HID readers... waiting for further improvement
[proxmark3-svn] / armsrc / iclass.c
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cee5a30d 1//-----------------------------------------------------------------------------
2// Gerhard de Koning Gans - May 2008
3// Hagen Fritsch - June 2010
4// Gerhard de Koning Gans - May 2011
1e262141 5// Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
cee5a30d 6//
7// This code is licensed to you under the terms of the GNU GPL, version 2 or,
8// at your option, any later version. See the LICENSE.txt file for the text of
9// the license.
10//-----------------------------------------------------------------------------
11// Routines to support iClass.
12//-----------------------------------------------------------------------------
13// Based on ISO14443a implementation. Still in experimental phase.
14// Contribution made during a security research at Radboud University Nijmegen
15//
16// Please feel free to contribute and extend iClass support!!
17//-----------------------------------------------------------------------------
18//
cee5a30d 19// FIX:
20// ====
21// We still have sometimes a demodulation error when snooping iClass communication.
22// The resulting trace of a read-block-03 command may look something like this:
23//
24// + 22279: : 0c 03 e8 01
25//
26// ...with an incorrect answer...
27//
28// + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29//
30// We still left the error signalling bytes in the traces like 0xbb
31//
32// A correct trace should look like this:
33//
34// + 21112: : 0c 03 e8 01
35// + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36//
37//-----------------------------------------------------------------------------
38
39#include "proxmark3.h"
40#include "apps.h"
41#include "util.h"
42#include "string.h"
7e67e42f 43#include "common.h"
1e262141 44// Needed for CRC in emulation mode;
45// same construction as in ISO 14443;
46// different initial value (CRC_ICLASS)
47#include "iso14443crc.h"
cee5a30d 48
1e262141 49static int timeout = 4096;
cee5a30d 50
51// CARD TO READER
52// Sequence D: 11110000 modulation with subcarrier during first half
53// Sequence E: 00001111 modulation with subcarrier during second half
54// Sequence F: 00000000 no modulation with subcarrier
55// READER TO CARD
56// Sequence X: 00001100 drop after half a period
57// Sequence Y: 00000000 no drop
58// Sequence Z: 11000000 drop at start
cee5a30d 59#define SEC_X 0x0c
60#define SEC_Y 0x00
61#define SEC_Z 0xc0
62
1e262141 63// SAME AS IN iso14443a.
cee5a30d 64#define RECV_CMD_OFFSET 3032
65#define RECV_RES_OFFSET 3096
66#define DMA_BUFFER_OFFSET 3160
67#define DMA_BUFFER_SIZE 4096
68#define TRACE_LENGTH 3000
69
1e262141 70uint32_t SwapBits(uint32_t value, int nrbits) {
71 int i;
72 uint32_t newvalue = 0;
73 for(i = 0; i < nrbits; i++) {
74 newvalue ^= ((value >> i) & 1) << (nrbits - 1 - i);
75 }
76 return newvalue;
77}
78
79static int SendIClassAnswer(uint8_t *resp, int respLen, int delay);
cee5a30d 80
81//-----------------------------------------------------------------------------
82// The software UART that receives commands from the reader, and its state
83// variables.
84//-----------------------------------------------------------------------------
85static struct {
86 enum {
87 STATE_UNSYNCD,
88 STATE_START_OF_COMMUNICATION,
89 STATE_RECEIVING
90 } state;
91 uint16_t shiftReg;
92 int bitCnt;
93 int byteCnt;
94 int byteCntMax;
95 int posCnt;
96 int nOutOfCnt;
97 int OutOfCnt;
98 int syncBit;
1e262141 99 int parityBits;
100 int samples;
cee5a30d 101 int highCnt;
102 int swapper;
103 int counter;
104 int bitBuffer;
105 int dropPosition;
106 uint8_t *output;
107} Uart;
108
1e262141 109static RAMFUNC int OutOfNDecoding(int bit)
cee5a30d 110{
9f693930 111 //int error = 0;
cee5a30d 112 int bitright;
113
114 if(!Uart.bitBuffer) {
115 Uart.bitBuffer = bit ^ 0xFF0;
116 return FALSE;
117 }
118 else {
119 Uart.bitBuffer <<= 4;
120 Uart.bitBuffer ^= bit;
121 }
122
123 /*if(Uart.swapper) {
124 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
125 Uart.byteCnt++;
126 Uart.swapper = 0;
127 if(Uart.byteCnt > 15) { return TRUE; }
128 }
129 else {
130 Uart.swapper = 1;
131 }*/
132
133 if(Uart.state != STATE_UNSYNCD) {
134 Uart.posCnt++;
135
136 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
137 bit = 0x00;
138 }
139 else {
140 bit = 0x01;
141 }
142 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
143 bitright = 0x00;
144 }
145 else {
146 bitright = 0x01;
147 }
148 if(bit != bitright) { bit = bitright; }
149
150
151 // So, now we only have to deal with *bit*, lets see...
152 if(Uart.posCnt == 1) {
153 // measurement first half bitperiod
154 if(!bit) {
155 // Drop in first half means that we are either seeing
156 // an SOF or an EOF.
157
158 if(Uart.nOutOfCnt == 1) {
159 // End of Communication
160 Uart.state = STATE_UNSYNCD;
161 Uart.highCnt = 0;
162 if(Uart.byteCnt == 0) {
163 // Its not straightforward to show single EOFs
164 // So just leave it and do not return TRUE
165 Uart.output[Uart.byteCnt] = 0xf0;
166 Uart.byteCnt++;
167
168 // Calculate the parity bit for the client...
169 Uart.parityBits = 1;
170 }
171 else {
172 return TRUE;
173 }
174 }
175 else if(Uart.state != STATE_START_OF_COMMUNICATION) {
176 // When not part of SOF or EOF, it is an error
177 Uart.state = STATE_UNSYNCD;
178 Uart.highCnt = 0;
9f693930 179 //error = 4;
cee5a30d 180 }
181 }
182 }
183 else {
184 // measurement second half bitperiod
185 // Count the bitslot we are in... (ISO 15693)
186 Uart.nOutOfCnt++;
187
188 if(!bit) {
189 if(Uart.dropPosition) {
190 if(Uart.state == STATE_START_OF_COMMUNICATION) {
9f693930 191 //error = 1;
cee5a30d 192 }
193 else {
9f693930 194 //error = 7;
cee5a30d 195 }
196 // It is an error if we already have seen a drop in current frame
197 Uart.state = STATE_UNSYNCD;
198 Uart.highCnt = 0;
199 }
200 else {
201 Uart.dropPosition = Uart.nOutOfCnt;
202 }
203 }
204
205 Uart.posCnt = 0;
206
207
208 if(Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
209 Uart.nOutOfCnt = 0;
210
211 if(Uart.state == STATE_START_OF_COMMUNICATION) {
212 if(Uart.dropPosition == 4) {
213 Uart.state = STATE_RECEIVING;
214 Uart.OutOfCnt = 256;
215 }
216 else if(Uart.dropPosition == 3) {
217 Uart.state = STATE_RECEIVING;
218 Uart.OutOfCnt = 4;
219 //Uart.output[Uart.byteCnt] = 0xdd;
220 //Uart.byteCnt++;
221 }
222 else {
223 Uart.state = STATE_UNSYNCD;
224 Uart.highCnt = 0;
225 }
226 Uart.dropPosition = 0;
227 }
228 else {
229 // RECEIVING DATA
230 // 1 out of 4
231 if(!Uart.dropPosition) {
232 Uart.state = STATE_UNSYNCD;
233 Uart.highCnt = 0;
9f693930 234 //error = 9;
cee5a30d 235 }
236 else {
237 Uart.shiftReg >>= 2;
238
239 // Swap bit order
240 Uart.dropPosition--;
241 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
242 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
243
244 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
245 Uart.bitCnt += 2;
246 Uart.dropPosition = 0;
247
248 if(Uart.bitCnt == 8) {
249 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
250 Uart.byteCnt++;
251
252 // Calculate the parity bit for the client...
253 Uart.parityBits <<= 1;
254 Uart.parityBits ^= OddByteParity[(Uart.shiftReg & 0xff)];
255
256 Uart.bitCnt = 0;
257 Uart.shiftReg = 0;
258 }
259 }
260 }
261 }
262 else if(Uart.nOutOfCnt == Uart.OutOfCnt) {
263 // RECEIVING DATA
264 // 1 out of 256
265 if(!Uart.dropPosition) {
266 Uart.state = STATE_UNSYNCD;
267 Uart.highCnt = 0;
9f693930 268 //error = 3;
cee5a30d 269 }
270 else {
271 Uart.dropPosition--;
272 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
273 Uart.byteCnt++;
274
275 // Calculate the parity bit for the client...
276 Uart.parityBits <<= 1;
277 Uart.parityBits ^= OddByteParity[(Uart.dropPosition & 0xff)];
278
279 Uart.bitCnt = 0;
280 Uart.shiftReg = 0;
281 Uart.nOutOfCnt = 0;
282 Uart.dropPosition = 0;
283 }
284 }
285
286 /*if(error) {
287 Uart.output[Uart.byteCnt] = 0xAA;
288 Uart.byteCnt++;
289 Uart.output[Uart.byteCnt] = error & 0xFF;
290 Uart.byteCnt++;
291 Uart.output[Uart.byteCnt] = 0xAA;
292 Uart.byteCnt++;
293 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
294 Uart.byteCnt++;
295 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
296 Uart.byteCnt++;
297 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
298 Uart.byteCnt++;
299 Uart.output[Uart.byteCnt] = 0xAA;
300 Uart.byteCnt++;
301 return TRUE;
302 }*/
303 }
304
305 }
306 else {
307 bit = Uart.bitBuffer & 0xf0;
308 bit >>= 4;
309 bit ^= 0x0F; // drops become 1s ;-)
310 if(bit) {
311 // should have been high or at least (4 * 128) / fc
312 // according to ISO this should be at least (9 * 128 + 20) / fc
313 if(Uart.highCnt == 8) {
314 // we went low, so this could be start of communication
315 // it turns out to be safer to choose a less significant
316 // syncbit... so we check whether the neighbour also represents the drop
317 Uart.posCnt = 1; // apparently we are busy with our first half bit period
318 Uart.syncBit = bit & 8;
319 Uart.samples = 3;
320 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
321 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
322 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
323 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
324 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
325 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
326 Uart.syncBit = 8;
327
328 // the first half bit period is expected in next sample
329 Uart.posCnt = 0;
330 Uart.samples = 3;
331 }
332 }
333 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
334
335 Uart.syncBit <<= 4;
336 Uart.state = STATE_START_OF_COMMUNICATION;
337 Uart.bitCnt = 0;
338 Uart.byteCnt = 0;
339 Uart.parityBits = 0;
340 Uart.nOutOfCnt = 0;
341 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
342 Uart.dropPosition = 0;
343 Uart.shiftReg = 0;
9f693930 344 //error = 0;
cee5a30d 345 }
346 else {
347 Uart.highCnt = 0;
348 }
349 }
350 else {
351 if(Uart.highCnt < 8) {
352 Uart.highCnt++;
353 }
354 }
355 }
356
357 return FALSE;
358}
359
360//=============================================================================
1e262141 361// Manchester
cee5a30d 362//=============================================================================
363
364static struct {
365 enum {
366 DEMOD_UNSYNCD,
367 DEMOD_START_OF_COMMUNICATION,
368 DEMOD_START_OF_COMMUNICATION2,
369 DEMOD_START_OF_COMMUNICATION3,
370 DEMOD_SOF_COMPLETE,
371 DEMOD_MANCHESTER_D,
372 DEMOD_MANCHESTER_E,
373 DEMOD_END_OF_COMMUNICATION,
374 DEMOD_END_OF_COMMUNICATION2,
375 DEMOD_MANCHESTER_F,
376 DEMOD_ERROR_WAIT
377 } state;
378 int bitCount;
379 int posCount;
380 int syncBit;
381 int parityBits;
382 uint16_t shiftReg;
383 int buffer;
384 int buffer2;
385 int buffer3;
386 int buff;
387 int samples;
388 int len;
389 enum {
390 SUB_NONE,
391 SUB_FIRST_HALF,
392 SUB_SECOND_HALF,
393 SUB_BOTH
394 } sub;
395 uint8_t *output;
396} Demod;
397
398static RAMFUNC int ManchesterDecoding(int v)
399{
400 int bit;
401 int modulation;
402 int error = 0;
403
404 bit = Demod.buffer;
405 Demod.buffer = Demod.buffer2;
406 Demod.buffer2 = Demod.buffer3;
407 Demod.buffer3 = v;
408
409 if(Demod.buff < 3) {
410 Demod.buff++;
411 return FALSE;
412 }
413
414 if(Demod.state==DEMOD_UNSYNCD) {
415 Demod.output[Demod.len] = 0xfa;
416 Demod.syncBit = 0;
417 //Demod.samples = 0;
418 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
cee5a30d 419
420 if(bit & 0x08) {
421 Demod.syncBit = 0x08;
422 }
423
424 if(bit & 0x04) {
425 if(Demod.syncBit) {
426 bit <<= 4;
427 }
428 Demod.syncBit = 0x04;
429 }
430
431 if(bit & 0x02) {
432 if(Demod.syncBit) {
433 bit <<= 2;
434 }
435 Demod.syncBit = 0x02;
436 }
437
438 if(bit & 0x01 && Demod.syncBit) {
439 Demod.syncBit = 0x01;
440 }
441
442 if(Demod.syncBit) {
443 Demod.len = 0;
444 Demod.state = DEMOD_START_OF_COMMUNICATION;
445 Demod.sub = SUB_FIRST_HALF;
446 Demod.bitCount = 0;
447 Demod.shiftReg = 0;
448 Demod.parityBits = 0;
449 Demod.samples = 0;
450 if(Demod.posCount) {
451 //if(trigger) LED_A_OFF(); // Not useful in this case...
452 switch(Demod.syncBit) {
453 case 0x08: Demod.samples = 3; break;
454 case 0x04: Demod.samples = 2; break;
455 case 0x02: Demod.samples = 1; break;
456 case 0x01: Demod.samples = 0; break;
457 }
458 // SOF must be long burst... otherwise stay unsynced!!!
459 if(!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
460 Demod.state = DEMOD_UNSYNCD;
461 }
462 }
463 else {
464 // SOF must be long burst... otherwise stay unsynced!!!
465 if(!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
466 Demod.state = DEMOD_UNSYNCD;
467 error = 0x88;
468 }
469
470 }
471 error = 0;
472
473 }
474 }
475 else {
476 modulation = bit & Demod.syncBit;
477 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
478 //modulation = ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
479
480 Demod.samples += 4;
481
482 if(Demod.posCount==0) {
483 Demod.posCount = 1;
484 if(modulation) {
485 Demod.sub = SUB_FIRST_HALF;
486 }
487 else {
488 Demod.sub = SUB_NONE;
489 }
490 }
491 else {
492 Demod.posCount = 0;
493 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
494 if(Demod.state!=DEMOD_ERROR_WAIT) {
495 Demod.state = DEMOD_ERROR_WAIT;
496 Demod.output[Demod.len] = 0xaa;
497 error = 0x01;
498 }
499 }*/
500 //else if(modulation) {
501 if(modulation) {
502 if(Demod.sub == SUB_FIRST_HALF) {
503 Demod.sub = SUB_BOTH;
504 }
505 else {
506 Demod.sub = SUB_SECOND_HALF;
507 }
508 }
509 else if(Demod.sub == SUB_NONE) {
510 if(Demod.state == DEMOD_SOF_COMPLETE) {
511 Demod.output[Demod.len] = 0x0f;
512 Demod.len++;
513 Demod.parityBits <<= 1;
514 Demod.parityBits ^= OddByteParity[0x0f];
515 Demod.state = DEMOD_UNSYNCD;
516// error = 0x0f;
517 return TRUE;
518 }
519 else {
520 Demod.state = DEMOD_ERROR_WAIT;
521 error = 0x33;
522 }
523 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
524 Demod.state = DEMOD_ERROR_WAIT;
525 Demod.output[Demod.len] = 0xaa;
526 error = 0x01;
527 }*/
528 }
529
530 switch(Demod.state) {
531 case DEMOD_START_OF_COMMUNICATION:
532 if(Demod.sub == SUB_BOTH) {
533 //Demod.state = DEMOD_MANCHESTER_D;
534 Demod.state = DEMOD_START_OF_COMMUNICATION2;
535 Demod.posCount = 1;
536 Demod.sub = SUB_NONE;
537 }
538 else {
539 Demod.output[Demod.len] = 0xab;
540 Demod.state = DEMOD_ERROR_WAIT;
541 error = 0xd2;
542 }
543 break;
544 case DEMOD_START_OF_COMMUNICATION2:
545 if(Demod.sub == SUB_SECOND_HALF) {
546 Demod.state = DEMOD_START_OF_COMMUNICATION3;
547 }
548 else {
549 Demod.output[Demod.len] = 0xab;
550 Demod.state = DEMOD_ERROR_WAIT;
551 error = 0xd3;
552 }
553 break;
554 case DEMOD_START_OF_COMMUNICATION3:
555 if(Demod.sub == SUB_SECOND_HALF) {
556// Demod.state = DEMOD_MANCHESTER_D;
557 Demod.state = DEMOD_SOF_COMPLETE;
558 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
559 //Demod.len++;
560 }
561 else {
562 Demod.output[Demod.len] = 0xab;
563 Demod.state = DEMOD_ERROR_WAIT;
564 error = 0xd4;
565 }
566 break;
567 case DEMOD_SOF_COMPLETE:
568 case DEMOD_MANCHESTER_D:
569 case DEMOD_MANCHESTER_E:
570 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
571 // 00001111 = 1 (0 in 14443)
572 if(Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
573 Demod.bitCount++;
574 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
575 Demod.state = DEMOD_MANCHESTER_D;
576 }
577 else if(Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
578 Demod.bitCount++;
579 Demod.shiftReg >>= 1;
580 Demod.state = DEMOD_MANCHESTER_E;
581 }
582 else if(Demod.sub == SUB_BOTH) {
583 Demod.state = DEMOD_MANCHESTER_F;
584 }
585 else {
586 Demod.state = DEMOD_ERROR_WAIT;
587 error = 0x55;
588 }
589 break;
590
591 case DEMOD_MANCHESTER_F:
592 // Tag response does not need to be a complete byte!
593 if(Demod.len > 0 || Demod.bitCount > 0) {
594 if(Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
595 Demod.shiftReg >>= (9 - Demod.bitCount);
596 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
597 Demod.len++;
598 // No parity bit, so just shift a 0
599 Demod.parityBits <<= 1;
600 }
601
602 Demod.state = DEMOD_UNSYNCD;
603 return TRUE;
604 }
605 else {
606 Demod.output[Demod.len] = 0xad;
607 Demod.state = DEMOD_ERROR_WAIT;
608 error = 0x03;
609 }
610 break;
611
612 case DEMOD_ERROR_WAIT:
613 Demod.state = DEMOD_UNSYNCD;
614 break;
615
616 default:
617 Demod.output[Demod.len] = 0xdd;
618 Demod.state = DEMOD_UNSYNCD;
619 break;
620 }
621
622 /*if(Demod.bitCount>=9) {
623 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
624 Demod.len++;
625
626 Demod.parityBits <<= 1;
627 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
628
629 Demod.bitCount = 0;
630 Demod.shiftReg = 0;
631 }*/
632 if(Demod.bitCount>=8) {
633 Demod.shiftReg >>= 1;
634 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
635 Demod.len++;
636
637 // FOR ISO15639 PARITY NOT SEND OTA, JUST CALCULATE IT FOR THE CLIENT
638 Demod.parityBits <<= 1;
639 Demod.parityBits ^= OddByteParity[(Demod.shiftReg & 0xff)];
640
641 Demod.bitCount = 0;
642 Demod.shiftReg = 0;
643 }
644
645 if(error) {
646 Demod.output[Demod.len] = 0xBB;
647 Demod.len++;
648 Demod.output[Demod.len] = error & 0xFF;
649 Demod.len++;
650 Demod.output[Demod.len] = 0xBB;
651 Demod.len++;
652 Demod.output[Demod.len] = bit & 0xFF;
653 Demod.len++;
654 Demod.output[Demod.len] = Demod.buffer & 0xFF;
655 Demod.len++;
656 // Look harder ;-)
657 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
658 Demod.len++;
659 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
660 Demod.len++;
661 Demod.output[Demod.len] = 0xBB;
662 Demod.len++;
663 return TRUE;
664 }
665
666 }
667
668 } // end (state != UNSYNCED)
669
670 return FALSE;
671}
672
673//=============================================================================
1e262141 674// Finally, a `sniffer' for iClass communication
cee5a30d 675// Both sides of communication!
676//=============================================================================
677
678//-----------------------------------------------------------------------------
679// Record the sequence of commands sent by the reader to the tag, with
680// triggering so that we start recording at the point that the tag is moved
681// near the reader.
682//-----------------------------------------------------------------------------
683void RAMFUNC SnoopIClass(void)
684{
1e262141 685// DEFINED ABOVE
686// #define RECV_CMD_OFFSET 3032
687// #define RECV_RES_OFFSET 3096
688// #define DMA_BUFFER_OFFSET 3160
689// #define DMA_BUFFER_SIZE 4096
690// #define TRACE_LENGTH 3000
cee5a30d 691
692 // We won't start recording the frames that we acquire until we trigger;
693 // a good trigger condition to get started is probably when we see a
694 // response from the tag.
9f693930 695 //int triggered = FALSE; // FALSE to wait first for card
cee5a30d 696
697 // The command (reader -> tag) that we're receiving.
698 // The length of a received command will in most cases be no more than 18 bytes.
699 // So 32 should be enough!
700 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
701 // The response (tag -> reader) that we're receiving.
702 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
703
704 // As we receive stuff, we copy it from receivedCmd or receivedResponse
705 // into trace, along with its length and other annotations.
706 //uint8_t *trace = (uint8_t *)BigBuf;
707
1e262141 708 // reset traceLen to 0
709 iso14a_set_tracing(TRUE);
710 iso14a_clear_tracelen();
711 iso14a_set_trigger(FALSE);
cee5a30d 712
713 // The DMA buffer, used to stream samples from the FPGA
714 int8_t *dmaBuf = ((int8_t *)BigBuf) + DMA_BUFFER_OFFSET;
715 int lastRxCounter;
716 int8_t *upTo;
717 int smpl;
718 int maxBehindBy = 0;
719
720 // Count of samples received so far, so that we can include timing
721 // information in the trace buffer.
722 int samples = 0;
723 rsamples = 0;
724
725 memset(trace, 0x44, RECV_CMD_OFFSET);
726
727 // Set up the demodulator for tag -> reader responses.
728 Demod.output = receivedResponse;
729 Demod.len = 0;
730 Demod.state = DEMOD_UNSYNCD;
731
732 // Setup for the DMA.
733 FpgaSetupSsc();
734 upTo = dmaBuf;
735 lastRxCounter = DMA_BUFFER_SIZE;
736 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
737
738 // And the reader -> tag commands
739 memset(&Uart, 0, sizeof(Uart));
740 Uart.output = receivedCmd;
741 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
742 Uart.state = STATE_UNSYNCD;
743
744 // And put the FPGA in the appropriate mode
745 // Signal field is off with the appropriate LED
746 LED_D_OFF();
747 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
748 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
749
750 int div = 0;
751 //int div2 = 0;
752 int decbyte = 0;
753 int decbyter = 0;
754
755 // And now we loop, receiving samples.
756 for(;;) {
757 LED_A_ON();
758 WDT_HIT();
759 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
760 (DMA_BUFFER_SIZE-1);
761 if(behindBy > maxBehindBy) {
762 maxBehindBy = behindBy;
763 if(behindBy > 400) {
764 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
765 goto done;
766 }
767 }
768 if(behindBy < 1) continue;
769
770 LED_A_OFF();
771 smpl = upTo[0];
772 upTo++;
773 lastRxCounter -= 1;
774 if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
775 upTo -= DMA_BUFFER_SIZE;
776 lastRxCounter += DMA_BUFFER_SIZE;
777 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
778 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
779 }
780
781 //samples += 4;
782 samples += 1;
783 //div2++;
784
785 //if(div2 > 3) {
786 //div2 = 0;
787 //decbyte ^= ((smpl & 0x01) << (3 - div));
788 //decbyte ^= (((smpl & 0x01) | ((smpl & 0x02) >> 1)) << (3 - div)); // better already...
789 //decbyte ^= (((smpl & 0x01) | ((smpl & 0x02) >> 1) | ((smpl & 0x04) >> 2)) << (3 - div)); // even better...
790 if(smpl & 0xF) {
791 decbyte ^= (1 << (3 - div));
792 }
793 //decbyte ^= (MajorityNibble[(smpl & 0x0F)] << (3 - div));
794
795 // FOR READER SIDE COMMUMICATION...
796 //decbyte ^= ((smpl & 0x10) << (3 - div));
797 decbyter <<= 2;
798 decbyter ^= (smpl & 0x30);
799
800 div++;
801
802 if((div + 1) % 2 == 0) {
803 smpl = decbyter;
1e262141 804 if(OutOfNDecoding((smpl & 0xF0) >> 4)) {
cee5a30d 805 rsamples = samples - Uart.samples;
806 LED_C_ON();
807 //if(triggered) {
808 trace[traceLen++] = ((rsamples >> 0) & 0xff);
809 trace[traceLen++] = ((rsamples >> 8) & 0xff);
810 trace[traceLen++] = ((rsamples >> 16) & 0xff);
811 trace[traceLen++] = ((rsamples >> 24) & 0xff);
812 trace[traceLen++] = ((Uart.parityBits >> 0) & 0xff);
813 trace[traceLen++] = ((Uart.parityBits >> 8) & 0xff);
814 trace[traceLen++] = ((Uart.parityBits >> 16) & 0xff);
815 trace[traceLen++] = ((Uart.parityBits >> 24) & 0xff);
816 trace[traceLen++] = Uart.byteCnt;
817 memcpy(trace+traceLen, receivedCmd, Uart.byteCnt);
818 traceLen += Uart.byteCnt;
819 if(traceLen > TRACE_LENGTH) break;
820 //}
821 /* And ready to receive another command. */
822 Uart.state = STATE_UNSYNCD;
823 /* And also reset the demod code, which might have been */
824 /* false-triggered by the commands from the reader. */
825 Demod.state = DEMOD_UNSYNCD;
826 LED_B_OFF();
827 Uart.byteCnt = 0;
828 }
829 decbyter = 0;
830 }
831
832 if(div > 3) {
833 smpl = decbyte;
834 if(ManchesterDecoding(smpl & 0x0F)) {
835 rsamples = samples - Demod.samples;
836 LED_B_ON();
837
838 // timestamp, as a count of samples
839 trace[traceLen++] = ((rsamples >> 0) & 0xff);
840 trace[traceLen++] = ((rsamples >> 8) & 0xff);
841 trace[traceLen++] = ((rsamples >> 16) & 0xff);
842 trace[traceLen++] = 0x80 | ((rsamples >> 24) & 0xff);
843 trace[traceLen++] = ((Demod.parityBits >> 0) & 0xff);
844 trace[traceLen++] = ((Demod.parityBits >> 8) & 0xff);
845 trace[traceLen++] = ((Demod.parityBits >> 16) & 0xff);
846 trace[traceLen++] = ((Demod.parityBits >> 24) & 0xff);
847 // length
848 trace[traceLen++] = Demod.len;
849 memcpy(trace+traceLen, receivedResponse, Demod.len);
850 traceLen += Demod.len;
851 if(traceLen > TRACE_LENGTH) break;
852
9f693930 853 //triggered = TRUE;
cee5a30d 854
855 // And ready to receive another response.
856 memset(&Demod, 0, sizeof(Demod));
857 Demod.output = receivedResponse;
858 Demod.state = DEMOD_UNSYNCD;
859 LED_C_OFF();
860 }
861
862 div = 0;
863 decbyte = 0x00;
864 }
865 //}
866
867 if(BUTTON_PRESS()) {
868 DbpString("cancelled_a");
869 goto done;
870 }
871 }
872
873 DbpString("COMMAND FINISHED");
874
875 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
876 Dbprintf("%x %x %x", Uart.byteCntMax, traceLen, (int)Uart.output[0]);
877
878done:
879 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
880 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
881 Dbprintf("%x %x %x", Uart.byteCntMax, traceLen, (int)Uart.output[0]);
882 LED_A_OFF();
883 LED_B_OFF();
1e262141 884 LED_C_OFF();
885 LED_D_OFF();
886}
887
912a3e94 888void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
889 int i;
890 for(i = 0; i < 8; i++) {
891 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
1e262141 892 }
893}
894
895//-----------------------------------------------------------------------------
896// Wait for commands from reader
897// Stop when button is pressed
898// Or return TRUE when command is captured
899//-----------------------------------------------------------------------------
900static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen)
901{
912a3e94 902 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1e262141 903 // only, since we are receiving, not transmitting).
904 // Signal field is off with the appropriate LED
905 LED_D_OFF();
906 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
907
908 // Now run a `software UART' on the stream of incoming samples.
909 Uart.output = received;
910 Uart.byteCntMax = maxLen;
911 Uart.state = STATE_UNSYNCD;
912
913 for(;;) {
914 WDT_HIT();
915
916 if(BUTTON_PRESS()) return FALSE;
917
918 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
919 AT91C_BASE_SSC->SSC_THR = 0x00;
920 }
921 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
922 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
923 /*if(OutOfNDecoding((b & 0xf0) >> 4)) {
924 *len = Uart.byteCnt;
925 return TRUE;
926 }*/
927 if(OutOfNDecoding(b & 0x0f)) {
928 *len = Uart.byteCnt;
929 return TRUE;
930 }
931 }
932 }
933}
934
935
936//-----------------------------------------------------------------------------
937// Prepare tag messages
938//-----------------------------------------------------------------------------
939static void CodeIClassTagAnswer(const uint8_t *cmd, int len)
940{
941 int i;
942
943 ToSendReset();
944
945 // Send SOF
946 ToSend[++ToSendMax] = 0x00;
947 ToSend[++ToSendMax] = 0x00;
948 ToSend[++ToSendMax] = 0x00;
949 ToSend[++ToSendMax] = 0xff;
950 ToSend[++ToSendMax] = 0xff;
951 ToSend[++ToSendMax] = 0xff;
952 ToSend[++ToSendMax] = 0x00;
953 ToSend[++ToSendMax] = 0xff;
954
955 for(i = 0; i < len; i++) {
956 int j;
957 uint8_t b = cmd[i];
958
959 // Data bits
960 for(j = 0; j < 8; j++) {
961 if(b & 1) {
962 ToSend[++ToSendMax] = 0x00;
963 ToSend[++ToSendMax] = 0xff;
964 } else {
965 ToSend[++ToSendMax] = 0xff;
966 ToSend[++ToSendMax] = 0x00;
967 }
968 b >>= 1;
969 }
970 }
971
972 // Send EOF
973 ToSend[++ToSendMax] = 0xff;
974 ToSend[++ToSendMax] = 0x00;
975 ToSend[++ToSendMax] = 0xff;
976 ToSend[++ToSendMax] = 0xff;
977 ToSend[++ToSendMax] = 0xff;
978 ToSend[++ToSendMax] = 0x00;
979 ToSend[++ToSendMax] = 0x00;
980 ToSend[++ToSendMax] = 0x00;
981
982 // Convert from last byte pos to length
983 ToSendMax++;
984}
985
986// Only SOF
987static void CodeIClassTagSOF()
988{
989 ToSendReset();
990
991 // Send SOF
992 ToSend[++ToSendMax] = 0x00;
993 ToSend[++ToSendMax] = 0x00;
994 ToSend[++ToSendMax] = 0x00;
995 ToSend[++ToSendMax] = 0xff;
996 ToSend[++ToSendMax] = 0xff;
997 ToSend[++ToSendMax] = 0xff;
998 ToSend[++ToSendMax] = 0x00;
999 ToSend[++ToSendMax] = 0xff;
1000
1001 // Convert from last byte pos to length
1002 ToSendMax++;
1003}
1004
1005//-----------------------------------------------------------------------------
1006// Simulate iClass Card
1007// Only CSN (Card Serial Number)
1008//
1009//-----------------------------------------------------------------------------
1010void SimulateIClass(uint8_t arg0, uint8_t *datain)
1011{
1e262141 1012 uint8_t simType = arg0;
1e262141 1013
1014 // CSN followed by two CRC bytes
1e262141 1015 uint8_t response2[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
912a3e94 1016 uint8_t response3[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1e262141 1017
1018 // e-Purse
1019 uint8_t response4[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1e262141 1020
1021 if(simType == 0) {
1022 // Use the CSN from commandline
1023 memcpy(response3, datain, 8);
1024 }
1025
1026 // Construct anticollision-CSN
912a3e94 1027 rotateCSN(response3,response2);
1e262141 1028
1029 // Compute CRC on both CSNs
1030 ComputeCrc14443(CRC_ICLASS, response2, 8, &response2[8], &response2[9]);
1031 ComputeCrc14443(CRC_ICLASS, response3, 8, &response3[8], &response3[9]);
1032
1033 // Reader 0a
1034 // Tag 0f
1035 // Reader 0c
1036 // Tag anticoll. CSN
1037 // Reader 81 anticoll. CSN
1038 // Tag CSN
1039
1040 uint8_t *resp;
1041 int respLen;
1042
1043 // Respond SOF -- takes 8 bytes
912a3e94 1044 uint8_t *resp1 = (((uint8_t *)BigBuf) + 800);
1e262141 1045 int resp1Len;
1046
1047 // Anticollision CSN (rotated CSN)
1048 // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit)
912a3e94 1049 uint8_t *resp2 = (((uint8_t *)BigBuf) + 810);
1e262141 1050 int resp2Len;
1051
1052 // CSN
1053 // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit)
912a3e94 1054 uint8_t *resp3 = (((uint8_t *)BigBuf) + 990);
1055 int resp3Len;
1e262141 1056
1057 // e-Purse
1058 // 144: Takes 16 bytes for SOF/EOF and 8 * 16 = 128 bytes (2 bytes/bit)
912a3e94 1059 uint8_t *resp4 = (((uint8_t *)BigBuf) + 1170);
1e262141 1060 int resp4Len;
1061
1062 // + 1720..
912a3e94 1063 uint8_t *receivedCmd = (uint8_t *)BigBuf;
1064 memset(receivedCmd, 0x44, 400);
1e262141 1065 int len;
1066
1e262141 1067 // Prepare card messages
1068 ToSendMax = 0;
1069
1070 // First card answer: SOF
1071 CodeIClassTagSOF();
1072 memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
1073
1074 // Anticollision CSN
1075 CodeIClassTagAnswer(response2, sizeof(response2));
1076 memcpy(resp2, ToSend, ToSendMax); resp2Len = ToSendMax;
1077
1078 // CSN
1079 CodeIClassTagAnswer(response3, sizeof(response3));
912a3e94 1080 memcpy(resp3, ToSend, ToSendMax); resp3Len = ToSendMax;
1e262141 1081
1082 // e-Purse
1083 CodeIClassTagAnswer(response4, sizeof(response4));
1084 memcpy(resp4, ToSend, ToSendMax); resp4Len = ToSendMax;
1085
1086 // We need to listen to the high-frequency, peak-detected path.
1087 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1088 FpgaSetupSsc();
1089
1090 // To control where we are in the protocol
1e262141 1091 int cmdsRecvd = 0;
912a3e94 1092
1e262141 1093 LED_A_ON();
1094 for(;;) {
1095 LED_B_OFF();
1096 if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
1097 DbpString("button press");
1098 break;
1099 }
1100
1101 // Okay, look at the command now.
1e262141 1102 if(receivedCmd[0] == 0x0a) {
1103 // Reader in anticollission phase
1104 resp = resp1; respLen = resp1Len; //order = 1;
1e262141 1105 //resp = resp2; respLen = resp2Len; order = 2;
1106 //DbpString("Hello request from reader:");
1107 } else if(receivedCmd[0] == 0x0c) {
1108 // Reader asks for anticollission CSN
1109 resp = resp2; respLen = resp2Len; //order = 2;
1e262141 1110 //DbpString("Reader requests anticollission CSN:");
1111 } else if(receivedCmd[0] == 0x81) {
1112 // Reader selects anticollission CSN.
1113 // Tag sends the corresponding real CSN
912a3e94 1114 resp = resp3; respLen = resp3Len; //order = 3;
1e262141 1115 //DbpString("Reader selects anticollission CSN:");
1116 } else if(receivedCmd[0] == 0x88) {
1117 // Read e-purse (88 02)
1118 resp = resp4; respLen = resp4Len; //order = 4;
1e262141 1119 LED_B_ON();
1120 } else if(receivedCmd[0] == 0x05) {
1121 // Reader random and reader MAC!!!
1122 // Lets store this ;-)
912a3e94 1123 Dbprintf(" CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1e262141 1124 response3[0], response3[1], response3[2],
1125 response3[3], response3[4], response3[5],
1126 response3[6], response3[7]);
1127 Dbprintf("READER AUTH (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",
1128 len,
1129 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1130 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1131 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1132
1133 // Do not respond
1134 // We do not know what to answer, so lets keep quit
1135 resp = resp1; respLen = 0; //order = 5;
1136 } else if(receivedCmd[0] == 0x00 && len == 1) {
1137 // Reader ends the session
1138 resp = resp1; respLen = 0; //order = 0;
912a3e94 1139/* } else if(receivedCmd[0] == 0x50) {
1140 // Received a HALT
1141 resp = resp1; respLen = 0; order = 5; // Do nothing
1142 DbpString("Reader requested we HALT!:");
1143*/
1e262141 1144 } else {
1145 // Never seen this command before
1146 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1147 len,
1148 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1149 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1150 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1151 // Do not respond
1152 resp = resp1; respLen = 0; //order = 0;
1e262141 1153 }
1154
912a3e94 1155 memset(receivedCmd, 0x44, 32);
1156
1e262141 1157 if(cmdsRecvd > 999) {
1158 DbpString("1000 commands later...");
1159 break;
1160 }
1161 else {
1162 cmdsRecvd++;
1163 }
1164
1165 if(respLen <= 0) continue;
1166
1167 SendIClassAnswer(resp, respLen, 21);
1e262141 1168 }
1169
912a3e94 1170 Dbprintf("%x", cmdsRecvd);
1e262141 1171 LED_A_OFF();
1172 LED_B_OFF();
1173}
1174
1175static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
1176{
1177 int i = 0, u = 0, d = 0;
1178 uint8_t b = 0;
912a3e94 1179 // return 0;
1180 // Modulate Manchester
1181 // FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD424);
1e262141 1182 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1183 AT91C_BASE_SSC->SSC_THR = 0x00;
1184 FpgaSetupSsc();
1185
1186 // send cycle
1187 for(;;) {
1188 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1189 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1190 (void)b;
1191 }
1192 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1193 if(d < delay) {
1194 b = 0x00;
1195 d++;
1196 }
1197 else if(i >= respLen) {
1198 b = 0x00;
1199 u++;
1200 } else {
1201 b = resp[i];
1202 u++;
1203 if(u > 1) { i++; u = 0; }
1204 }
1205 AT91C_BASE_SSC->SSC_THR = b;
1206
1207 if(u > 4) break;
1208 }
1209 if(BUTTON_PRESS()) {
1210 break;
1211 }
1212 }
1213
1214 return 0;
1215}
1216
1217/// THE READER CODE
1218
1219//-----------------------------------------------------------------------------
1220// Transmit the command (to the tag) that was placed in ToSend[].
1221//-----------------------------------------------------------------------------
1222static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait)
1223{
1224 int c;
1225
1226 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1227 AT91C_BASE_SSC->SSC_THR = 0x00;
1228 FpgaSetupSsc();
1229
1230 if (wait)
1231 if(*wait < 10)
1232 *wait = 10;
1233
1234 for(c = 0; c < *wait;) {
1235 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1236 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1237 c++;
1238 }
1239 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1240 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1241 (void)r;
1242 }
1243 WDT_HIT();
1244 }
1245
1246 uint8_t sendbyte;
1247 bool firstpart = TRUE;
1248 c = 0;
1249 for(;;) {
1250 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1251
1252 // DOUBLE THE SAMPLES!
1253 if(firstpart) {
1254 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1255 }
1256 else {
1257 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1258 c++;
1259 }
1260 if(sendbyte == 0xff) {
1261 sendbyte = 0xfe;
1262 }
1263 AT91C_BASE_SSC->SSC_THR = sendbyte;
1264 firstpart = !firstpart;
1265
1266 if(c >= len) {
1267 break;
1268 }
1269 }
1270 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1271 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1272 (void)r;
1273 }
1274 WDT_HIT();
1275 }
1276 if (samples) *samples = (c + *wait) << 3;
1277}
1278
1279
1280//-----------------------------------------------------------------------------
1281// Prepare iClass reader command to send to FPGA
1282//-----------------------------------------------------------------------------
1283void CodeIClassCommand(const uint8_t * cmd, int len)
1284{
1285 int i, j, k;
1286 uint8_t b;
1287
1288 ToSendReset();
1289
1290 // Start of Communication: 1 out of 4
1291 ToSend[++ToSendMax] = 0xf0;
1292 ToSend[++ToSendMax] = 0x00;
1293 ToSend[++ToSendMax] = 0x0f;
1294 ToSend[++ToSendMax] = 0x00;
1295
1296 // Modulate the bytes
1297 for (i = 0; i < len; i++) {
1298 b = cmd[i];
1299 for(j = 0; j < 4; j++) {
1300 for(k = 0; k < 4; k++) {
1301 if(k == (b & 3)) {
1302 ToSend[++ToSendMax] = 0x0f;
1303 }
1304 else {
1305 ToSend[++ToSendMax] = 0x00;
1306 }
1307 }
1308 b >>= 2;
1309 }
1310 }
1311
1312 // End of Communication
1313 ToSend[++ToSendMax] = 0x00;
1314 ToSend[++ToSendMax] = 0x00;
1315 ToSend[++ToSendMax] = 0xf0;
1316 ToSend[++ToSendMax] = 0x00;
1317
1318 // Convert from last character reference to length
1319 ToSendMax++;
1320}
1321
1322void ReaderTransmitIClass(uint8_t* frame, int len)
1323{
1324 int wait = 0;
1325 int samples = 0;
1326 int par = 0;
1327
1328 // This is tied to other size changes
1329 // uint8_t* frame_addr = ((uint8_t*)BigBuf) + 2024;
1330 CodeIClassCommand(frame,len);
1331
1332 // Select the card
1333 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1334 if(trigger)
1335 LED_A_ON();
1336
1337 // Store reader command in buffer
1338 if (tracing) LogTrace(frame,len,0,par,TRUE);
1339}
1340
1341//-----------------------------------------------------------------------------
1342// Wait a certain time for tag response
1343// If a response is captured return TRUE
1344// If it takes too long return FALSE
1345//-----------------------------------------------------------------------------
1346static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1347{
1348 // buffer needs to be 512 bytes
1349 int c;
1350
1351 // Set FPGA mode to "reader listen mode", no modulation (listen
1352 // only, since we are receiving, not transmitting).
1353 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1354
1355 // Now get the answer from the card
1356 Demod.output = receivedResponse;
1357 Demod.len = 0;
1358 Demod.state = DEMOD_UNSYNCD;
1359
1360 uint8_t b;
1361 if (elapsed) *elapsed = 0;
1362
1363 bool skip = FALSE;
1364
1365 c = 0;
1366 for(;;) {
1367 WDT_HIT();
1368
1369 if(BUTTON_PRESS()) return FALSE;
1370
1371 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1372 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1373 if (elapsed) (*elapsed)++;
1374 }
1375 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1376 if(c < timeout) { c++; } else { return FALSE; }
1377 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1378 skip = !skip;
1379 if(skip) continue;
1380 /*if(ManchesterDecoding((b>>4) & 0xf)) {
1381 *samples = ((c - 1) << 3) + 4;
1382 return TRUE;
1383 }*/
1384 if(ManchesterDecoding(b & 0x0f)) {
1385 *samples = c << 3;
1386 return TRUE;
1387 }
1388 }
1389 }
1390}
1391
1392int ReaderReceiveIClass(uint8_t* receivedAnswer)
1393{
1394 int samples = 0;
1395 if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return FALSE;
1396 if (tracing) LogTrace(receivedAnswer,Demod.len,samples,Demod.parityBits,FALSE);
1397 if(samples == 0) return FALSE;
1398 return Demod.len;
1399}
1400
1401// Reader iClass Anticollission
1402void ReaderIClass(uint8_t arg0) {
1e262141 1403 uint8_t act_all[] = { 0x0a };
1404 uint8_t identify[] = { 0x0c };
912a3e94 1405 //uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1e262141 1406
1407 uint8_t* resp = (((uint8_t *)BigBuf) + 3560); // was 3560 - tied to other size changes
1408
1409 // Reset trace buffer
1410 memset(trace, 0x44, RECV_CMD_OFFSET);
1411 traceLen = 0;
1412
1413 // Setup SSC
1414 FpgaSetupSsc();
1415 // Start from off (no field generated)
1416 // Signal field is off with the appropriate LED
cee5a30d 1417 LED_D_OFF();
1e262141 1418 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1419 SpinDelay(200);
1420
1421 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1422
1423 // Now give it time to spin up.
1424 // Signal field is on with the appropriate LED
1425 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1426 SpinDelay(200);
1427
1428 LED_A_ON();
1429
1430 for(;;) {
1431 if(traceLen > TRACE_LENGTH || BUTTON_PRESS()) break;
1432
1433 // Send act_all
1434 ReaderTransmitIClass(act_all, 1);
1435 // Card present?
1436 if(ReaderReceiveIClass(resp)) {
1437 ReaderTransmitIClass(identify, 1);
912a3e94 1438 if(ReaderReceiveIClass(resp)) {
1439 //ReaderTransmitIClass(select, sizeof(select));
1e262141 1440 }
1441 }
1442 WDT_HIT();
1443 }
1444
1445 LED_A_OFF();
1446
912a3e94 1447/* if(resp_data)
1448 memcpy(resp_data->atqa, resp, 2);
1449
1450 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1451 // which case we need to make a cascade 2 request and select - this is a long UID
1452 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1453 for(; sak & 0x04; cascade_level++)
1454 {
1455 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1456 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1457
1458 // SELECT_ALL
1459 ReaderTransmit(sel_all,sizeof(sel_all));
1460 if (!ReaderReceive(resp)) return 0;
1461 if(uid_ptr) memcpy(uid_ptr + cascade_level*4, resp, 4);
1462
1463 // calculate crypto UID
1464 if(cuid_ptr) *cuid_ptr = bytes_to_num(resp, 4);
1465
1466 // Construct SELECT UID command
1467 memcpy(sel_uid+2,resp,5);
1468 AppendCrc14443a(sel_uid,7);
1469 ReaderTransmit(sel_uid,sizeof(sel_uid));
1470
1471 // Receive the SAK
1472 if (!ReaderReceive(resp)) return 0;
1473 sak = resp[0];
1474 }
1475 if(resp_data) {
1476 resp_data->sak = sak;
1477 resp_data->ats_len = 0;
1478 }
1479 //-- this byte not UID, it CT. http://www.nxp.com/documents/application_note/AN10927.pdf page 3
1480 if (uid_ptr[0] == 0x88) {
1481 memcpy(uid_ptr, uid_ptr + 1, 7);
1482 uid_ptr[7] = 0;
1483 }
1484
1485 if( (sak & 0x20) == 0)
1486 return 2; // non iso14443a compliant tag
1487
1488 // Request for answer to select
1489 if(resp_data) { // JCOP cards - if reader sent RATS then there is no MIFARE session at all!!!
1490 AppendCrc14443a(rats, 2);
1491 ReaderTransmit(rats, sizeof(rats));
1492
1493 if (!(len = ReaderReceive(resp))) return 0;
1494
1495 memcpy(resp_data->ats, resp, sizeof(resp_data->ats));
1496 resp_data->ats_len = len;
1497 }
1498*/
cee5a30d 1499}
1500
912a3e94 1501
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