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bd20f8f4 | 1 | //----------------------------------------------------------------------------- |
bd20f8f4 | 2 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, |
3 | // at your option, any later version. See the LICENSE.txt file for the text of | |
4 | // the license. | |
5 | //----------------------------------------------------------------------------- | |
d19929cb | 6 | // Hitag2 emulation (preliminary test version) |
bd20f8f4 | 7 | // |
d19929cb | 8 | // (c) 2009 Henryk Plötz <henryk@ploetzli.ch> |
9 | //----------------------------------------------------------------------------- | |
10 | // Hitag2 complete rewrite of the code | |
11 | // - Fixed modulation/encoding issues | |
12 | // - Rewrote code for transponder emulation | |
13 | // - Added snooping of transponder communication | |
14 | // - Added reader functionality | |
15 | // | |
16 | // (c) 2012 Roel Verdult | |
bd20f8f4 | 17 | //----------------------------------------------------------------------------- |
3742d905 | 18 | |
e30c654b | 19 | #include "proxmark3.h" |
3742d905 | 20 | #include "apps.h" |
f7e3ed82 | 21 | #include "util.h" |
3742d905 | 22 | #include "hitag2.h" |
9ab7a6c7 | 23 | #include "string.h" |
3742d905 | 24 | |
d19929cb | 25 | static bool bQuiet; |
26 | ||
27 | bool bCrypto; | |
bde10a50 | 28 | bool bAuthenticating; |
d19929cb | 29 | bool bPwd; |
ab4da50d | 30 | bool bSuccessful; |
3742d905 | 31 | |
32 | struct hitag2_tag { | |
33 | uint32_t uid; | |
e30c654b | 34 | enum { |
d19929cb | 35 | TAG_STATE_RESET = 0x01, // Just powered up, awaiting GetSnr |
36 | TAG_STATE_ACTIVATING = 0x02 , // In activation phase (password mode), sent UID, awaiting reader password | |
37 | TAG_STATE_ACTIVATED = 0x03, // Activation complete, awaiting read/write commands | |
38 | TAG_STATE_WRITING = 0x04, // In write command, awaiting sector contents to be written | |
3742d905 | 39 | } state; |
40 | unsigned int active_sector; | |
d19929cb | 41 | byte_t crypto_active; |
42 | uint64_t cs; | |
43 | byte_t sectors[12][4]; | |
3742d905 | 44 | }; |
45 | ||
bde10a50 | 46 | static struct hitag2_tag tag = { |
d19929cb | 47 | .state = TAG_STATE_RESET, |
48 | .sectors = { // Password mode: | Crypto mode: | |
49 | [0] = { 0x02, 0x4e, 0x02, 0x20}, // UID | UID | |
50 | [1] = { 0x4d, 0x49, 0x4b, 0x52}, // Password RWD | 32 bit LSB key | |
51 | [2] = { 0x20, 0xf0, 0x4f, 0x4e}, // Reserved | 16 bit MSB key, 16 bit reserved | |
52 | [3] = { 0x0e, 0xaa, 0x48, 0x54}, // Configuration, password TAG | Configuration, password TAG | |
53 | [4] = { 0x46, 0x5f, 0x4f, 0x4b}, // Data: F_OK | |
54 | [5] = { 0x55, 0x55, 0x55, 0x55}, // Data: UUUU | |
55 | [6] = { 0xaa, 0xaa, 0xaa, 0xaa}, // Data: .... | |
56 | [7] = { 0x55, 0x55, 0x55, 0x55}, // Data: UUUU | |
57 | [8] = { 0x00, 0x00, 0x00, 0x00}, // RSK Low | |
58 | [9] = { 0x00, 0x00, 0x00, 0x00}, // RSK High | |
59 | [10] = { 0x00, 0x00, 0x00, 0x00}, // RCF | |
60 | [11] = { 0x00, 0x00, 0x00, 0x00}, // SYNC | |
61 | }, | |
3742d905 | 62 | }; |
63 | ||
d19929cb | 64 | //#define TRACE_LENGTH 3000 |
65 | //uint8_t *trace = (uint8_t *) BigBuf; | |
66 | //int traceLen = 0; | |
67 | //int rsamples = 0; | |
e30c654b | 68 | |
d19929cb | 69 | #define AUTH_TABLE_OFFSET FREE_BUFFER_OFFSET |
70 | #define AUTH_TABLE_LENGTH FREE_BUFFER_SIZE | |
71 | byte_t* auth_table = (byte_t *)BigBuf+AUTH_TABLE_OFFSET; | |
72 | size_t auth_table_pos = 0; | |
73 | size_t auth_table_len = AUTH_TABLE_LENGTH; | |
3742d905 | 74 | |
d19929cb | 75 | byte_t password[4]; |
76 | byte_t NrAr[8]; | |
bde10a50 | 77 | byte_t key[8]; |
78 | uint64_t cipher_state; | |
3742d905 | 79 | |
80 | /* Following is a modified version of cryptolib.com/ciphers/hitag2/ */ | |
81 | // Software optimized 48-bit Philips/NXP Mifare Hitag2 PCF7936/46/47/52 stream cipher algorithm by I.C. Wiener 2006-2007. | |
82 | // For educational purposes only. | |
83 | // No warranties or guarantees of any kind. | |
84 | // This code is released into the public domain by its author. | |
85 | ||
86 | // Basic macros: | |
87 | ||
88 | #define u8 uint8_t | |
89 | #define u32 uint32_t | |
90 | #define u64 uint64_t | |
91 | #define rev8(x) ((((x)>>7)&1)+((((x)>>6)&1)<<1)+((((x)>>5)&1)<<2)+((((x)>>4)&1)<<3)+((((x)>>3)&1)<<4)+((((x)>>2)&1)<<5)+((((x)>>1)&1)<<6)+(((x)&1)<<7)) | |
92 | #define rev16(x) (rev8 (x)+(rev8 (x>> 8)<< 8)) | |
93 | #define rev32(x) (rev16(x)+(rev16(x>>16)<<16)) | |
94 | #define rev64(x) (rev32(x)+(rev32(x>>32)<<32)) | |
95 | #define bit(x,n) (((x)>>(n))&1) | |
96 | #define bit32(x,n) ((((x)[(n)>>5])>>((n)))&1) | |
97 | #define inv32(x,i,n) ((x)[(i)>>5]^=((u32)(n))<<((i)&31)) | |
98 | #define rotl64(x, n) ((((u64)(x))<<((n)&63))+(((u64)(x))>>((0-(n))&63))) | |
99 | ||
100 | // Single bit Hitag2 functions: | |
101 | ||
102 | #define i4(x,a,b,c,d) ((u32)((((x)>>(a))&1)+(((x)>>(b))&1)*2+(((x)>>(c))&1)*4+(((x)>>(d))&1)*8)) | |
103 | ||
104 | static const u32 ht2_f4a = 0x2C79; // 0010 1100 0111 1001 | |
105 | static const u32 ht2_f4b = 0x6671; // 0110 0110 0111 0001 | |
106 | static const u32 ht2_f5c = 0x7907287B; // 0111 1001 0000 0111 0010 1000 0111 1011 | |
107 | ||
108 | static u32 _f20 (const u64 x) | |
109 | { | |
110 | u32 i5; | |
e30c654b | 111 | |
3742d905 | 112 | i5 = ((ht2_f4a >> i4 (x, 1, 2, 4, 5)) & 1)* 1 |
113 | + ((ht2_f4b >> i4 (x, 7,11,13,14)) & 1)* 2 | |
114 | + ((ht2_f4b >> i4 (x,16,20,22,25)) & 1)* 4 | |
115 | + ((ht2_f4b >> i4 (x,27,28,30,32)) & 1)* 8 | |
116 | + ((ht2_f4a >> i4 (x,33,42,43,45)) & 1)*16; | |
e30c654b | 117 | |
3742d905 | 118 | return (ht2_f5c >> i5) & 1; |
119 | } | |
120 | ||
121 | static u64 _hitag2_init (const u64 key, const u32 serial, const u32 IV) | |
122 | { | |
123 | u32 i; | |
124 | u64 x = ((key & 0xFFFF) << 32) + serial; | |
e30c654b | 125 | |
3742d905 | 126 | for (i = 0; i < 32; i++) |
127 | { | |
128 | x >>= 1; | |
129 | x += (u64) (_f20 (x) ^ (((IV >> i) ^ (key >> (i+16))) & 1)) << 47; | |
130 | } | |
131 | return x; | |
132 | } | |
133 | ||
134 | static u64 _hitag2_round (u64 *state) | |
135 | { | |
136 | u64 x = *state; | |
e30c654b | 137 | |
3742d905 | 138 | x = (x >> 1) + |
139 | ((((x >> 0) ^ (x >> 2) ^ (x >> 3) ^ (x >> 6) | |
140 | ^ (x >> 7) ^ (x >> 8) ^ (x >> 16) ^ (x >> 22) | |
141 | ^ (x >> 23) ^ (x >> 26) ^ (x >> 30) ^ (x >> 41) | |
142 | ^ (x >> 42) ^ (x >> 43) ^ (x >> 46) ^ (x >> 47)) & 1) << 47); | |
e30c654b | 143 | |
3742d905 | 144 | *state = x; |
145 | return _f20 (x); | |
146 | } | |
147 | ||
3742d905 | 148 | static u32 _hitag2_byte (u64 * x) |
149 | { | |
150 | u32 i, c; | |
e30c654b | 151 | |
3742d905 | 152 | for (i = 0, c = 0; i < 8; i++) c += (u32) _hitag2_round (x) << (i^7); |
153 | return c; | |
154 | } | |
155 | ||
d19929cb | 156 | size_t nbytes(size_t nbits) { |
157 | return (nbits/8)+((nbits%8)>0); | |
158 | } | |
159 | ||
160 | int hitag2_reset(void) | |
161 | { | |
162 | tag.state = TAG_STATE_RESET; | |
163 | tag.crypto_active = 0; | |
164 | return 0; | |
165 | } | |
3742d905 | 166 | |
d19929cb | 167 | int hitag2_init(void) |
168 | { | |
bde10a50 | 169 | // memcpy(&tag, &resetdata, sizeof(tag)); |
d19929cb | 170 | hitag2_reset(); |
171 | return 0; | |
172 | } | |
3742d905 | 173 | |
d19929cb | 174 | static void hitag2_cipher_reset(struct hitag2_tag *tag, const byte_t *iv) |
3742d905 | 175 | { |
bde10a50 | 176 | uint64_t key = ((uint64_t)tag->sectors[2][2]) | |
177 | ((uint64_t)tag->sectors[2][3] << 8) | | |
178 | ((uint64_t)tag->sectors[1][0] << 16) | | |
179 | ((uint64_t)tag->sectors[1][1] << 24) | | |
180 | ((uint64_t)tag->sectors[1][2] << 32) | | |
181 | ((uint64_t)tag->sectors[1][3] << 40); | |
182 | uint32_t uid = ((uint32_t)tag->sectors[0][0]) | | |
183 | ((uint32_t)tag->sectors[0][1] << 8) | | |
184 | ((uint32_t)tag->sectors[0][2] << 16) | | |
185 | ((uint32_t)tag->sectors[0][3] << 24); | |
3742d905 | 186 | uint32_t iv_ = (((uint32_t)(iv[0]))) | |
187 | (((uint32_t)(iv[1])) << 8) | | |
188 | (((uint32_t)(iv[2])) << 16) | | |
189 | (((uint32_t)(iv[3])) << 24); | |
d19929cb | 190 | tag->cs = _hitag2_init(rev64(key), rev32(uid), rev32(iv_)); |
3742d905 | 191 | } |
192 | ||
d19929cb | 193 | static int hitag2_cipher_authenticate(uint64_t* cs, const byte_t *authenticator_is) |
3742d905 | 194 | { |
d19929cb | 195 | byte_t authenticator_should[4]; |
196 | authenticator_should[0] = ~_hitag2_byte(cs); | |
197 | authenticator_should[1] = ~_hitag2_byte(cs); | |
198 | authenticator_should[2] = ~_hitag2_byte(cs); | |
199 | authenticator_should[3] = ~_hitag2_byte(cs); | |
200 | return (memcmp(authenticator_should, authenticator_is, 4) == 0); | |
3742d905 | 201 | } |
202 | ||
d19929cb | 203 | static int hitag2_cipher_transcrypt(uint64_t* cs, byte_t *data, unsigned int bytes, unsigned int bits) |
3742d905 | 204 | { |
205 | int i; | |
d19929cb | 206 | for(i=0; i<bytes; i++) data[i] ^= _hitag2_byte(cs); |
207 | for(i=0; i<bits; i++) data[bytes] ^= _hitag2_round(cs) << (7-i); | |
3742d905 | 208 | return 0; |
209 | } | |
d19929cb | 210 | |
211 | // Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK) | |
212 | // TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz | |
213 | // Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier) | |
214 | // T0 = TIMER_CLOCK1 / 125000 = 192 | |
215 | #define T0 192 | |
216 | ||
217 | #define SHORT_COIL() LOW(GPIO_SSC_DOUT) | |
218 | #define OPEN_COIL() HIGH(GPIO_SSC_DOUT) | |
219 | ||
220 | #define HITAG_FRAME_LEN 20 | |
221 | #define HITAG_T_STOP 36 /* T_EOF should be > 36 */ | |
222 | #define HITAG_T_LOW 8 /* T_LOW should be 4..10 */ | |
223 | #define HITAG_T_0_MIN 15 /* T[0] should be 18..22 */ | |
224 | #define HITAG_T_1_MIN 25 /* T[1] should be 26..30 */ | |
225 | //#define HITAG_T_EOF 40 /* T_EOF should be > 36 */ | |
226 | #define HITAG_T_EOF 80 /* T_EOF should be > 36 */ | |
227 | #define HITAG_T_WAIT_1 200 /* T_wresp should be 199..206 */ | |
228 | #define HITAG_T_WAIT_2 90 /* T_wresp should be 199..206 */ | |
229 | #define HITAG_T_WAIT_MAX 300 /* bit more than HITAG_T_WAIT_1 + HITAG_T_WAIT_2 */ | |
230 | ||
231 | #define HITAG_T_TAG_ONE_HALF_PERIOD 10 | |
232 | #define HITAG_T_TAG_TWO_HALF_PERIOD 25 | |
233 | #define HITAG_T_TAG_THREE_HALF_PERIOD 41 | |
234 | #define HITAG_T_TAG_FOUR_HALF_PERIOD 57 | |
235 | ||
236 | #define HITAG_T_TAG_HALF_PERIOD 16 | |
237 | #define HITAG_T_TAG_FULL_PERIOD 32 | |
238 | ||
239 | #define HITAG_T_TAG_CAPTURE_ONE_HALF 13 | |
240 | #define HITAG_T_TAG_CAPTURE_TWO_HALF 25 | |
241 | #define HITAG_T_TAG_CAPTURE_THREE_HALF 41 | |
242 | #define HITAG_T_TAG_CAPTURE_FOUR_HALF 57 | |
243 | ||
244 | ||
245 | static void hitag_send_bit(int bit) { | |
246 | LED_A_ON(); | |
247 | // Reset clock for the next bit | |
248 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG; | |
249 | ||
250 | // Fixed modulation, earlier proxmark version used inverted signal | |
251 | if(bit == 0) { | |
252 | // Manchester: Unloaded, then loaded |__--| | |
253 | LOW(GPIO_SSC_DOUT); | |
254 | while(AT91C_BASE_TC0->TC_CV < T0*HITAG_T_TAG_HALF_PERIOD); | |
255 | HIGH(GPIO_SSC_DOUT); | |
256 | while(AT91C_BASE_TC0->TC_CV < T0*HITAG_T_TAG_FULL_PERIOD); | |
257 | } else { | |
258 | // Manchester: Loaded, then unloaded |--__| | |
259 | HIGH(GPIO_SSC_DOUT); | |
260 | while(AT91C_BASE_TC0->TC_CV < T0*HITAG_T_TAG_HALF_PERIOD); | |
261 | LOW(GPIO_SSC_DOUT); | |
262 | while(AT91C_BASE_TC0->TC_CV < T0*HITAG_T_TAG_FULL_PERIOD); | |
263 | } | |
264 | LED_A_OFF(); | |
265 | } | |
266 | ||
267 | static void hitag_send_frame(const byte_t* frame, size_t frame_len) | |
268 | { | |
269 | // Send start of frame | |
270 | for(size_t i=0; i<5; i++) { | |
271 | hitag_send_bit(1); | |
272 | } | |
273 | ||
274 | // Send the content of the frame | |
275 | for(size_t i=0; i<frame_len; i++) { | |
276 | hitag_send_bit((frame[i/8] >> (7-(i%8)))&1); | |
277 | } | |
278 | ||
279 | // Drop the modulation | |
280 | LOW(GPIO_SSC_DOUT); | |
281 | } | |
282 | ||
283 | void hitag2_handle_reader_command(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) | |
284 | { | |
285 | byte_t rx_air[HITAG_FRAME_LEN]; | |
286 | ||
287 | // Copy the (original) received frame how it is send over the air | |
288 | memcpy(rx_air,rx,nbytes(rxlen)); | |
289 | ||
290 | if(tag.crypto_active) { | |
291 | hitag2_cipher_transcrypt(&(tag.cs),rx,rxlen/8,rxlen%8); | |
292 | } | |
293 | ||
294 | // Reset the transmission frame length | |
295 | *txlen = 0; | |
296 | ||
297 | // Try to find out which command was send by selecting on length (in bits) | |
298 | switch (rxlen) { | |
299 | // Received 11000 from the reader, request for UID, send UID | |
300 | case 05: { | |
301 | // Always send over the air in the clear plaintext mode | |
302 | if(rx_air[0] != 0xC0) { | |
303 | // Unknown frame ? | |
304 | return; | |
305 | } | |
306 | *txlen = 32; | |
307 | memcpy(tx,tag.sectors[0],4); | |
308 | tag.crypto_active = 0; | |
309 | } | |
310 | break; | |
311 | ||
312 | // Read/Write command: ..xx x..y yy with yyy == ~xxx, xxx is sector number | |
313 | case 10: { | |
314 | unsigned int sector = (~( ((rx[0]<<2)&0x04) | ((rx[1]>>6)&0x03) ) & 0x07); | |
315 | // Verify complement of sector index | |
316 | if(sector != ((rx[0]>>3)&0x07)) { | |
317 | //DbpString("Transmission error (read/write)"); | |
318 | return; | |
319 | } | |
320 | ||
321 | switch (rx[0] & 0xC6) { | |
322 | // Read command: 11xx x00y | |
323 | case 0xC0: | |
324 | memcpy(tx,tag.sectors[sector],4); | |
325 | *txlen = 32; | |
326 | break; | |
327 | ||
328 | // Inverted Read command: 01xx x10y | |
329 | case 0x44: | |
330 | for (size_t i=0; i<4; i++) { | |
331 | tx[i] = tag.sectors[sector][i] ^ 0xff; | |
332 | } | |
333 | *txlen = 32; | |
334 | break; | |
335 | ||
336 | // Write command: 10xx x01y | |
337 | case 0x82: | |
338 | // Prepare write, acknowledge by repeating command | |
339 | memcpy(tx,rx,nbytes(rxlen)); | |
340 | *txlen = rxlen; | |
341 | tag.active_sector = sector; | |
342 | tag.state=TAG_STATE_WRITING; | |
343 | break; | |
344 | ||
345 | // Unknown command | |
346 | default: | |
347 | Dbprintf("Uknown command: %02x %02x",rx[0],rx[1]); | |
348 | return; | |
349 | break; | |
350 | } | |
351 | } | |
352 | break; | |
353 | ||
354 | // Writing data or Reader password | |
355 | case 32: { | |
356 | if(tag.state == TAG_STATE_WRITING) { | |
357 | // These are the sector contents to be written. We don't have to do anything else. | |
358 | memcpy(tag.sectors[tag.active_sector],rx,nbytes(rxlen)); | |
359 | tag.state=TAG_STATE_RESET; | |
360 | return; | |
361 | } else { | |
362 | // Received RWD password, respond with configuration and our password | |
363 | if(memcmp(rx,tag.sectors[1],4) != 0) { | |
364 | DbpString("Reader password is wrong"); | |
365 | return; | |
366 | } | |
367 | *txlen = 32; | |
368 | memcpy(tx,tag.sectors[3],4); | |
369 | } | |
370 | } | |
371 | break; | |
372 | ||
373 | // Received RWD authentication challenge and respnse | |
374 | case 64: { | |
375 | // Store the authentication attempt | |
376 | if (auth_table_len < (AUTH_TABLE_LENGTH-8)) { | |
377 | memcpy(auth_table+auth_table_len,rx,8); | |
378 | auth_table_len += 8; | |
379 | } | |
380 | ||
381 | // Reset the cipher state | |
382 | hitag2_cipher_reset(&tag,rx); | |
383 | // Check if the authentication was correct | |
384 | if(!hitag2_cipher_authenticate(&(tag.cs),rx+4)) { | |
385 | // The reader failed to authenticate, do nothing | |
386 | Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x Failed!",rx[0],rx[1],rx[2],rx[3],rx[4],rx[5],rx[6],rx[7]); | |
387 | return; | |
388 | } | |
389 | // Succesful, but commented out reporting back to the Host, this may delay to much. | |
390 | // Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x OK!",rx[0],rx[1],rx[2],rx[3],rx[4],rx[5],rx[6],rx[7]); | |
391 | ||
392 | // Activate encryption algorithm for all further communication | |
393 | tag.crypto_active = 1; | |
394 | ||
395 | // Use the tag password as response | |
396 | memcpy(tx,tag.sectors[3],4); | |
397 | *txlen = 32; | |
398 | } | |
399 | break; | |
400 | } | |
401 | ||
402 | // LogTrace(rx,nbytes(rxlen),0,0,false); | |
403 | // LogTrace(tx,nbytes(*txlen),0,0,true); | |
404 | ||
405 | if(tag.crypto_active) { | |
406 | hitag2_cipher_transcrypt(&(tag.cs), tx, *txlen/8, *txlen%8); | |
407 | } | |
408 | } | |
409 | ||
410 | static void hitag_reader_send_bit(int bit) { | |
411 | LED_A_ON(); | |
412 | // Reset clock for the next bit | |
413 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG; | |
414 | ||
415 | // Binary puls length modulation (BPLM) is used to encode the data stream | |
416 | // This means that a transmission of a one takes longer than that of a zero | |
417 | ||
418 | // Enable modulation, which means, drop the the field | |
419 | HIGH(GPIO_SSC_DOUT); | |
420 | ||
421 | // Wait for 4-10 times the carrier period | |
422 | while(AT91C_BASE_TC0->TC_CV < T0*6); | |
423 | // SpinDelayUs(8*8); | |
424 | ||
425 | // Disable modulation, just activates the field again | |
426 | LOW(GPIO_SSC_DOUT); | |
427 | ||
428 | if(bit == 0) { | |
429 | // Zero bit: |_-| | |
430 | while(AT91C_BASE_TC0->TC_CV < T0*22); | |
431 | // SpinDelayUs(16*8); | |
432 | } else { | |
433 | // One bit: |_--| | |
434 | while(AT91C_BASE_TC0->TC_CV < T0*28); | |
435 | // SpinDelayUs(22*8); | |
436 | } | |
437 | LED_A_OFF(); | |
438 | } | |
439 | ||
440 | static void hitag_reader_send_frame(const byte_t* frame, size_t frame_len) | |
441 | { | |
442 | // Send the content of the frame | |
443 | for(size_t i=0; i<frame_len; i++) { | |
444 | hitag_reader_send_bit((frame[i/8] >> (7-(i%8)))&1); | |
445 | } | |
446 | // Send EOF | |
447 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG; | |
448 | // Enable modulation, which means, drop the the field | |
449 | HIGH(GPIO_SSC_DOUT); | |
450 | // Wait for 4-10 times the carrier period | |
451 | while(AT91C_BASE_TC0->TC_CV < T0*6); | |
452 | // Disable modulation, just activates the field again | |
453 | LOW(GPIO_SSC_DOUT); | |
454 | } | |
455 | ||
ed7bd3a3 | 456 | size_t blocknr; |
457 | ||
d19929cb | 458 | bool hitag2_password(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) { |
459 | // Reset the transmission frame length | |
460 | *txlen = 0; | |
461 | ||
462 | // Try to find out which command was send by selecting on length (in bits) | |
463 | switch (rxlen) { | |
464 | // No answer, try to resurrect | |
465 | case 0: { | |
466 | // Stop if there is no answer (after sending password) | |
467 | if (bPwd) { | |
468 | DbpString("Password failed!"); | |
469 | return false; | |
470 | } | |
471 | *txlen = 5; | |
472 | memcpy(tx,"\xc0",nbytes(*txlen)); | |
473 | } break; | |
474 | ||
475 | // Received UID, tag password | |
476 | case 32: { | |
477 | if (!bPwd) { | |
478 | *txlen = 32; | |
479 | memcpy(tx,password,4); | |
480 | bPwd = true; | |
ab4da50d | 481 | memcpy(tag.sectors[blocknr],rx,4); |
482 | blocknr++; | |
d19929cb | 483 | } else { |
219a334d | 484 | |
485 | if(blocknr == 1){ | |
486 | //store password in block1, the TAG answers with Block3, but we need the password in memory | |
487 | memcpy(tag.sectors[blocknr],tx,4); | |
488 | }else{ | |
489 | memcpy(tag.sectors[blocknr],rx,4); | |
490 | } | |
491 | ||
492 | blocknr++; | |
493 | if (blocknr > 7) { | |
494 | DbpString("Read succesful!"); | |
ab4da50d | 495 | bSuccessful = true; |
219a334d | 496 | return false; |
497 | } | |
498 | *txlen = 10; | |
499 | tx[0] = 0xc0 | (blocknr << 3) | ((blocknr^7) >> 2); | |
500 | tx[1] = ((blocknr^7) << 6); | |
d19929cb | 501 | } |
502 | } break; | |
503 | ||
504 | // Unexpected response | |
bde10a50 | 505 | default: { |
d19929cb | 506 | Dbprintf("Uknown frame length: %d",rxlen); |
507 | return false; | |
508 | } break; | |
509 | } | |
510 | return true; | |
511 | } | |
512 | ||
bde10a50 | 513 | bool hitag2_crypto(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) { |
514 | // Reset the transmission frame length | |
515 | *txlen = 0; | |
516 | ||
517 | if(bCrypto) { | |
518 | hitag2_cipher_transcrypt(&cipher_state,rx,rxlen/8,rxlen%8); | |
519 | } | |
520 | ||
521 | // Try to find out which command was send by selecting on length (in bits) | |
522 | switch (rxlen) { | |
523 | // No answer, try to resurrect | |
524 | case 0: { | |
525 | // Stop if there is no answer while we are in crypto mode (after sending NrAr) | |
526 | if (bCrypto) { | |
527 | DbpString("Authentication failed!"); | |
528 | return false; | |
529 | } | |
530 | *txlen = 5; | |
531 | memcpy(tx,"\xc0",nbytes(*txlen)); | |
532 | } break; | |
533 | ||
534 | // Received UID, crypto tag answer | |
535 | case 32: { | |
536 | if (!bCrypto) { | |
537 | uint64_t ui64key = key[0] | ((uint64_t)key[1]) << 8 | ((uint64_t)key[2]) << 16 | ((uint64_t)key[3]) << 24 | ((uint64_t)key[4]) << 32 | ((uint64_t)key[5]) << 40; | |
538 | uint32_t ui32uid = rx[0] | ((uint32_t)rx[1]) << 8 | ((uint32_t)rx[2]) << 16 | ((uint32_t)rx[3]) << 24; | |
539 | cipher_state = _hitag2_init(rev64(ui64key), rev32(ui32uid), 0); | |
540 | memset(tx,0x00,4); | |
541 | memset(tx+4,0xff,4); | |
542 | hitag2_cipher_transcrypt(&cipher_state,tx+4,4,0); | |
543 | *txlen = 64; | |
544 | bCrypto = true; | |
545 | bAuthenticating = true; | |
546 | } else { | |
547 | // Check if we received answer tag (at) | |
548 | if (bAuthenticating) { | |
549 | bAuthenticating = false; | |
550 | } else { | |
551 | // Store the received block | |
552 | memcpy(tag.sectors[blocknr],rx,4); | |
553 | blocknr++; | |
554 | } | |
555 | if (blocknr > 7) { | |
556 | DbpString("Read succesful!"); | |
ab4da50d | 557 | bSuccessful = true; |
bde10a50 | 558 | return false; |
559 | } | |
560 | *txlen = 10; | |
561 | tx[0] = 0xc0 | (blocknr << 3) | ((blocknr^7) >> 2); | |
562 | tx[1] = ((blocknr^7) << 6); | |
563 | } | |
564 | } break; | |
565 | ||
566 | // Unexpected response | |
567 | default: { | |
568 | Dbprintf("Uknown frame length: %d",rxlen); | |
569 | return false; | |
570 | } break; | |
571 | } | |
572 | ||
573 | ||
574 | if(bCrypto) { | |
575 | // We have to return now to avoid double encryption | |
576 | if (!bAuthenticating) { | |
577 | hitag2_cipher_transcrypt(&cipher_state,tx,*txlen/8,*txlen%8); | |
578 | } | |
579 | } | |
580 | ||
581 | return true; | |
582 | } | |
583 | ||
584 | ||
d19929cb | 585 | bool hitag2_authenticate(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) { |
586 | // Reset the transmission frame length | |
587 | *txlen = 0; | |
588 | ||
589 | // Try to find out which command was send by selecting on length (in bits) | |
590 | switch (rxlen) { | |
591 | // No answer, try to resurrect | |
592 | case 0: { | |
593 | // Stop if there is no answer while we are in crypto mode (after sending NrAr) | |
594 | if (bCrypto) { | |
595 | DbpString("Authentication failed!"); | |
596 | return false; | |
597 | } | |
598 | *txlen = 5; | |
599 | memcpy(tx,"\xc0",nbytes(*txlen)); | |
600 | } break; | |
601 | ||
602 | // Received UID, crypto tag answer | |
603 | case 32: { | |
604 | if (!bCrypto) { | |
605 | *txlen = 64; | |
606 | memcpy(tx,NrAr,8); | |
607 | bCrypto = true; | |
608 | } else { | |
bde10a50 | 609 | DbpString("Authentication succesful!"); |
d19929cb | 610 | // We are done... for now |
611 | return false; | |
612 | } | |
613 | } break; | |
614 | ||
615 | // Unexpected response | |
616 | default: { | |
617 | Dbprintf("Uknown frame length: %d",rxlen); | |
618 | return false; | |
619 | } break; | |
620 | } | |
621 | ||
622 | return true; | |
623 | } | |
624 | ||
625 | bool hitag2_test_auth_attempts(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) { | |
626 | // Reset the transmission frame length | |
627 | *txlen = 0; | |
628 | ||
629 | // Try to find out which command was send by selecting on length (in bits) | |
630 | switch (rxlen) { | |
631 | // No answer, try to resurrect | |
632 | case 0: { | |
633 | // Stop if there is no answer while we are in crypto mode (after sending NrAr) | |
634 | if (bCrypto) { | |
635 | Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x Failed!",NrAr[0],NrAr[1],NrAr[2],NrAr[3],NrAr[4],NrAr[5],NrAr[6],NrAr[7]); | |
636 | bCrypto = false; | |
637 | if ((auth_table_pos+8) == auth_table_len) { | |
638 | return false; | |
639 | } | |
640 | auth_table_pos += 8; | |
641 | memcpy(NrAr,auth_table+auth_table_pos,8); | |
642 | } | |
643 | *txlen = 5; | |
644 | memcpy(tx,"\xc0",nbytes(*txlen)); | |
645 | } break; | |
646 | ||
647 | // Received UID, crypto tag answer, or read block response | |
648 | case 32: { | |
649 | if (!bCrypto) { | |
650 | *txlen = 64; | |
651 | memcpy(tx,NrAr,8); | |
652 | bCrypto = true; | |
653 | } else { | |
654 | Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x OK",NrAr[0],NrAr[1],NrAr[2],NrAr[3],NrAr[4],NrAr[5],NrAr[6],NrAr[7]); | |
655 | bCrypto = false; | |
656 | if ((auth_table_pos+8) == auth_table_len) { | |
657 | return false; | |
658 | } | |
659 | auth_table_pos += 8; | |
660 | memcpy(NrAr,auth_table+auth_table_pos,8); | |
661 | } | |
662 | } break; | |
663 | ||
664 | default: { | |
665 | Dbprintf("Uknown frame length: %d",rxlen); | |
666 | return false; | |
667 | } break; | |
668 | } | |
669 | ||
670 | return true; | |
671 | } | |
672 | ||
673 | void SnoopHitag(uint32_t type) { | |
674 | int frame_count; | |
675 | int response; | |
676 | int overflow; | |
677 | bool rising_edge; | |
678 | bool reader_frame; | |
679 | int lastbit; | |
680 | bool bSkip; | |
681 | int tag_sof; | |
682 | byte_t rx[HITAG_FRAME_LEN]; | |
683 | size_t rxlen=0; | |
684 | ||
685 | // Clean up trace and prepare it for storing frames | |
ed7bd3a3 | 686 | iso14a_set_tracing(TRUE); |
687 | iso14a_clear_trace(); | |
d19929cb | 688 | |
689 | auth_table_len = 0; | |
690 | auth_table_pos = 0; | |
691 | memset(auth_table, 0x00, AUTH_TABLE_LENGTH); | |
692 | ||
693 | DbpString("Starting Hitag2 snoop"); | |
694 | LED_D_ON(); | |
695 | ||
696 | // Set up eavesdropping mode, frequency divisor which will drive the FPGA | |
697 | // and analog mux selection. | |
698 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT); | |
699 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz | |
700 | SetAdcMuxFor(GPIO_MUXSEL_LOPKD); | |
701 | RELAY_OFF(); | |
702 | ||
703 | // Configure output pin that is connected to the FPGA (for modulating) | |
704 | AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; | |
705 | AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; | |
706 | ||
707 | // Disable modulation, we are going to eavesdrop, not modulate ;) | |
708 | LOW(GPIO_SSC_DOUT); | |
709 | ||
710 | // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the reader frames | |
711 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1); | |
712 | AT91C_BASE_PIOA->PIO_BSR = GPIO_SSC_FRAME; | |
713 | ||
714 | // Disable timer during configuration | |
715 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
716 | ||
717 | // Capture mode, defaul timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger, | |
718 | // external trigger rising edge, load RA on rising edge of TIOA. | |
719 | uint32_t t1_channel_mode = AT91C_TC_CLKS_TIMER_DIV1_CLOCK | AT91C_TC_ETRGEDG_BOTH | AT91C_TC_ABETRG | AT91C_TC_LDRA_BOTH; | |
720 | AT91C_BASE_TC1->TC_CMR = t1_channel_mode; | |
721 | ||
722 | // Enable and reset counter | |
723 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
724 | ||
725 | // Reset the received frame, frame count and timing info | |
726 | memset(rx,0x00,sizeof(rx)); | |
727 | frame_count = 0; | |
728 | response = 0; | |
729 | overflow = 0; | |
730 | reader_frame = false; | |
731 | lastbit = 1; | |
732 | bSkip = true; | |
733 | tag_sof = 4; | |
734 | ||
735 | while(!BUTTON_PRESS()) { | |
736 | // Watchdog hit | |
737 | WDT_HIT(); | |
738 | ||
739 | // Receive frame, watch for at most T0*EOF periods | |
740 | while (AT91C_BASE_TC1->TC_CV < T0*HITAG_T_EOF) { | |
741 | // Check if rising edge in modulation is detected | |
742 | if(AT91C_BASE_TC1->TC_SR & AT91C_TC_LDRAS) { | |
743 | // Retrieve the new timing values | |
744 | int ra = (AT91C_BASE_TC1->TC_RA/T0); | |
745 | ||
746 | // Find out if we are dealing with a rising or falling edge | |
747 | rising_edge = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_FRAME) > 0; | |
748 | ||
749 | // Shorter periods will only happen with reader frames | |
750 | if (!reader_frame && rising_edge && ra < HITAG_T_TAG_CAPTURE_ONE_HALF) { | |
751 | // Switch from tag to reader capture | |
752 | LED_C_OFF(); | |
753 | reader_frame = true; | |
754 | memset(rx,0x00,sizeof(rx)); | |
755 | rxlen = 0; | |
756 | } | |
757 | ||
758 | // Only handle if reader frame and rising edge, or tag frame and falling edge | |
759 | if (reader_frame != rising_edge) { | |
760 | overflow += ra; | |
761 | continue; | |
762 | } | |
763 | ||
764 | // Add the buffered timing values of earlier captured edges which were skipped | |
765 | ra += overflow; | |
766 | overflow = 0; | |
767 | ||
768 | if (reader_frame) { | |
769 | LED_B_ON(); | |
770 | // Capture reader frame | |
771 | if(ra >= HITAG_T_STOP) { | |
772 | if (rxlen != 0) { | |
773 | //DbpString("wierd0?"); | |
774 | } | |
775 | // Capture the T0 periods that have passed since last communication or field drop (reset) | |
776 | response = (ra - HITAG_T_LOW); | |
777 | } else if(ra >= HITAG_T_1_MIN ) { | |
778 | // '1' bit | |
779 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
780 | rxlen++; | |
781 | } else if(ra >= HITAG_T_0_MIN) { | |
782 | // '0' bit | |
783 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
784 | rxlen++; | |
785 | } else { | |
786 | // Ignore wierd value, is to small to mean anything | |
787 | } | |
788 | } else { | |
789 | LED_C_ON(); | |
790 | // Capture tag frame (manchester decoding using only falling edges) | |
791 | if(ra >= HITAG_T_EOF) { | |
792 | if (rxlen != 0) { | |
793 | //DbpString("wierd1?"); | |
794 | } | |
795 | // Capture the T0 periods that have passed since last communication or field drop (reset) | |
796 | // We always recieve a 'one' first, which has the falling edge after a half period |-_| | |
797 | response = ra-HITAG_T_TAG_HALF_PERIOD; | |
798 | } else if(ra >= HITAG_T_TAG_CAPTURE_FOUR_HALF) { | |
799 | // Manchester coding example |-_|_-|-_| (101) | |
800 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
801 | rxlen++; | |
802 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
803 | rxlen++; | |
804 | } else if(ra >= HITAG_T_TAG_CAPTURE_THREE_HALF) { | |
805 | // Manchester coding example |_-|...|_-|-_| (0...01) | |
806 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
807 | rxlen++; | |
808 | // We have to skip this half period at start and add the 'one' the second time | |
809 | if (!bSkip) { | |
810 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
811 | rxlen++; | |
812 | } | |
813 | lastbit = !lastbit; | |
814 | bSkip = !bSkip; | |
815 | } else if(ra >= HITAG_T_TAG_CAPTURE_TWO_HALF) { | |
816 | // Manchester coding example |_-|_-| (00) or |-_|-_| (11) | |
817 | if (tag_sof) { | |
818 | // Ignore bits that are transmitted during SOF | |
819 | tag_sof--; | |
820 | } else { | |
821 | // bit is same as last bit | |
822 | rx[rxlen / 8] |= lastbit << (7-(rxlen%8)); | |
823 | rxlen++; | |
824 | } | |
825 | } else { | |
826 | // Ignore wierd value, is to small to mean anything | |
827 | } | |
828 | } | |
829 | } | |
830 | } | |
831 | ||
832 | // Check if frame was captured | |
833 | if(rxlen > 0) { | |
834 | frame_count++; | |
835 | if (!LogTrace(rx,nbytes(rxlen),response,0,reader_frame)) { | |
836 | DbpString("Trace full"); | |
837 | break; | |
838 | } | |
839 | ||
840 | // Check if we recognize a valid authentication attempt | |
841 | if (nbytes(rxlen) == 8) { | |
842 | // Store the authentication attempt | |
843 | if (auth_table_len < (AUTH_TABLE_LENGTH-8)) { | |
844 | memcpy(auth_table+auth_table_len,rx,8); | |
845 | auth_table_len += 8; | |
846 | } | |
847 | } | |
848 | ||
849 | // Reset the received frame and response timing info | |
850 | memset(rx,0x00,sizeof(rx)); | |
851 | response = 0; | |
852 | reader_frame = false; | |
853 | lastbit = 1; | |
854 | bSkip = true; | |
855 | tag_sof = 4; | |
856 | overflow = 0; | |
857 | ||
858 | LED_B_OFF(); | |
859 | LED_C_OFF(); | |
860 | } else { | |
861 | // Save the timer overflow, will be 0 when frame was received | |
862 | overflow += (AT91C_BASE_TC1->TC_CV/T0); | |
863 | } | |
864 | // Reset the frame length | |
865 | rxlen = 0; | |
866 | // Reset the timer to restart while-loop that receives frames | |
867 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_SWTRG; | |
868 | } | |
869 | LED_A_ON(); | |
870 | LED_B_OFF(); | |
871 | LED_C_OFF(); | |
872 | LED_D_OFF(); | |
873 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
874 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; | |
875 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
876 | LED_A_OFF(); | |
877 | ||
878 | // Dbprintf("frame received: %d",frame_count); | |
879 | // Dbprintf("Authentication Attempts: %d",(auth_table_len/8)); | |
880 | // DbpString("All done"); | |
881 | } | |
882 | ||
883 | void SimulateHitagTag(bool tag_mem_supplied, byte_t* data) { | |
884 | int frame_count; | |
885 | int response; | |
886 | int overflow; | |
887 | byte_t rx[HITAG_FRAME_LEN]; | |
888 | size_t rxlen=0; | |
889 | byte_t tx[HITAG_FRAME_LEN]; | |
890 | size_t txlen=0; | |
891 | bool bQuitTraceFull = false; | |
892 | bQuiet = false; | |
893 | ||
894 | // Clean up trace and prepare it for storing frames | |
bde10a50 | 895 | iso14a_set_tracing(TRUE); |
896 | iso14a_clear_trace(); | |
d19929cb | 897 | auth_table_len = 0; |
898 | auth_table_pos = 0; | |
899 | memset(auth_table, 0x00, AUTH_TABLE_LENGTH); | |
900 | ||
901 | DbpString("Starting Hitag2 simulation"); | |
902 | LED_D_ON(); | |
903 | hitag2_init(); | |
904 | ||
905 | if (tag_mem_supplied) { | |
906 | DbpString("Loading hitag2 memory..."); | |
907 | memcpy((byte_t*)tag.sectors,data,48); | |
908 | } | |
909 | ||
910 | uint32_t block = 0; | |
911 | for (size_t i=0; i<12; i++) { | |
912 | for (size_t j=0; j<4; j++) { | |
913 | block <<= 8; | |
914 | block |= tag.sectors[i][j]; | |
915 | } | |
916 | Dbprintf("| %d | %08x |",i,block); | |
917 | } | |
918 | ||
919 | // Set up simulator mode, frequency divisor which will drive the FPGA | |
920 | // and analog mux selection. | |
921 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT); | |
922 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz | |
923 | SetAdcMuxFor(GPIO_MUXSEL_LOPKD); | |
924 | RELAY_OFF(); | |
925 | ||
926 | // Configure output pin that is connected to the FPGA (for modulating) | |
927 | AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; | |
928 | AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; | |
929 | ||
930 | // Disable modulation at default, which means release resistance | |
931 | LOW(GPIO_SSC_DOUT); | |
932 | ||
933 | // Enable Peripheral Clock for TIMER_CLOCK0, used to measure exact timing before answering | |
934 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0); | |
935 | ||
936 | // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the reader frames | |
937 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1); | |
938 | AT91C_BASE_PIOA->PIO_BSR = GPIO_SSC_FRAME; | |
939 | ||
940 | // Disable timer during configuration | |
941 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
942 | ||
943 | // Capture mode, defaul timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger, | |
944 | // external trigger rising edge, load RA on rising edge of TIOA. | |
945 | AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK | AT91C_TC_ETRGEDG_RISING | AT91C_TC_ABETRG | AT91C_TC_LDRA_RISING; | |
946 | ||
947 | // Enable and reset counter | |
948 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
949 | ||
950 | // Reset the received frame, frame count and timing info | |
951 | memset(rx,0x00,sizeof(rx)); | |
952 | frame_count = 0; | |
953 | response = 0; | |
954 | overflow = 0; | |
955 | ||
956 | while(!BUTTON_PRESS()) { | |
957 | // Watchdog hit | |
958 | WDT_HIT(); | |
959 | ||
960 | // Receive frame, watch for at most T0*EOF periods | |
961 | while (AT91C_BASE_TC1->TC_CV < T0*HITAG_T_EOF) { | |
962 | // Check if rising edge in modulation is detected | |
963 | if(AT91C_BASE_TC1->TC_SR & AT91C_TC_LDRAS) { | |
964 | // Retrieve the new timing values | |
965 | int ra = (AT91C_BASE_TC1->TC_RA/T0) + overflow; | |
966 | overflow = 0; | |
967 | ||
968 | // Reset timer every frame, we have to capture the last edge for timing | |
969 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
970 | ||
971 | LED_B_ON(); | |
972 | ||
973 | // Capture reader frame | |
974 | if(ra >= HITAG_T_STOP) { | |
975 | if (rxlen != 0) { | |
976 | //DbpString("wierd0?"); | |
977 | } | |
978 | // Capture the T0 periods that have passed since last communication or field drop (reset) | |
979 | response = (ra - HITAG_T_LOW); | |
980 | } else if(ra >= HITAG_T_1_MIN ) { | |
981 | // '1' bit | |
982 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
983 | rxlen++; | |
984 | } else if(ra >= HITAG_T_0_MIN) { | |
985 | // '0' bit | |
986 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
987 | rxlen++; | |
988 | } else { | |
989 | // Ignore wierd value, is to small to mean anything | |
990 | } | |
991 | } | |
992 | } | |
993 | ||
994 | // Check if frame was captured | |
995 | if(rxlen > 4) { | |
996 | frame_count++; | |
997 | if (!bQuiet) { | |
998 | if (!LogTrace(rx,nbytes(rxlen),response,0,true)) { | |
999 | DbpString("Trace full"); | |
1000 | if (bQuitTraceFull) { | |
1001 | break; | |
1002 | } else { | |
1003 | bQuiet = true; | |
1004 | } | |
1005 | } | |
1006 | } | |
1007 | ||
1008 | // Disable timer 1 with external trigger to avoid triggers during our own modulation | |
1009 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1010 | ||
1011 | // Process the incoming frame (rx) and prepare the outgoing frame (tx) | |
1012 | hitag2_handle_reader_command(rx,rxlen,tx,&txlen); | |
1013 | ||
1014 | // Wait for HITAG_T_WAIT_1 carrier periods after the last reader bit, | |
1015 | // not that since the clock counts since the rising edge, but T_Wait1 is | |
1016 | // with respect to the falling edge, we need to wait actually (T_Wait1 - T_Low) | |
1017 | // periods. The gap time T_Low varies (4..10). All timer values are in | |
1018 | // terms of T0 units | |
1019 | while(AT91C_BASE_TC0->TC_CV < T0*(HITAG_T_WAIT_1-HITAG_T_LOW)); | |
1020 | ||
1021 | // Send and store the tag answer (if there is any) | |
1022 | if (txlen) { | |
1023 | // Transmit the tag frame | |
1024 | hitag_send_frame(tx,txlen); | |
1025 | // Store the frame in the trace | |
1026 | if (!bQuiet) { | |
1027 | if (!LogTrace(tx,nbytes(txlen),0,0,false)) { | |
1028 | DbpString("Trace full"); | |
1029 | if (bQuitTraceFull) { | |
1030 | break; | |
1031 | } else { | |
1032 | bQuiet = true; | |
1033 | } | |
1034 | } | |
1035 | } | |
1036 | } | |
1037 | ||
1038 | // Reset the received frame and response timing info | |
1039 | memset(rx,0x00,sizeof(rx)); | |
1040 | response = 0; | |
1041 | ||
1042 | // Enable and reset external trigger in timer for capturing future frames | |
1043 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
1044 | LED_B_OFF(); | |
1045 | } | |
1046 | // Reset the frame length | |
1047 | rxlen = 0; | |
1048 | // Save the timer overflow, will be 0 when frame was received | |
1049 | overflow += (AT91C_BASE_TC1->TC_CV/T0); | |
1050 | // Reset the timer to restart while-loop that receives frames | |
1051 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_SWTRG; | |
1052 | } | |
1053 | LED_B_OFF(); | |
1054 | LED_D_OFF(); | |
1055 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1056 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; | |
1057 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
1058 | // Dbprintf("frame received: %d",frame_count); | |
1059 | // Dbprintf("Authentication Attempts: %d",(auth_table_len/8)); | |
1060 | // DbpString("All done"); | |
1061 | } | |
1062 | ||
1063 | void ReaderHitag(hitag_function htf, hitag_data* htd) { | |
1064 | int frame_count; | |
1065 | int response; | |
1066 | byte_t rx[HITAG_FRAME_LEN]; | |
1067 | size_t rxlen=0; | |
1068 | byte_t txbuf[HITAG_FRAME_LEN]; | |
1069 | byte_t* tx = txbuf; | |
1070 | size_t txlen=0; | |
1071 | int lastbit; | |
1072 | bool bSkip; | |
1073 | int reset_sof; | |
1074 | int tag_sof; | |
1075 | int t_wait = HITAG_T_WAIT_MAX; | |
1076 | bool bStop; | |
1077 | bool bQuitTraceFull = false; | |
ab4da50d | 1078 | |
1079 | // Reset the return status | |
1080 | bSuccessful = false; | |
1081 | ||
d19929cb | 1082 | // Clean up trace and prepare it for storing frames |
bde10a50 | 1083 | iso14a_set_tracing(TRUE); |
1084 | iso14a_clear_trace(); | |
d19929cb | 1085 | DbpString("Starting Hitag reader family"); |
1086 | ||
1087 | // Check configuration | |
1088 | switch(htf) { | |
1089 | case RHT2F_PASSWORD: { | |
bde10a50 | 1090 | Dbprintf("List identifier in password mode"); |
d19929cb | 1091 | memcpy(password,htd->pwd.password,4); |
ed7bd3a3 | 1092 | blocknr = 0; |
d19929cb | 1093 | bQuitTraceFull = false; |
1094 | bQuiet = false; | |
1095 | bPwd = false; | |
1096 | } break; | |
bde10a50 | 1097 | |
d19929cb | 1098 | case RHT2F_AUTHENTICATE: { |
bde10a50 | 1099 | DbpString("Authenticating using nr,ar pair:"); |
d19929cb | 1100 | memcpy(NrAr,htd->auth.NrAr,8); |
d19929cb | 1101 | Dbhexdump(8,NrAr,false); |
1102 | bQuiet = false; | |
1103 | bCrypto = false; | |
bde10a50 | 1104 | bAuthenticating = false; |
1105 | bQuitTraceFull = true; | |
1106 | } break; | |
1107 | ||
1108 | case RHT2F_CRYPTO: { | |
1109 | DbpString("Authenticating using key:"); | |
1110 | memcpy(key,htd->crypto.key,6); | |
1111 | Dbhexdump(6,key,false); | |
1112 | blocknr = 0; | |
1113 | bQuiet = false; | |
1114 | bCrypto = false; | |
1115 | bAuthenticating = false; | |
d19929cb | 1116 | bQuitTraceFull = true; |
1117 | } break; | |
1118 | ||
1119 | case RHT2F_TEST_AUTH_ATTEMPTS: { | |
1120 | Dbprintf("Testing %d authentication attempts",(auth_table_len/8)); | |
1121 | auth_table_pos = 0; | |
1122 | memcpy(NrAr,auth_table,8); | |
1123 | bQuitTraceFull = false; | |
1124 | bQuiet = false; | |
1125 | bCrypto = false; | |
1126 | } break; | |
1127 | ||
1128 | default: { | |
1129 | Dbprintf("Error, unknown function: %d",htf); | |
1130 | return; | |
1131 | } break; | |
1132 | } | |
1133 | ||
1134 | LED_D_ON(); | |
1135 | hitag2_init(); | |
1136 | ||
1137 | // Configure output and enable pin that is connected to the FPGA (for modulating) | |
1138 | AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; | |
1139 | AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; | |
1140 | ||
1141 | // Set fpga in edge detect with reader field, we can modulate as reader now | |
1142 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD); | |
1143 | ||
1144 | // Set Frequency divisor which will drive the FPGA and analog mux selection | |
1145 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz | |
1146 | SetAdcMuxFor(GPIO_MUXSEL_LOPKD); | |
1147 | RELAY_OFF(); | |
1148 | ||
1149 | // Disable modulation at default, which means enable the field | |
1150 | LOW(GPIO_SSC_DOUT); | |
1151 | ||
1152 | // Give it a bit of time for the resonant antenna to settle. | |
1153 | SpinDelay(30); | |
1154 | ||
1155 | // Enable Peripheral Clock for TIMER_CLOCK0, used to measure exact timing before answering | |
1156 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0); | |
1157 | ||
1158 | // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the tag frames | |
1159 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1); | |
1160 | AT91C_BASE_PIOA->PIO_BSR = GPIO_SSC_FRAME; | |
1161 | ||
1162 | // Disable timer during configuration | |
1163 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1164 | ||
1165 | // Capture mode, defaul timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger, | |
1166 | // external trigger rising edge, load RA on falling edge of TIOA. | |
1167 | AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK | AT91C_TC_ETRGEDG_FALLING | AT91C_TC_ABETRG | AT91C_TC_LDRA_FALLING; | |
1168 | ||
1169 | // Enable and reset counters | |
1170 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
1171 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
1172 | ||
1173 | // Reset the received frame, frame count and timing info | |
1174 | frame_count = 0; | |
1175 | response = 0; | |
1176 | lastbit = 1; | |
1177 | bStop = false; | |
1178 | ||
ab4da50d | 1179 | // Tag specific configuration settings (sof, timings, etc.) |
1180 | if (htf < 10){ | |
1181 | // hitagS settings | |
1182 | reset_sof = 1; | |
1183 | t_wait = 200; | |
1184 | DbpString("Configured for hitagS reader"); | |
1185 | } else if (htf < 20) { | |
1186 | // hitag1 settings | |
1187 | reset_sof = 1; | |
1188 | t_wait = 200; | |
1189 | DbpString("Configured for hitag1 reader"); | |
1190 | } else if (htf < 30) { | |
1191 | // hitag2 settings | |
1192 | reset_sof = 4; | |
1193 | t_wait = HITAG_T_WAIT_2; | |
1194 | DbpString("Configured for hitag2 reader"); | |
d19929cb | 1195 | } else { |
ab4da50d | 1196 | Dbprintf("Error, unknown hitag reader type: %d",htf); |
1197 | return; | |
1198 | } | |
d19929cb | 1199 | |
1200 | while(!bStop && !BUTTON_PRESS()) { | |
1201 | // Watchdog hit | |
1202 | WDT_HIT(); | |
1203 | ||
1204 | // Check if frame was captured and store it | |
1205 | if(rxlen > 0) { | |
1206 | frame_count++; | |
1207 | if (!bQuiet) { | |
1208 | if (!LogTrace(rx,nbytes(rxlen),response,0,false)) { | |
1209 | DbpString("Trace full"); | |
1210 | if (bQuitTraceFull) { | |
1211 | break; | |
1212 | } else { | |
1213 | bQuiet = true; | |
1214 | } | |
1215 | } | |
1216 | } | |
1217 | } | |
1218 | ||
1219 | // By default reset the transmission buffer | |
1220 | tx = txbuf; | |
1221 | switch(htf) { | |
1222 | case RHT2F_PASSWORD: { | |
1223 | bStop = !hitag2_password(rx,rxlen,tx,&txlen); | |
1224 | } break; | |
1225 | case RHT2F_AUTHENTICATE: { | |
1226 | bStop = !hitag2_authenticate(rx,rxlen,tx,&txlen); | |
1227 | } break; | |
bde10a50 | 1228 | case RHT2F_CRYPTO: { |
1229 | bStop = !hitag2_crypto(rx,rxlen,tx,&txlen); | |
1230 | } break; | |
d19929cb | 1231 | case RHT2F_TEST_AUTH_ATTEMPTS: { |
1232 | bStop = !hitag2_test_auth_attempts(rx,rxlen,tx,&txlen); | |
1233 | } break; | |
1234 | default: { | |
1235 | Dbprintf("Error, unknown function: %d",htf); | |
1236 | return; | |
1237 | } break; | |
1238 | } | |
1239 | ||
1240 | // Send and store the reader command | |
1241 | // Disable timer 1 with external trigger to avoid triggers during our own modulation | |
1242 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1243 | ||
1244 | // Wait for HITAG_T_WAIT_2 carrier periods after the last tag bit before transmitting, | |
1245 | // Since the clock counts since the last falling edge, a 'one' means that the | |
1246 | // falling edge occured halfway the period. with respect to this falling edge, | |
1247 | // we need to wait (T_Wait2 + half_tag_period) when the last was a 'one'. | |
1248 | // All timer values are in terms of T0 units | |
1249 | while(AT91C_BASE_TC0->TC_CV < T0*(t_wait+(HITAG_T_TAG_HALF_PERIOD*lastbit))); | |
1250 | ||
1251 | // Transmit the reader frame | |
1252 | hitag_reader_send_frame(tx,txlen); | |
1253 | ||
1254 | // Enable and reset external trigger in timer for capturing future frames | |
1255 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
1256 | ||
1257 | // Add transmitted frame to total count | |
1258 | if(txlen > 0) { | |
1259 | frame_count++; | |
1260 | if (!bQuiet) { | |
1261 | // Store the frame in the trace | |
1262 | if (!LogTrace(tx,nbytes(txlen),HITAG_T_WAIT_2,0,true)) { | |
1263 | if (bQuitTraceFull) { | |
1264 | break; | |
1265 | } else { | |
1266 | bQuiet = true; | |
1267 | } | |
1268 | } | |
1269 | } | |
1270 | } | |
1271 | ||
1272 | // Reset values for receiving frames | |
1273 | memset(rx,0x00,sizeof(rx)); | |
1274 | rxlen = 0; | |
1275 | lastbit = 1; | |
1276 | bSkip = true; | |
1277 | tag_sof = reset_sof; | |
1278 | response = 0; | |
1279 | ||
1280 | // Receive frame, watch for at most T0*EOF periods | |
1281 | while (AT91C_BASE_TC1->TC_CV < T0*HITAG_T_WAIT_MAX) { | |
1282 | // Check if falling edge in tag modulation is detected | |
1283 | if(AT91C_BASE_TC1->TC_SR & AT91C_TC_LDRAS) { | |
1284 | // Retrieve the new timing values | |
1285 | int ra = (AT91C_BASE_TC1->TC_RA/T0); | |
1286 | ||
1287 | // Reset timer every frame, we have to capture the last edge for timing | |
1288 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG; | |
1289 | ||
1290 | LED_B_ON(); | |
1291 | ||
1292 | // Capture tag frame (manchester decoding using only falling edges) | |
1293 | if(ra >= HITAG_T_EOF) { | |
1294 | if (rxlen != 0) { | |
1295 | //DbpString("wierd1?"); | |
1296 | } | |
1297 | // Capture the T0 periods that have passed since last communication or field drop (reset) | |
1298 | // We always recieve a 'one' first, which has the falling edge after a half period |-_| | |
1299 | response = ra-HITAG_T_TAG_HALF_PERIOD; | |
1300 | } else if(ra >= HITAG_T_TAG_CAPTURE_FOUR_HALF) { | |
1301 | // Manchester coding example |-_|_-|-_| (101) | |
1302 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
1303 | rxlen++; | |
1304 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
1305 | rxlen++; | |
1306 | } else if(ra >= HITAG_T_TAG_CAPTURE_THREE_HALF) { | |
1307 | // Manchester coding example |_-|...|_-|-_| (0...01) | |
1308 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
1309 | rxlen++; | |
1310 | // We have to skip this half period at start and add the 'one' the second time | |
1311 | if (!bSkip) { | |
1312 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
1313 | rxlen++; | |
1314 | } | |
1315 | lastbit = !lastbit; | |
1316 | bSkip = !bSkip; | |
1317 | } else if(ra >= HITAG_T_TAG_CAPTURE_TWO_HALF) { | |
1318 | // Manchester coding example |_-|_-| (00) or |-_|-_| (11) | |
1319 | if (tag_sof) { | |
1320 | // Ignore bits that are transmitted during SOF | |
1321 | tag_sof--; | |
1322 | } else { | |
1323 | // bit is same as last bit | |
1324 | rx[rxlen / 8] |= lastbit << (7-(rxlen%8)); | |
1325 | rxlen++; | |
1326 | } | |
1327 | } else { | |
1328 | // Ignore wierd value, is to small to mean anything | |
1329 | } | |
1330 | } | |
1331 | ||
1332 | // We can break this loop if we received the last bit from a frame | |
1333 | if (AT91C_BASE_TC1->TC_CV > T0*HITAG_T_EOF) { | |
1334 | if (rxlen>0) break; | |
1335 | } | |
1336 | } | |
1337 | } | |
1338 | LED_B_OFF(); | |
1339 | LED_D_OFF(); | |
1340 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1341 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; | |
1342 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
ab4da50d | 1343 | Dbprintf("frame received: %d",frame_count); |
1344 | DbpString("All done"); | |
1345 | cmd_send(CMD_ACK,bSuccessful,0,0,(byte_t*)tag.sectors,48); | |
d19929cb | 1346 | } |