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Added a way to overlay a grid to graph window
[proxmark3-svn] / fpga / lo_passthru.v
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72acba78 1//-----------------------------------------------------------------------------\r
2// For reading TI tags, we need to place the FPGA in pass through mode\r
3// and pass everything through to the ARM\r
4//-----------------------------------------------------------------------------\r
5\r
6module lo_passthru(\r
7 pck0, ck_1356meg, ck_1356megb,\r
8 pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4,\r
9 adc_d, adc_clk,\r
10 ssp_frame, ssp_din, ssp_dout, ssp_clk,\r
11 cross_hi, cross_lo,\r
12 dbg\r
13);\r
14 input pck0, ck_1356meg, ck_1356megb;\r
15 output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;\r
16 input [7:0] adc_d;\r
17 output adc_clk;\r
18 input ssp_dout;\r
19 output ssp_frame, ssp_din, ssp_clk;\r
20 input cross_hi, cross_lo;\r
21 output dbg;\r
22\r
23// No logic, straight through.\r
24\r
25assign pwr_oe3 = 1'b0;\r
26assign pwr_oe1 = 1'b1;\r
27assign pwr_oe2 = 1'b1;\r
28assign pwr_oe4 = 1'b1;\r
29assign pwr_lo = 1'b0;\r
30assign pwr_hi = 1'b0;\r
31assign adc_clk = 1'b0;\r
32assign ssp_din = cross_lo;\r
33assign dbg = cross_lo;\r
34\r
35endmodule\r
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