More coverity fixes
[proxmark3-svn] / armsrc / iso14443a.c
CommitLineData
15c4dc5a 1//-----------------------------------------------------------------------------
b62a5a84 2// Merlok - June 2011, 2012
15c4dc5a 3// Gerhard de Koning Gans - May 2008
534983d7 4// Hagen Fritsch - June 2010
bd20f8f4 5//
6// This code is licensed to you under the terms of the GNU GPL, version 2 or,
7// at your option, any later version. See the LICENSE.txt file for the text of
8// the license.
15c4dc5a 9//-----------------------------------------------------------------------------
bd20f8f4 10// Routines to support ISO 14443 type A.
11//-----------------------------------------------------------------------------
12
e30c654b 13#include "proxmark3.h"
15c4dc5a 14#include "apps.h"
f7e3ed82 15#include "util.h"
9ab7a6c7 16#include "string.h"
902cb3c0 17#include "cmd.h"
9ab7a6c7 18
15c4dc5a 19#include "iso14443crc.h"
534983d7 20#include "iso14443a.h"
20f9a2a1
M
21#include "crapto1.h"
22#include "mifareutil.h"
15c4dc5a 23
534983d7 24static uint32_t iso14a_timeout;
d19929cb 25uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
1e262141 26int rsamples = 0;
7bc95e2e 27int traceLen = 0;
1e262141 28int tracing = TRUE;
29uint8_t trigger = 0;
b0127e65 30// the block number for the ISO14443-4 PCB
31static uint8_t iso14_pcb_blocknum = 0;
15c4dc5a 32
7bc95e2e 33//
34// ISO14443 timing:
35//
36// minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
37#define REQUEST_GUARD_TIME (7000/16 + 1)
38// minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
39#define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
40// bool LastCommandWasRequest = FALSE;
41
42//
43// Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
44//
d714d3ef 45// When the PM acts as reader and is receiving tag data, it takes
46// 3 ticks delay in the AD converter
47// 16 ticks until the modulation detector completes and sets curbit
48// 8 ticks until bit_to_arm is assigned from curbit
49// 8*16 ticks for the transfer from FPGA to ARM
7bc95e2e 50// 4*16 ticks until we measure the time
51// - 8*16 ticks because we measure the time of the previous transfer
d714d3ef 52#define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
7bc95e2e 53
54// When the PM acts as a reader and is sending, it takes
55// 4*16 ticks until we can write data to the sending hold register
56// 8*16 ticks until the SHR is transferred to the Sending Shift Register
57// 8 ticks until the first transfer starts
58// 8 ticks later the FPGA samples the data
59// 1 tick to assign mod_sig_coil
60#define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
61
62// When the PM acts as tag and is receiving it takes
d714d3ef 63// 2 ticks delay in the RF part (for the first falling edge),
7bc95e2e 64// 3 ticks for the A/D conversion,
65// 8 ticks on average until the start of the SSC transfer,
66// 8 ticks until the SSC samples the first data
67// 7*16 ticks to complete the transfer from FPGA to ARM
68// 8 ticks until the next ssp_clk rising edge
d714d3ef 69// 4*16 ticks until we measure the time
7bc95e2e 70// - 8*16 ticks because we measure the time of the previous transfer
d714d3ef 71#define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
7bc95e2e 72
73// The FPGA will report its internal sending delay in
74uint16_t FpgaSendQueueDelay;
75// the 5 first bits are the number of bits buffered in mod_sig_buf
76// the last three bits are the remaining ticks/2 after the mod_sig_buf shift
77#define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
78
79// When the PM acts as tag and is sending, it takes
d714d3ef 80// 4*16 ticks until we can write data to the sending hold register
7bc95e2e 81// 8*16 ticks until the SHR is transferred to the Sending Shift Register
82// 8 ticks until the first transfer starts
83// 8 ticks later the FPGA samples the data
84// + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
85// + 1 tick to assign mod_sig_coil
d714d3ef 86#define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
7bc95e2e 87
88// When the PM acts as sniffer and is receiving tag data, it takes
89// 3 ticks A/D conversion
d714d3ef 90// 14 ticks to complete the modulation detection
91// 8 ticks (on average) until the result is stored in to_arm
7bc95e2e 92// + the delays in transferring data - which is the same for
93// sniffing reader and tag data and therefore not relevant
d714d3ef 94#define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
7bc95e2e 95
d714d3ef 96// When the PM acts as sniffer and is receiving reader data, it takes
97// 2 ticks delay in analogue RF receiver (for the falling edge of the
98// start bit, which marks the start of the communication)
7bc95e2e 99// 3 ticks A/D conversion
d714d3ef 100// 8 ticks on average until the data is stored in to_arm.
7bc95e2e 101// + the delays in transferring data - which is the same for
102// sniffing reader and tag data and therefore not relevant
d714d3ef 103#define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
7bc95e2e 104
105//variables used for timing purposes:
106//these are in ssp_clk cycles:
107uint32_t NextTransferTime;
108uint32_t LastTimeProxToAirStart;
109uint32_t LastProxToAirDuration;
110
111
112
8f51ddb0 113// CARD TO READER - manchester
72934aa3 114// Sequence D: 11110000 modulation with subcarrier during first half
115// Sequence E: 00001111 modulation with subcarrier during second half
116// Sequence F: 00000000 no modulation with subcarrier
8f51ddb0 117// READER TO CARD - miller
72934aa3 118// Sequence X: 00001100 drop after half a period
119// Sequence Y: 00000000 no drop
120// Sequence Z: 11000000 drop at start
121#define SEC_D 0xf0
122#define SEC_E 0x0f
123#define SEC_F 0x00
124#define SEC_X 0x0c
125#define SEC_Y 0x00
126#define SEC_Z 0xc0
15c4dc5a 127
1e262141 128const uint8_t OddByteParity[256] = {
15c4dc5a 129 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
132 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
133 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
140 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
141 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
142 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
143 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
144 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
145};
146
1e262141 147
902cb3c0 148void iso14a_set_trigger(bool enable) {
534983d7 149 trigger = enable;
150}
151
902cb3c0 152void iso14a_clear_trace() {
7bc95e2e 153 memset(trace, 0x44, TRACE_SIZE);
8556b852
M
154 traceLen = 0;
155}
d19929cb 156
902cb3c0 157void iso14a_set_tracing(bool enable) {
8556b852
M
158 tracing = enable;
159}
d19929cb 160
b0127e65 161void iso14a_set_timeout(uint32_t timeout) {
162 iso14a_timeout = timeout;
163}
8556b852 164
15c4dc5a 165//-----------------------------------------------------------------------------
166// Generate the parity value for a byte sequence
e30c654b 167//
15c4dc5a 168//-----------------------------------------------------------------------------
20f9a2a1
M
169byte_t oddparity (const byte_t bt)
170{
5f6d6c90 171 return OddByteParity[bt];
20f9a2a1
M
172}
173
f7e3ed82 174uint32_t GetParity(const uint8_t * pbtCmd, int iLen)
15c4dc5a 175{
5f6d6c90 176 int i;
177 uint32_t dwPar = 0;
72934aa3 178
e691fc45 179 // Generate the parity bits
5f6d6c90 180 for (i = 0; i < iLen; i++) {
e691fc45 181 // and save them to a 32Bit word
5f6d6c90 182 dwPar |= ((OddByteParity[pbtCmd[i]]) << i);
183 }
184 return dwPar;
15c4dc5a 185}
186
534983d7 187void AppendCrc14443a(uint8_t* data, int len)
15c4dc5a 188{
5f6d6c90 189 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
15c4dc5a 190}
191
1e262141 192// The function LogTrace() is also used by the iClass implementation in iClass.c
17cba269 193bool RAMFUNC LogTrace(const uint8_t * btBytes, uint8_t iLen, uint32_t timestamp, uint32_t dwParity, bool readerToTag)
15c4dc5a 194{
fdcd43eb 195 if (!tracing) return FALSE;
7bc95e2e 196 // Return when trace is full
197 if (traceLen + sizeof(timestamp) + sizeof(dwParity) + iLen >= TRACE_SIZE) {
198 tracing = FALSE; // don't trace any more
199 return FALSE;
200 }
201
202 // Trace the random, i'm curious
203 trace[traceLen++] = ((timestamp >> 0) & 0xff);
204 trace[traceLen++] = ((timestamp >> 8) & 0xff);
205 trace[traceLen++] = ((timestamp >> 16) & 0xff);
206 trace[traceLen++] = ((timestamp >> 24) & 0xff);
17cba269
MHS
207
208 if (!readerToTag) {
7bc95e2e 209 trace[traceLen - 1] |= 0x80;
210 }
211 trace[traceLen++] = ((dwParity >> 0) & 0xff);
212 trace[traceLen++] = ((dwParity >> 8) & 0xff);
213 trace[traceLen++] = ((dwParity >> 16) & 0xff);
214 trace[traceLen++] = ((dwParity >> 24) & 0xff);
215 trace[traceLen++] = iLen;
216 if (btBytes != NULL && iLen != 0) {
217 memcpy(trace + traceLen, btBytes, iLen);
218 }
219 traceLen += iLen;
220 return TRUE;
15c4dc5a 221}
222
7bc95e2e 223//=============================================================================
224// ISO 14443 Type A - Miller decoder
225//=============================================================================
226// Basics:
227// This decoder is used when the PM3 acts as a tag.
228// The reader will generate "pauses" by temporarily switching of the field.
229// At the PM3 antenna we will therefore measure a modulated antenna voltage.
230// The FPGA does a comparison with a threshold and would deliver e.g.:
231// ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
232// The Miller decoder needs to identify the following sequences:
233// 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
234// 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
235// 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
236// Note 1: the bitstream may start at any time. We therefore need to sync.
237// Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
15c4dc5a 238//-----------------------------------------------------------------------------
b62a5a84 239static tUart Uart;
15c4dc5a 240
d7aa3739 241// Lookup-Table to decide if 4 raw bits are a modulation.
242// We accept two or three consecutive "0" in any position with the rest "1"
243const bool Mod_Miller_LUT[] = {
244 TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE,
245 TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE
246};
247#define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
248#define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
249
7bc95e2e 250void UartReset()
15c4dc5a 251{
7bc95e2e 252 Uart.state = STATE_UNSYNCD;
253 Uart.bitCount = 0;
254 Uart.len = 0; // number of decoded data bytes
255 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
256 Uart.parityBits = 0; //
257 Uart.twoBits = 0x0000; // buffer for 2 Bits
258 Uart.highCnt = 0;
259 Uart.startTime = 0;
260 Uart.endTime = 0;
261}
15c4dc5a 262
d714d3ef 263
7bc95e2e 264// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
265static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
266{
15c4dc5a 267
7bc95e2e 268 Uart.twoBits = (Uart.twoBits << 8) | bit;
269
270 if (Uart.state == STATE_UNSYNCD) { // not yet synced
271 if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
272 if (Uart.twoBits == 0xffff) {
273 Uart.highCnt++;
274 } else {
275 Uart.highCnt = 0;
15c4dc5a 276 }
7bc95e2e 277 } else {
278 Uart.syncBit = 0xFFFF; // not set
279 // look for 00xx1111 (the start bit)
280 if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
281 else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
282 else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
283 else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
284 else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
285 else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
286 else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
287 else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
288 if (Uart.syncBit != 0xFFFF) {
289 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
290 Uart.startTime -= Uart.syncBit;
d7aa3739 291 Uart.endTime = Uart.startTime;
7bc95e2e 292 Uart.state = STATE_START_OF_COMMUNICATION;
15c4dc5a 293 }
7bc95e2e 294 }
15c4dc5a 295
7bc95e2e 296 } else {
15c4dc5a 297
d7aa3739 298 if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
299 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
300 UartReset();
301 Uart.highCnt = 6;
302 } else { // Modulation in first half = Sequence Z = logic "0"
7bc95e2e 303 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
304 UartReset();
305 Uart.highCnt = 6;
306 } else {
307 Uart.bitCount++;
308 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
309 Uart.state = STATE_MILLER_Z;
310 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
311 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
312 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
313 Uart.parityBits <<= 1; // make room for the parity bit
314 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
315 Uart.bitCount = 0;
316 Uart.shiftReg = 0;
15c4dc5a 317 }
7bc95e2e 318 }
d7aa3739 319 }
320 } else {
321 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
7bc95e2e 322 Uart.bitCount++;
323 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
324 Uart.state = STATE_MILLER_X;
325 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
326 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
327 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
328 Uart.parityBits <<= 1; // make room for the new parity bit
329 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
330 Uart.bitCount = 0;
331 Uart.shiftReg = 0;
332 }
d7aa3739 333 } else { // no modulation in both halves - Sequence Y
7bc95e2e 334 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
15c4dc5a 335 Uart.state = STATE_UNSYNCD;
7bc95e2e 336 if(Uart.len == 0 && Uart.bitCount > 0) { // if we decoded some bits
337 Uart.shiftReg >>= (9 - Uart.bitCount); // add them to the output
338 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
339 Uart.parityBits <<= 1; // no parity bit - add "0"
d7aa3739 340 Uart.bitCount--; // last "0" was part of the EOC sequence
7bc95e2e 341 }
15c4dc5a 342 return TRUE;
343 }
7bc95e2e 344 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
345 UartReset();
346 Uart.highCnt = 6;
347 } else { // a logic "0"
348 Uart.bitCount++;
349 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
350 Uart.state = STATE_MILLER_Y;
351 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
352 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
353 Uart.parityBits <<= 1; // make room for the parity bit
354 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
355 Uart.bitCount = 0;
356 Uart.shiftReg = 0;
15c4dc5a 357 }
358 }
d7aa3739 359 }
15c4dc5a 360 }
7bc95e2e 361
362 }
15c4dc5a 363
7bc95e2e 364 return FALSE; // not finished yet, need more data
15c4dc5a 365}
366
7bc95e2e 367
368
15c4dc5a 369//=============================================================================
e691fc45 370// ISO 14443 Type A - Manchester decoder
15c4dc5a 371//=============================================================================
e691fc45 372// Basics:
7bc95e2e 373// This decoder is used when the PM3 acts as a reader.
e691fc45 374// The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
375// at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
376// ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
377// The Manchester decoder needs to identify the following sequences:
378// 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
379// 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
380// 8 ticks unmodulated: Sequence F = end of communication
381// 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
7bc95e2e 382// Note 1: the bitstream may start at any time. We therefore need to sync.
e691fc45 383// Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
b62a5a84 384static tDemod Demod;
15c4dc5a 385
d7aa3739 386// Lookup-Table to decide if 4 raw bits are a modulation.
d714d3ef 387// We accept three or four "1" in any position
7bc95e2e 388const bool Mod_Manchester_LUT[] = {
d7aa3739 389 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
d714d3ef 390 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
7bc95e2e 391};
392
393#define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
394#define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
15c4dc5a 395
2f2d9fc5 396
7bc95e2e 397void DemodReset()
e691fc45 398{
7bc95e2e 399 Demod.state = DEMOD_UNSYNCD;
400 Demod.len = 0; // number of decoded data bytes
401 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
402 Demod.parityBits = 0; //
403 Demod.collisionPos = 0; // Position of collision bit
404 Demod.twoBits = 0xffff; // buffer for 2 Bits
405 Demod.highCnt = 0;
406 Demod.startTime = 0;
407 Demod.endTime = 0;
e691fc45 408}
15c4dc5a 409
7bc95e2e 410// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
411static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
e691fc45 412{
7bc95e2e 413
414 Demod.twoBits = (Demod.twoBits << 8) | bit;
e691fc45 415
7bc95e2e 416 if (Demod.state == DEMOD_UNSYNCD) {
417
418 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
419 if (Demod.twoBits == 0x0000) {
420 Demod.highCnt++;
421 } else {
422 Demod.highCnt = 0;
423 }
424 } else {
425 Demod.syncBit = 0xFFFF; // not set
426 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
427 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
428 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
429 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
430 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
431 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
432 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
433 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
d7aa3739 434 if (Demod.syncBit != 0xFFFF) {
7bc95e2e 435 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
436 Demod.startTime -= Demod.syncBit;
437 Demod.bitCount = offset; // number of decoded data bits
e691fc45 438 Demod.state = DEMOD_MANCHESTER_DATA;
2f2d9fc5 439 }
7bc95e2e 440 }
15c4dc5a 441
7bc95e2e 442 } else {
15c4dc5a 443
7bc95e2e 444 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
445 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
e691fc45 446 if (!Demod.collisionPos) {
447 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
448 }
449 } // modulation in first half only - Sequence D = 1
7bc95e2e 450 Demod.bitCount++;
451 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
452 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
e691fc45 453 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
7bc95e2e 454 Demod.parityBits <<= 1; // make room for the parity bit
e691fc45 455 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
456 Demod.bitCount = 0;
457 Demod.shiftReg = 0;
15c4dc5a 458 }
7bc95e2e 459 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
460 } else { // no modulation in first half
461 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
e691fc45 462 Demod.bitCount++;
7bc95e2e 463 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
e691fc45 464 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
e691fc45 465 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
7bc95e2e 466 Demod.parityBits <<= 1; // make room for the new parity bit
e691fc45 467 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
468 Demod.bitCount = 0;
469 Demod.shiftReg = 0;
15c4dc5a 470 }
7bc95e2e 471 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
e691fc45 472 } else { // no modulation in both halves - End of communication
d7aa3739 473 if (Demod.len > 0 || Demod.bitCount > 0) { // received something
474 if(Demod.bitCount > 0) { // if we decoded bits
475 Demod.shiftReg >>= (9 - Demod.bitCount); // add the remaining decoded bits to the output
476 Demod.output[Demod.len++] = Demod.shiftReg & 0xff;
477 // No parity bit, so just shift a 0
478 Demod.parityBits <<= 1;
479 }
480 return TRUE; // we are finished with decoding the raw data sequence
481 } else { // nothing received. Start over
482 DemodReset();
e691fc45 483 }
15c4dc5a 484 }
7bc95e2e 485 }
e691fc45 486
487 }
15c4dc5a 488
e691fc45 489 return FALSE; // not finished yet, need more data
15c4dc5a 490}
491
492//=============================================================================
493// Finally, a `sniffer' for ISO 14443 Type A
494// Both sides of communication!
495//=============================================================================
496
497//-----------------------------------------------------------------------------
498// Record the sequence of commands sent by the reader to the tag, with
499// triggering so that we start recording at the point that the tag is moved
500// near the reader.
501//-----------------------------------------------------------------------------
5cd9ec01
M
502void RAMFUNC SnoopIso14443a(uint8_t param) {
503 // param:
504 // bit 0 - trigger from first card answer
505 // bit 1 - trigger from first reader 7-bit request
506
507 LEDsoff();
508 // init trace buffer
5f6d6c90 509 iso14a_clear_trace();
991f13f2 510 iso14a_set_tracing(TRUE);
5cd9ec01
M
511
512 // We won't start recording the frames that we acquire until we trigger;
513 // a good trigger condition to get started is probably when we see a
514 // response from the tag.
515 // triggered == FALSE -- to wait first for card
7bc95e2e 516 bool triggered = !(param & 0x03);
517
5cd9ec01 518 // The command (reader -> tag) that we're receiving.
15c4dc5a 519 // The length of a received command will in most cases be no more than 18 bytes.
520 // So 32 should be enough!
5cd9ec01
M
521 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
522 // The response (tag -> reader) that we're receiving.
523 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
15c4dc5a 524
5cd9ec01
M
525 // As we receive stuff, we copy it from receivedCmd or receivedResponse
526 // into trace, along with its length and other annotations.
527 //uint8_t *trace = (uint8_t *)BigBuf;
528
529 // The DMA buffer, used to stream samples from the FPGA
7bc95e2e 530 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
531 uint8_t *data = dmaBuf;
532 uint8_t previous_data = 0;
5cd9ec01
M
533 int maxDataLen = 0;
534 int dataLen = 0;
7bc95e2e 535 bool TagIsActive = FALSE;
536 bool ReaderIsActive = FALSE;
537
538 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
15c4dc5a 539
5cd9ec01
M
540 // Set up the demodulator for tag -> reader responses.
541 Demod.output = receivedResponse;
15c4dc5a 542
5cd9ec01 543 // Set up the demodulator for the reader -> tag commands
5cd9ec01 544 Uart.output = receivedCmd;
15c4dc5a 545
7bc95e2e 546 // Setup and start DMA.
5cd9ec01 547 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
7bc95e2e 548
5cd9ec01 549 // And now we loop, receiving samples.
7bc95e2e 550 for(uint32_t rsamples = 0; TRUE; ) {
551
5cd9ec01
M
552 if(BUTTON_PRESS()) {
553 DbpString("cancelled by button");
7bc95e2e 554 break;
5cd9ec01 555 }
15c4dc5a 556
5cd9ec01
M
557 LED_A_ON();
558 WDT_HIT();
15c4dc5a 559
5cd9ec01
M
560 int register readBufDataP = data - dmaBuf;
561 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
562 if (readBufDataP <= dmaBufDataP){
563 dataLen = dmaBufDataP - readBufDataP;
564 } else {
7bc95e2e 565 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
5cd9ec01
M
566 }
567 // test for length of buffer
568 if(dataLen > maxDataLen) {
569 maxDataLen = dataLen;
570 if(dataLen > 400) {
7bc95e2e 571 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
572 break;
5cd9ec01
M
573 }
574 }
575 if(dataLen < 1) continue;
576
577 // primary buffer was stopped( <-- we lost data!
578 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
579 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
580 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
7bc95e2e 581 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
582 }
583 // secondary buffer sets as primary, secondary buffer was stopped
584 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
585 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
586 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
587 }
588
589 LED_A_OFF();
7bc95e2e 590
591 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
3be2a5ae 592
7bc95e2e 593 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
594 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
595 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
596 LED_C_ON();
5cd9ec01 597
7bc95e2e 598 // check - if there is a short 7bit request from reader
599 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
5cd9ec01 600
7bc95e2e 601 if(triggered) {
602 if (!LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, Uart.parityBits, TRUE)) break;
603 if (!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
604 }
605 /* And ready to receive another command. */
606 UartReset();
607 /* And also reset the demod code, which might have been */
608 /* false-triggered by the commands from the reader. */
609 DemodReset();
610 LED_B_OFF();
611 }
612 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
5cd9ec01 613 }
3be2a5ae 614
7bc95e2e 615 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
616 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
617 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
618 LED_B_ON();
5cd9ec01 619
7bc95e2e 620 if (!LogTrace(receivedResponse, Demod.len, Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, Demod.parityBits, FALSE)) break;
621 if (!LogTrace(NULL, 0, Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, 0, FALSE)) break;
5cd9ec01 622
7bc95e2e 623 if ((!triggered) && (param & 0x01)) triggered = TRUE;
5cd9ec01 624
7bc95e2e 625 // And ready to receive another response.
626 DemodReset();
627 LED_C_OFF();
628 }
629 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
630 }
5cd9ec01
M
631 }
632
7bc95e2e 633 previous_data = *data;
634 rsamples++;
5cd9ec01 635 data++;
d714d3ef 636 if(data == dmaBuf + DMA_BUFFER_SIZE) {
5cd9ec01
M
637 data = dmaBuf;
638 }
639 } // main cycle
640
641 DbpString("COMMAND FINISHED");
15c4dc5a 642
7bc95e2e 643 FpgaDisableSscDma();
644 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
645 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]);
5cd9ec01 646 LEDsoff();
15c4dc5a 647}
648
15c4dc5a 649//-----------------------------------------------------------------------------
650// Prepare tag messages
651//-----------------------------------------------------------------------------
8f51ddb0 652static void CodeIso14443aAsTagPar(const uint8_t *cmd, int len, uint32_t dwParity)
15c4dc5a 653{
8f51ddb0 654 int i;
15c4dc5a 655
8f51ddb0 656 ToSendReset();
15c4dc5a 657
658 // Correction bit, might be removed when not needed
659 ToSendStuffBit(0);
660 ToSendStuffBit(0);
661 ToSendStuffBit(0);
662 ToSendStuffBit(0);
663 ToSendStuffBit(1); // 1
664 ToSendStuffBit(0);
665 ToSendStuffBit(0);
666 ToSendStuffBit(0);
8f51ddb0 667
15c4dc5a 668 // Send startbit
72934aa3 669 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 670 LastProxToAirDuration = 8 * ToSendMax - 4;
15c4dc5a 671
8f51ddb0
M
672 for(i = 0; i < len; i++) {
673 int j;
674 uint8_t b = cmd[i];
15c4dc5a 675
676 // Data bits
15c4dc5a 677 for(j = 0; j < 8; j++) {
15c4dc5a 678 if(b & 1) {
72934aa3 679 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 680 } else {
72934aa3 681 ToSend[++ToSendMax] = SEC_E;
8f51ddb0
M
682 }
683 b >>= 1;
684 }
15c4dc5a 685
0014cb46 686 // Get the parity bit
8f51ddb0
M
687 if ((dwParity >> i) & 0x01) {
688 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 689 LastProxToAirDuration = 8 * ToSendMax - 4;
15c4dc5a 690 } else {
72934aa3 691 ToSend[++ToSendMax] = SEC_E;
7bc95e2e 692 LastProxToAirDuration = 8 * ToSendMax;
15c4dc5a 693 }
8f51ddb0 694 }
15c4dc5a 695
8f51ddb0
M
696 // Send stopbit
697 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 698
8f51ddb0
M
699 // Convert from last byte pos to length
700 ToSendMax++;
8f51ddb0
M
701}
702
703static void CodeIso14443aAsTag(const uint8_t *cmd, int len){
704 CodeIso14443aAsTagPar(cmd, len, GetParity(cmd, len));
15c4dc5a 705}
706
15c4dc5a 707
8f51ddb0
M
708static void Code4bitAnswerAsTag(uint8_t cmd)
709{
710 int i;
711
5f6d6c90 712 ToSendReset();
8f51ddb0
M
713
714 // Correction bit, might be removed when not needed
715 ToSendStuffBit(0);
716 ToSendStuffBit(0);
717 ToSendStuffBit(0);
718 ToSendStuffBit(0);
719 ToSendStuffBit(1); // 1
720 ToSendStuffBit(0);
721 ToSendStuffBit(0);
722 ToSendStuffBit(0);
723
724 // Send startbit
725 ToSend[++ToSendMax] = SEC_D;
726
727 uint8_t b = cmd;
728 for(i = 0; i < 4; i++) {
729 if(b & 1) {
730 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 731 LastProxToAirDuration = 8 * ToSendMax - 4;
8f51ddb0
M
732 } else {
733 ToSend[++ToSendMax] = SEC_E;
7bc95e2e 734 LastProxToAirDuration = 8 * ToSendMax;
8f51ddb0
M
735 }
736 b >>= 1;
737 }
738
739 // Send stopbit
740 ToSend[++ToSendMax] = SEC_F;
741
5f6d6c90 742 // Convert from last byte pos to length
743 ToSendMax++;
15c4dc5a 744}
745
746//-----------------------------------------------------------------------------
747// Wait for commands from reader
748// Stop when button is pressed
749// Or return TRUE when command is captured
750//-----------------------------------------------------------------------------
f7e3ed82 751static int GetIso14443aCommandFromReader(uint8_t *received, int *len, int maxLen)
15c4dc5a 752{
753 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
754 // only, since we are receiving, not transmitting).
755 // Signal field is off with the appropriate LED
756 LED_D_OFF();
757 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
758
759 // Now run a `software UART' on the stream of incoming samples.
7bc95e2e 760 UartReset();
15c4dc5a 761 Uart.output = received;
7bc95e2e 762
763 // clear RXRDY:
764 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 765
766 for(;;) {
767 WDT_HIT();
768
769 if(BUTTON_PRESS()) return FALSE;
7bc95e2e 770
15c4dc5a 771 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
7bc95e2e 772 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
773 if(MillerDecoding(b, 0)) {
774 *len = Uart.len;
15c4dc5a 775 return TRUE;
776 }
7bc95e2e 777 }
15c4dc5a 778 }
779}
28afbd2b 780
7bc95e2e 781static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, bool correctionNeeded);
782int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
28afbd2b 783int EmSend4bit(uint8_t resp);
7bc95e2e 784int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par);
785int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par);
786int EmSendCmdEx(uint8_t *resp, int respLen, bool correctionNeeded);
28afbd2b 787int EmSendCmd(uint8_t *resp, int respLen);
788int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par);
7bc95e2e 789bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint32_t reader_Parity,
790 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint32_t tag_Parity);
15c4dc5a 791
ce02f6f9 792static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
793
794typedef struct {
795 uint8_t* response;
796 size_t response_n;
797 uint8_t* modulation;
798 size_t modulation_n;
7bc95e2e 799 uint32_t ProxToAirDuration;
ce02f6f9 800} tag_response_info_t;
801
802void reset_free_buffer() {
803 free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
804}
805
806bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
7bc95e2e 807 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
ce02f6f9 808 // This will need the following byte array for a modulation sequence
809 // 144 data bits (18 * 8)
810 // 18 parity bits
811 // 2 Start and stop
812 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
813 // 1 just for the case
814 // ----------- +
815 // 166 bytes, since every bit that needs to be send costs us a byte
816 //
817
818 // Prepare the tag modulation bits from the message
819 CodeIso14443aAsTag(response_info->response,response_info->response_n);
820
821 // Make sure we do not exceed the free buffer space
822 if (ToSendMax > max_buffer_size) {
823 Dbprintf("Out of memory, when modulating bits for tag answer:");
824 Dbhexdump(response_info->response_n,response_info->response,false);
825 return false;
826 }
827
828 // Copy the byte array, used for this modulation to the buffer position
829 memcpy(response_info->modulation,ToSend,ToSendMax);
830
7bc95e2e 831 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
ce02f6f9 832 response_info->modulation_n = ToSendMax;
7bc95e2e 833 response_info->ProxToAirDuration = LastProxToAirDuration;
ce02f6f9 834
835 return true;
836}
837
838bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
839 // Retrieve and store the current buffer index
840 response_info->modulation = free_buffer_pointer;
841
842 // Determine the maximum size we can use from our buffer
843 size_t max_buffer_size = (((uint8_t *)BigBuf)+FREE_BUFFER_OFFSET+FREE_BUFFER_SIZE)-free_buffer_pointer;
844
845 // Forward the prepare tag modulation function to the inner function
846 if (prepare_tag_modulation(response_info,max_buffer_size)) {
847 // Update the free buffer offset
848 free_buffer_pointer += ToSendMax;
849 return true;
850 } else {
851 return false;
852 }
853}
854
15c4dc5a 855//-----------------------------------------------------------------------------
856// Main loop of simulated tag: receive commands from reader, decide what
857// response to send, and send it.
858//-----------------------------------------------------------------------------
28afbd2b 859void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
15c4dc5a 860{
5f6d6c90 861 // Enable and clear the trace
5f6d6c90 862 iso14a_clear_trace();
7bc95e2e 863 iso14a_set_tracing(TRUE);
81cd0474 864
81cd0474 865 uint8_t sak;
866
867 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
868 uint8_t response1[2];
869
870 switch (tagType) {
871 case 1: { // MIFARE Classic
872 // Says: I am Mifare 1k - original line
873 response1[0] = 0x04;
874 response1[1] = 0x00;
875 sak = 0x08;
876 } break;
877 case 2: { // MIFARE Ultralight
878 // Says: I am a stupid memory tag, no crypto
879 response1[0] = 0x04;
880 response1[1] = 0x00;
881 sak = 0x00;
882 } break;
883 case 3: { // MIFARE DESFire
884 // Says: I am a DESFire tag, ph33r me
885 response1[0] = 0x04;
886 response1[1] = 0x03;
887 sak = 0x20;
888 } break;
889 case 4: { // ISO/IEC 14443-4
890 // Says: I am a javacard (JCOP)
891 response1[0] = 0x04;
892 response1[1] = 0x00;
893 sak = 0x28;
894 } break;
895 default: {
896 Dbprintf("Error: unkown tagtype (%d)",tagType);
897 return;
898 } break;
899 }
900
901 // The second response contains the (mandatory) first 24 bits of the UID
902 uint8_t response2[5];
903
904 // Check if the uid uses the (optional) part
905 uint8_t response2a[5];
906 if (uid_2nd) {
907 response2[0] = 0x88;
908 num_to_bytes(uid_1st,3,response2+1);
909 num_to_bytes(uid_2nd,4,response2a);
910 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
911
912 // Configure the ATQA and SAK accordingly
913 response1[0] |= 0x40;
914 sak |= 0x04;
915 } else {
916 num_to_bytes(uid_1st,4,response2);
917 // Configure the ATQA and SAK accordingly
918 response1[0] &= 0xBF;
919 sak &= 0xFB;
920 }
921
922 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
923 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
924
925 // Prepare the mandatory SAK (for 4 and 7 byte UID)
926 uint8_t response3[3];
927 response3[0] = sak;
928 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
929
930 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
931 uint8_t response3a[3];
932 response3a[0] = sak & 0xFB;
933 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
934
254b70a4 935 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
ce02f6f9 936 uint8_t response6[] = { 0x04, 0x58, 0x00, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS
937 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
938
7bc95e2e 939 #define TAG_RESPONSE_COUNT 7
940 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
941 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
942 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
943 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
944 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
945 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
946 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
947 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
948 };
949
950 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
951 // Such a response is less time critical, so we can prepare them on the fly
952 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
953 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
954 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
955 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
956 tag_response_info_t dynamic_response_info = {
957 .response = dynamic_response_buffer,
958 .response_n = 0,
959 .modulation = dynamic_modulation_buffer,
960 .modulation_n = 0
961 };
ce02f6f9 962
7bc95e2e 963 // Reset the offset pointer of the free buffer
964 reset_free_buffer();
ce02f6f9 965
7bc95e2e 966 // Prepare the responses of the anticollision phase
ce02f6f9 967 // there will be not enough time to do this at the moment the reader sends it REQA
7bc95e2e 968 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
969 prepare_allocated_tag_modulation(&responses[i]);
970 }
15c4dc5a 971
254b70a4 972 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
7bc95e2e 973 int len = 0;
15c4dc5a 974
975 // To control where we are in the protocol
976 int order = 0;
977 int lastorder;
978
979 // Just to allow some checks
980 int happened = 0;
981 int happened2 = 0;
81cd0474 982 int cmdsRecvd = 0;
15c4dc5a 983
254b70a4 984 // We need to listen to the high-frequency, peak-detected path.
7bc95e2e 985 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
15c4dc5a 986
254b70a4 987 cmdsRecvd = 0;
7bc95e2e 988 tag_response_info_t* p_response;
15c4dc5a 989
254b70a4 990 LED_A_ON();
991 for(;;) {
7bc95e2e 992 // Clean receive command buffer
993
81cd0474 994 if(!GetIso14443aCommandFromReader(receivedCmd, &len, RECV_CMD_SIZE)) {
ce02f6f9 995 DbpString("Button press");
254b70a4 996 break;
997 }
7bc95e2e 998
999 p_response = NULL;
1000
254b70a4 1001 // doob - added loads of debug strings so we can see what the reader is saying to us during the sim as hi14alist is not populated
1002 // Okay, look at the command now.
1003 lastorder = order;
1004 if(receivedCmd[0] == 0x26) { // Received a REQUEST
ce02f6f9 1005 p_response = &responses[0]; order = 1;
254b70a4 1006 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
ce02f6f9 1007 p_response = &responses[0]; order = 6;
254b70a4 1008 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
ce02f6f9 1009 p_response = &responses[1]; order = 2;
254b70a4 1010 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
ce02f6f9 1011 p_response = &responses[2]; order = 20;
254b70a4 1012 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
ce02f6f9 1013 p_response = &responses[3]; order = 3;
254b70a4 1014 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
ce02f6f9 1015 p_response = &responses[4]; order = 30;
254b70a4 1016 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
5f6d6c90 1017 EmSendCmdEx(data+(4*receivedCmd[0]),16,false);
7bc95e2e 1018 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
5f6d6c90 1019 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
7bc95e2e 1020 p_response = NULL;
254b70a4 1021 } else if(receivedCmd[0] == 0x50) { // Received a HALT
17331e14 1022// DbpString("Reader requested we HALT!:");
7bc95e2e 1023 if (tracing) {
1024 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1025 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1026 }
1027 p_response = NULL;
254b70a4 1028 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
ce02f6f9 1029 p_response = &responses[5]; order = 7;
254b70a4 1030 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
7bc95e2e 1031 if (tagType == 1 || tagType == 2) { // RATS not supported
1032 EmSend4bit(CARD_NACK_NA);
1033 p_response = NULL;
1034 } else {
1035 p_response = &responses[6]; order = 70;
1036 }
1037 } else if (order == 7 && len == 8) { // Received authentication request
1038 if (tracing) {
1039 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1040 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1041 }
1042 uint32_t nr = bytes_to_num(receivedCmd,4);
1043 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1044 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1045 } else {
1046 // Check for ISO 14443A-4 compliant commands, look at left nibble
1047 switch (receivedCmd[0]) {
1048
1049 case 0x0B:
1050 case 0x0A: { // IBlock (command)
1051 dynamic_response_info.response[0] = receivedCmd[0];
1052 dynamic_response_info.response[1] = 0x00;
1053 dynamic_response_info.response[2] = 0x90;
1054 dynamic_response_info.response[3] = 0x00;
1055 dynamic_response_info.response_n = 4;
1056 } break;
1057
1058 case 0x1A:
1059 case 0x1B: { // Chaining command
1060 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1061 dynamic_response_info.response_n = 2;
1062 } break;
1063
1064 case 0xaa:
1065 case 0xbb: {
1066 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1067 dynamic_response_info.response_n = 2;
1068 } break;
1069
1070 case 0xBA: { //
1071 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1072 dynamic_response_info.response_n = 2;
1073 } break;
1074
1075 case 0xCA:
1076 case 0xC2: { // Readers sends deselect command
1077 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1078 dynamic_response_info.response_n = 2;
1079 } break;
1080
1081 default: {
1082 // Never seen this command before
1083 if (tracing) {
1084 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1085 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1086 }
1087 Dbprintf("Received unknown command (len=%d):",len);
1088 Dbhexdump(len,receivedCmd,false);
1089 // Do not respond
1090 dynamic_response_info.response_n = 0;
1091 } break;
1092 }
ce02f6f9 1093
7bc95e2e 1094 if (dynamic_response_info.response_n > 0) {
1095 // Copy the CID from the reader query
1096 dynamic_response_info.response[1] = receivedCmd[1];
ce02f6f9 1097
7bc95e2e 1098 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1099 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1100 dynamic_response_info.response_n += 2;
ce02f6f9 1101
7bc95e2e 1102 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1103 Dbprintf("Error preparing tag response");
1104 if (tracing) {
1105 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1106 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1107 }
1108 break;
1109 }
1110 p_response = &dynamic_response_info;
1111 }
81cd0474 1112 }
15c4dc5a 1113
1114 // Count number of wakeups received after a halt
1115 if(order == 6 && lastorder == 5) { happened++; }
1116
1117 // Count number of other messages after a halt
1118 if(order != 6 && lastorder == 5) { happened2++; }
1119
15c4dc5a 1120 if(cmdsRecvd > 999) {
1121 DbpString("1000 commands later...");
254b70a4 1122 break;
15c4dc5a 1123 }
ce02f6f9 1124 cmdsRecvd++;
1125
1126 if (p_response != NULL) {
7bc95e2e 1127 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1128 // do the tracing for the previous reader request and this tag answer:
1129 EmLogTrace(Uart.output,
1130 Uart.len,
1131 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1132 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1133 Uart.parityBits,
1134 p_response->response,
1135 p_response->response_n,
1136 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1137 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1138 SwapBits(GetParity(p_response->response, p_response->response_n), p_response->response_n));
1139 }
1140
1141 if (!tracing) {
1142 Dbprintf("Trace Full. Simulation stopped.");
1143 break;
1144 }
1145 }
15c4dc5a 1146
1147 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1148 LED_A_OFF();
1149}
1150
9492e0b0 1151
1152// prepare a delayed transfer. This simply shifts ToSend[] by a number
1153// of bits specified in the delay parameter.
1154void PrepareDelayedTransfer(uint16_t delay)
1155{
1156 uint8_t bitmask = 0;
1157 uint8_t bits_to_shift = 0;
1158 uint8_t bits_shifted = 0;
1159
1160 delay &= 0x07;
1161 if (delay) {
1162 for (uint16_t i = 0; i < delay; i++) {
1163 bitmask |= (0x01 << i);
1164 }
7bc95e2e 1165 ToSend[ToSendMax++] = 0x00;
9492e0b0 1166 for (uint16_t i = 0; i < ToSendMax; i++) {
1167 bits_to_shift = ToSend[i] & bitmask;
1168 ToSend[i] = ToSend[i] >> delay;
1169 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1170 bits_shifted = bits_to_shift;
1171 }
1172 }
1173}
1174
7bc95e2e 1175
1176//-------------------------------------------------------------------------------------
15c4dc5a 1177// Transmit the command (to the tag) that was placed in ToSend[].
9492e0b0 1178// Parameter timing:
7bc95e2e 1179// if NULL: transfer at next possible time, taking into account
1180// request guard time and frame delay time
1181// if == 0: transfer immediately and return time of transfer
9492e0b0 1182// if != 0: delay transfer until time specified
7bc95e2e 1183//-------------------------------------------------------------------------------------
9492e0b0 1184static void TransmitFor14443a(const uint8_t *cmd, int len, uint32_t *timing)
15c4dc5a 1185{
7bc95e2e 1186
9492e0b0 1187 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
e30c654b 1188
7bc95e2e 1189 uint32_t ThisTransferTime = 0;
e30c654b 1190
9492e0b0 1191 if (timing) {
1192 if(*timing == 0) { // Measure time
7bc95e2e 1193 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
9492e0b0 1194 } else {
1195 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1196 }
7bc95e2e 1197 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1198 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1199 LastTimeProxToAirStart = *timing;
1200 } else {
1201 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1202 while(GetCountSspClk() < ThisTransferTime);
1203 LastTimeProxToAirStart = ThisTransferTime;
9492e0b0 1204 }
1205
7bc95e2e 1206 // clear TXRDY
1207 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1208
1209 // for(uint16_t c = 0; c < 10;) { // standard delay for each transfer (allow tag to be ready after last transmission)
1210 // if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1211 // AT91C_BASE_SSC->SSC_THR = SEC_Y;
1212 // c++;
1213 // }
1214 // }
1215
1216 uint16_t c = 0;
9492e0b0 1217 for(;;) {
1218 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1219 AT91C_BASE_SSC->SSC_THR = cmd[c];
1220 c++;
1221 if(c >= len) {
1222 break;
1223 }
1224 }
1225 }
7bc95e2e 1226
1227 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1228
15c4dc5a 1229}
1230
7bc95e2e 1231
15c4dc5a 1232//-----------------------------------------------------------------------------
195af472 1233// Prepare reader command (in bits, support short frames) to send to FPGA
15c4dc5a 1234//-----------------------------------------------------------------------------
195af472 1235void CodeIso14443aBitsAsReaderPar(const uint8_t * cmd, int bits, uint32_t dwParity)
15c4dc5a 1236{
7bc95e2e 1237 int i, j;
1238 int last;
1239 uint8_t b;
e30c654b 1240
7bc95e2e 1241 ToSendReset();
e30c654b 1242
7bc95e2e 1243 // Start of Communication (Seq. Z)
1244 ToSend[++ToSendMax] = SEC_Z;
1245 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1246 last = 0;
1247
1248 size_t bytecount = nbytes(bits);
1249 // Generate send structure for the data bits
1250 for (i = 0; i < bytecount; i++) {
1251 // Get the current byte to send
1252 b = cmd[i];
1253 size_t bitsleft = MIN((bits-(i*8)),8);
1254
1255 for (j = 0; j < bitsleft; j++) {
1256 if (b & 1) {
1257 // Sequence X
1258 ToSend[++ToSendMax] = SEC_X;
1259 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1260 last = 1;
1261 } else {
1262 if (last == 0) {
1263 // Sequence Z
1264 ToSend[++ToSendMax] = SEC_Z;
1265 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1266 } else {
1267 // Sequence Y
1268 ToSend[++ToSendMax] = SEC_Y;
1269 last = 0;
1270 }
1271 }
1272 b >>= 1;
1273 }
1274
1275 // Only transmit (last) parity bit if we transmitted a complete byte
1276 if (j == 8) {
1277 // Get the parity bit
1278 if ((dwParity >> i) & 0x01) {
1279 // Sequence X
1280 ToSend[++ToSendMax] = SEC_X;
1281 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1282 last = 1;
1283 } else {
1284 if (last == 0) {
1285 // Sequence Z
1286 ToSend[++ToSendMax] = SEC_Z;
1287 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1288 } else {
1289 // Sequence Y
1290 ToSend[++ToSendMax] = SEC_Y;
1291 last = 0;
1292 }
1293 }
1294 }
1295 }
e30c654b 1296
7bc95e2e 1297 // End of Communication: Logic 0 followed by Sequence Y
1298 if (last == 0) {
1299 // Sequence Z
1300 ToSend[++ToSendMax] = SEC_Z;
1301 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1302 } else {
1303 // Sequence Y
1304 ToSend[++ToSendMax] = SEC_Y;
1305 last = 0;
1306 }
1307 ToSend[++ToSendMax] = SEC_Y;
e30c654b 1308
7bc95e2e 1309 // Convert to length of command:
1310 ToSendMax++;
15c4dc5a 1311}
1312
195af472 1313//-----------------------------------------------------------------------------
1314// Prepare reader command to send to FPGA
1315//-----------------------------------------------------------------------------
1316void CodeIso14443aAsReaderPar(const uint8_t * cmd, int len, uint32_t dwParity)
1317{
1318 CodeIso14443aBitsAsReaderPar(cmd,len*8,dwParity);
1319}
1320
9ca155ba
M
1321//-----------------------------------------------------------------------------
1322// Wait for commands from reader
1323// Stop when button is pressed (return 1) or field was gone (return 2)
1324// Or return 0 when command is captured
1325//-----------------------------------------------------------------------------
7bc95e2e 1326static int EmGetCmd(uint8_t *received, int *len)
9ca155ba
M
1327{
1328 *len = 0;
1329
1330 uint32_t timer = 0, vtime = 0;
1331 int analogCnt = 0;
1332 int analogAVG = 0;
1333
1334 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1335 // only, since we are receiving, not transmitting).
1336 // Signal field is off with the appropriate LED
1337 LED_D_OFF();
1338 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1339
1340 // Set ADC to read field strength
1341 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1342 AT91C_BASE_ADC->ADC_MR =
1343 ADC_MODE_PRESCALE(32) |
1344 ADC_MODE_STARTUP_TIME(16) |
1345 ADC_MODE_SAMPLE_HOLD_TIME(8);
1346 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1347 // start ADC
1348 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1349
1350 // Now run a 'software UART' on the stream of incoming samples.
7bc95e2e 1351 UartReset();
9ca155ba 1352 Uart.output = received;
7bc95e2e 1353
1354 // Clear RXRDY:
1355 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
9ca155ba
M
1356
1357 for(;;) {
1358 WDT_HIT();
1359
1360 if (BUTTON_PRESS()) return 1;
1361
1362 // test if the field exists
1363 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1364 analogCnt++;
1365 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1366 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1367 if (analogCnt >= 32) {
1368 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1369 vtime = GetTickCount();
1370 if (!timer) timer = vtime;
1371 // 50ms no field --> card to idle state
1372 if (vtime - timer > 50) return 2;
1373 } else
1374 if (timer) timer = 0;
1375 analogCnt = 0;
1376 analogAVG = 0;
1377 }
1378 }
7bc95e2e 1379
9ca155ba 1380 // receive and test the miller decoding
7bc95e2e 1381 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1382 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1383 if(MillerDecoding(b, 0)) {
1384 *len = Uart.len;
9ca155ba
M
1385 return 0;
1386 }
7bc95e2e 1387 }
1388
9ca155ba
M
1389 }
1390}
1391
9ca155ba 1392
7bc95e2e 1393static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, bool correctionNeeded)
1394{
1395 uint8_t b;
1396 uint16_t i = 0;
1397 uint32_t ThisTransferTime;
1398
9ca155ba
M
1399 // Modulate Manchester
1400 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
7bc95e2e 1401
1402 // include correction bit if necessary
1403 if (Uart.parityBits & 0x01) {
1404 correctionNeeded = TRUE;
1405 }
1406 if(correctionNeeded) {
9ca155ba
M
1407 // 1236, so correction bit needed
1408 i = 0;
7bc95e2e 1409 } else {
1410 i = 1;
9ca155ba 1411 }
7bc95e2e 1412
d714d3ef 1413 // clear receiving shift register and holding register
7bc95e2e 1414 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1415 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1416 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1417 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
9ca155ba 1418
7bc95e2e 1419 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1420 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1421 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1422 if (AT91C_BASE_SSC->SSC_RHR) break;
1423 }
1424
1425 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1426
1427 // Clear TXRDY:
1428 AT91C_BASE_SSC->SSC_THR = SEC_F;
1429
9ca155ba 1430 // send cycle
7bc95e2e 1431 for(; i <= respLen; ) {
9ca155ba 1432 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
7bc95e2e 1433 AT91C_BASE_SSC->SSC_THR = resp[i++];
1434 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
9ca155ba 1435 }
7bc95e2e 1436
9ca155ba
M
1437 if(BUTTON_PRESS()) {
1438 break;
1439 }
1440 }
1441
7bc95e2e 1442 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1443 for (i = 0; i < 2 ; ) {
1444 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1445 AT91C_BASE_SSC->SSC_THR = SEC_F;
1446 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1447 i++;
1448 }
1449 }
1450
1451 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1452
9ca155ba
M
1453 return 0;
1454}
1455
7bc95e2e 1456int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1457 Code4bitAnswerAsTag(resp);
0a39986e 1458 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
7bc95e2e 1459 // do the tracing for the previous reader request and this tag answer:
1460 EmLogTrace(Uart.output,
1461 Uart.len,
1462 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1463 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1464 Uart.parityBits,
1465 &resp,
1466 1,
1467 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1468 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1469 SwapBits(GetParity(&resp, 1), 1));
0a39986e 1470 return res;
9ca155ba
M
1471}
1472
8f51ddb0 1473int EmSend4bit(uint8_t resp){
7bc95e2e 1474 return EmSend4bitEx(resp, false);
8f51ddb0
M
1475}
1476
7bc95e2e 1477int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par){
1478 CodeIso14443aAsTagPar(resp, respLen, par);
8f51ddb0 1479 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
7bc95e2e 1480 // do the tracing for the previous reader request and this tag answer:
1481 EmLogTrace(Uart.output,
1482 Uart.len,
1483 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1484 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1485 Uart.parityBits,
1486 resp,
1487 respLen,
1488 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1489 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1490 SwapBits(GetParity(resp, respLen), respLen));
8f51ddb0
M
1491 return res;
1492}
1493
7bc95e2e 1494int EmSendCmdEx(uint8_t *resp, int respLen, bool correctionNeeded){
8f51ddb0
M
1495 return EmSendCmdExPar(resp, respLen, correctionNeeded, GetParity(resp, respLen));
1496}
1497
1498int EmSendCmd(uint8_t *resp, int respLen){
7bc95e2e 1499 return EmSendCmdExPar(resp, respLen, false, GetParity(resp, respLen));
8f51ddb0
M
1500}
1501
1502int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par){
7bc95e2e 1503 return EmSendCmdExPar(resp, respLen, false, par);
1504}
1505
1506bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint32_t reader_Parity,
1507 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint32_t tag_Parity)
1508{
1509 if (tracing) {
1510 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1511 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1512 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1513 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1514 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1515 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1516 reader_EndTime = tag_StartTime - exact_fdt;
1517 reader_StartTime = reader_EndTime - reader_modlen;
1518 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_Parity, TRUE)) {
1519 return FALSE;
1520 } else if (!LogTrace(NULL, 0, reader_EndTime, 0, TRUE)) {
1521 return FALSE;
1522 } else if (!LogTrace(tag_data, tag_len, tag_StartTime, tag_Parity, FALSE)) {
1523 return FALSE;
1524 } else {
1525 return (!LogTrace(NULL, 0, tag_EndTime, 0, FALSE));
1526 }
1527 } else {
1528 return TRUE;
1529 }
9ca155ba
M
1530}
1531
15c4dc5a 1532//-----------------------------------------------------------------------------
1533// Wait a certain time for tag response
1534// If a response is captured return TRUE
e691fc45 1535// If it takes too long return FALSE
15c4dc5a 1536//-----------------------------------------------------------------------------
7bc95e2e 1537static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint16_t offset, int maxLen)
15c4dc5a 1538{
7bc95e2e 1539 uint16_t c;
e691fc45 1540
15c4dc5a 1541 // Set FPGA mode to "reader listen mode", no modulation (listen
534983d7 1542 // only, since we are receiving, not transmitting).
1543 // Signal field is on with the appropriate LED
1544 LED_D_ON();
1545 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1c611bbd 1546
534983d7 1547 // Now get the answer from the card
7bc95e2e 1548 DemodReset();
534983d7 1549 Demod.output = receivedResponse;
15c4dc5a 1550
7bc95e2e 1551 // clear RXRDY:
1552 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1553
15c4dc5a 1554 c = 0;
1555 for(;;) {
534983d7 1556 WDT_HIT();
15c4dc5a 1557
534983d7 1558 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
534983d7 1559 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
7bc95e2e 1560 if(ManchesterDecoding(b, offset, 0)) {
1561 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
15c4dc5a 1562 return TRUE;
7bc95e2e 1563 } else if(c++ > iso14a_timeout) {
1564 return FALSE;
15c4dc5a 1565 }
534983d7 1566 }
1567 }
15c4dc5a 1568}
1569
9492e0b0 1570void ReaderTransmitBitsPar(uint8_t* frame, int bits, uint32_t par, uint32_t *timing)
15c4dc5a 1571{
981bd429 1572
7bc95e2e 1573 CodeIso14443aBitsAsReaderPar(frame,bits,par);
dfc3c505 1574
7bc95e2e 1575 // Send command to tag
1576 TransmitFor14443a(ToSend, ToSendMax, timing);
1577 if(trigger)
1578 LED_A_ON();
dfc3c505 1579
7bc95e2e 1580 // Log reader command in trace buffer
1581 if (tracing) {
1582 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1583 LogTrace(NULL, 0, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, 0, TRUE);
1584 }
15c4dc5a 1585}
1586
9492e0b0 1587void ReaderTransmitPar(uint8_t* frame, int len, uint32_t par, uint32_t *timing)
dfc3c505 1588{
9492e0b0 1589 ReaderTransmitBitsPar(frame,len*8,par, timing);
dfc3c505 1590}
15c4dc5a 1591
e691fc45 1592void ReaderTransmitBits(uint8_t* frame, int len, uint32_t *timing)
1593{
1594 // Generate parity and redirect
1595 ReaderTransmitBitsPar(frame,len,GetParity(frame,len/8), timing);
1596}
1597
9492e0b0 1598void ReaderTransmit(uint8_t* frame, int len, uint32_t *timing)
15c4dc5a 1599{
1600 // Generate parity and redirect
9492e0b0 1601 ReaderTransmitBitsPar(frame,len*8,GetParity(frame,len), timing);
15c4dc5a 1602}
1603
e691fc45 1604int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset)
1605{
7bc95e2e 1606 if (!GetIso14443aAnswerFromTag(receivedAnswer,offset,160)) return FALSE;
1607 if (tracing) {
1608 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.parityBits, FALSE);
1609 LogTrace(NULL, 0, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, 0, FALSE);
1610 }
e691fc45 1611 return Demod.len;
1612}
1613
f7e3ed82 1614int ReaderReceive(uint8_t* receivedAnswer)
15c4dc5a 1615{
e691fc45 1616 return ReaderReceiveOffset(receivedAnswer, 0);
15c4dc5a 1617}
1618
e691fc45 1619int ReaderReceivePar(uint8_t *receivedAnswer, uint32_t *parptr)
f89c7050 1620{
7bc95e2e 1621 if (!GetIso14443aAnswerFromTag(receivedAnswer,0,160)) return FALSE;
1622 if (tracing) {
1623 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.parityBits, FALSE);
1624 LogTrace(NULL, 0, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, 0, FALSE);
1625 }
f89c7050 1626 *parptr = Demod.parityBits;
e691fc45 1627 return Demod.len;
f89c7050
M
1628}
1629
e691fc45 1630/* performs iso14443a anticollision procedure
534983d7 1631 * fills the uid pointer unless NULL
1632 * fills resp_data unless NULL */
79a73ab2 1633int iso14443a_select_card(byte_t* uid_ptr, iso14a_card_select_t* p_hi14a_card, uint32_t* cuid_ptr) {
ed258538 1634 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1635 uint8_t sel_all[] = { 0x93,0x20 };
e691fc45 1636 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
ed258538 1637 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1638 uint8_t* resp = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); // was 3560 - tied to other size changes
79a73ab2 1639 byte_t uid_resp[4];
1640 size_t uid_resp_len;
15c4dc5a 1641
ed258538 1642 uint8_t sak = 0x04; // cascade uid
1643 int cascade_level = 0;
1644 int len;
79a73ab2 1645
ed258538 1646 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
9492e0b0 1647 ReaderTransmitBitsPar(wupa,7,0, NULL);
7bc95e2e 1648
ed258538 1649 // Receive the ATQA
1650 if(!ReaderReceive(resp)) return 0;
e691fc45 1651 // Dbprintf("atqa: %02x %02x",resp[0],resp[1]);
1c611bbd 1652
ed258538 1653 if(p_hi14a_card) {
1654 memcpy(p_hi14a_card->atqa, resp, 2);
79a73ab2 1655 p_hi14a_card->uidlen = 0;
1656 memset(p_hi14a_card->uid,0,10);
1657 }
5f6d6c90 1658
79a73ab2 1659 // clear uid
1660 if (uid_ptr) {
1c611bbd 1661 memset(uid_ptr,0,10);
79a73ab2 1662 }
1663
ed258538 1664 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1665 // which case we need to make a cascade 2 request and select - this is a long UID
1666 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1667 for(; sak & 0x04; cascade_level++) {
1668 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1669 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1670
1671 // SELECT_ALL
9492e0b0 1672 ReaderTransmit(sel_all,sizeof(sel_all), NULL);
ed258538 1673 if (!ReaderReceive(resp)) return 0;
5f6d6c90 1674
e691fc45 1675 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1676 memset(uid_resp, 0, 4);
1677 uint16_t uid_resp_bits = 0;
1678 uint16_t collision_answer_offset = 0;
1679 // anti-collision-loop:
1680 while (Demod.collisionPos) {
1681 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1682 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1683 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1684 uid_resp[uid_resp_bits & 0xf8] |= UIDbit << (uid_resp_bits % 8);
1685 }
1686 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1687 uid_resp_bits++;
1688 // construct anticollosion command:
1689 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1690 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1691 sel_uid[2+i] = uid_resp[i];
1692 }
1693 collision_answer_offset = uid_resp_bits%8;
1694 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1695 if (!ReaderReceiveOffset(resp, collision_answer_offset)) return 0;
1696 }
1697 // finally, add the last bits and BCC of the UID
1698 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1699 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1700 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1701 }
1702
1703 } else { // no collision, use the response to SELECT_ALL as current uid
1704 memcpy(uid_resp,resp,4);
1705 }
1706 uid_resp_len = 4;
7bc95e2e 1707 // Dbprintf("uid: %02x %02x %02x %02x",uid_resp[0],uid_resp[1],uid_resp[2],uid_resp[3]);
5f6d6c90 1708
e691fc45 1709 // calculate crypto UID. Always use last 4 Bytes.
5f6d6c90 1710 if(cuid_ptr) {
1711 *cuid_ptr = bytes_to_num(uid_resp, 4);
79a73ab2 1712 }
e30c654b 1713
ed258538 1714 // Construct SELECT UID command
e691fc45 1715 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1716 memcpy(sel_uid+2,uid_resp,4); // the UID
1717 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1718 AppendCrc14443a(sel_uid,7); // calculate and add CRC
9492e0b0 1719 ReaderTransmit(sel_uid,sizeof(sel_uid), NULL);
534983d7 1720
ed258538 1721 // Receive the SAK
1722 if (!ReaderReceive(resp)) return 0;
1723 sak = resp[0];
79a73ab2 1724
1725 // Test if more parts of the uid are comming
e691fc45 1726 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
79a73ab2 1727 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1728 // http://www.nxp.com/documents/application_note/AN10927.pdf
2ed270a8
MHS
1729 // This was earlier:
1730 //memcpy(uid_resp, uid_resp + 1, 3);
1731 // But memcpy should not be used for overlapping arrays,
1732 // and memmove appears to not be available in the arm build.
ca4714cd
MHS
1733 // Therefore:
1734 uid_resp[0] = uid_resp[1];
1735 uid_resp[1] = uid_resp[2];
1736 uid_resp[2] = uid_resp[3];
1737
79a73ab2 1738 uid_resp_len = 3;
1739 }
5f6d6c90 1740
79a73ab2 1741 if(uid_ptr) {
1742 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1743 }
5f6d6c90 1744
79a73ab2 1745 if(p_hi14a_card) {
1746 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1747 p_hi14a_card->uidlen += uid_resp_len;
1748 }
ed258538 1749 }
79a73ab2 1750
ed258538 1751 if(p_hi14a_card) {
1752 p_hi14a_card->sak = sak;
1753 p_hi14a_card->ats_len = 0;
1754 }
534983d7 1755
ed258538 1756 if( (sak & 0x20) == 0) {
1757 return 2; // non iso14443a compliant tag
79a73ab2 1758 }
534983d7 1759
ed258538 1760 // Request for answer to select
5191b3d1 1761 AppendCrc14443a(rats, 2);
9492e0b0 1762 ReaderTransmit(rats, sizeof(rats), NULL);
1c611bbd 1763
5191b3d1 1764 if (!(len = ReaderReceive(resp))) return 0;
1765
1766 if(p_hi14a_card) {
ed258538 1767 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1768 p_hi14a_card->ats_len = len;
1769 }
5f6d6c90 1770
ed258538 1771 // reset the PCB block number
1772 iso14_pcb_blocknum = 0;
1773 return 1;
7e758047 1774}
15c4dc5a 1775
7bc95e2e 1776void iso14443a_setup(uint8_t fpga_minor_mode) {
7cc204bf 1777 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
9492e0b0 1778 // Set up the synchronous serial port
1779 FpgaSetupSsc();
7bc95e2e 1780 // connect Demodulated Signal to ADC:
7e758047 1781 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
e30c654b 1782
7e758047 1783 // Signal field is on with the appropriate LED
7bc95e2e 1784 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
1785 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
1786 LED_D_ON();
1787 } else {
1788 LED_D_OFF();
1789 }
1790 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
534983d7 1791
7bc95e2e 1792 // Start the timer
1793 StartCountSspClk();
1794
1795 DemodReset();
1796 UartReset();
1797 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
1798 iso14a_set_timeout(1050); // 10ms default
7e758047 1799}
15c4dc5a 1800
534983d7 1801int iso14_apdu(uint8_t * cmd, size_t cmd_len, void * data) {
1802 uint8_t real_cmd[cmd_len+4];
1803 real_cmd[0] = 0x0a; //I-Block
b0127e65 1804 // put block number into the PCB
1805 real_cmd[0] |= iso14_pcb_blocknum;
534983d7 1806 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1807 memcpy(real_cmd+2, cmd, cmd_len);
1808 AppendCrc14443a(real_cmd,cmd_len+2);
1809
9492e0b0 1810 ReaderTransmit(real_cmd, cmd_len+4, NULL);
534983d7 1811 size_t len = ReaderReceive(data);
b0127e65 1812 uint8_t * data_bytes = (uint8_t *) data;
1813 if (!len)
1814 return 0; //DATA LINK ERROR
1815 // if we received an I- or R(ACK)-Block with a block number equal to the
1816 // current block number, toggle the current block number
1817 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1818 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1819 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1820 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1821 {
1822 iso14_pcb_blocknum ^= 1;
1823 }
1824
534983d7 1825 return len;
1826}
1827
7e758047 1828//-----------------------------------------------------------------------------
1829// Read an ISO 14443a tag. Send out commands and store answers.
1830//
1831//-----------------------------------------------------------------------------
7bc95e2e 1832void ReaderIso14443a(UsbCommand *c)
7e758047 1833{
534983d7 1834 iso14a_command_t param = c->arg[0];
7bc95e2e 1835 uint8_t *cmd = c->d.asBytes;
534983d7 1836 size_t len = c->arg[1];
5f6d6c90 1837 size_t lenbits = c->arg[2];
9492e0b0 1838 uint32_t arg0 = 0;
1839 byte_t buf[USB_CMD_DATA_SIZE];
902cb3c0 1840
5f6d6c90 1841 if(param & ISO14A_CONNECT) {
1842 iso14a_clear_trace();
1843 }
e691fc45 1844
7bc95e2e 1845 iso14a_set_tracing(TRUE);
e30c654b 1846
79a73ab2 1847 if(param & ISO14A_REQUEST_TRIGGER) {
7bc95e2e 1848 iso14a_set_trigger(TRUE);
9492e0b0 1849 }
15c4dc5a 1850
534983d7 1851 if(param & ISO14A_CONNECT) {
7bc95e2e 1852 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
5f6d6c90 1853 if(!(param & ISO14A_NO_SELECT)) {
1854 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
1855 arg0 = iso14443a_select_card(NULL,card,NULL);
1856 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
1857 }
534983d7 1858 }
e30c654b 1859
534983d7 1860 if(param & ISO14A_SET_TIMEOUT) {
1861 iso14a_timeout = c->arg[2];
1862 }
e30c654b 1863
534983d7 1864 if(param & ISO14A_APDU) {
902cb3c0 1865 arg0 = iso14_apdu(cmd, len, buf);
79a73ab2 1866 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
534983d7 1867 }
e30c654b 1868
534983d7 1869 if(param & ISO14A_RAW) {
1870 if(param & ISO14A_APPEND_CRC) {
1871 AppendCrc14443a(cmd,len);
1872 len += 2;
c7324bef 1873 if (lenbits) lenbits += 16;
15c4dc5a 1874 }
5f6d6c90 1875 if(lenbits>0) {
1876 ReaderTransmitBitsPar(cmd,lenbits,GetParity(cmd,lenbits/8), NULL);
1877 } else {
1878 ReaderTransmit(cmd,len, NULL);
1879 }
902cb3c0 1880 arg0 = ReaderReceive(buf);
9492e0b0 1881 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
534983d7 1882 }
15c4dc5a 1883
79a73ab2 1884 if(param & ISO14A_REQUEST_TRIGGER) {
7bc95e2e 1885 iso14a_set_trigger(FALSE);
9492e0b0 1886 }
15c4dc5a 1887
79a73ab2 1888 if(param & ISO14A_NO_DISCONNECT) {
534983d7 1889 return;
9492e0b0 1890 }
15c4dc5a 1891
15c4dc5a 1892 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1893 LEDsoff();
15c4dc5a 1894}
b0127e65 1895
1c611bbd 1896
1c611bbd 1897// Determine the distance between two nonces.
1898// Assume that the difference is small, but we don't know which is first.
1899// Therefore try in alternating directions.
1900int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
1901
1902 uint16_t i;
1903 uint32_t nttmp1, nttmp2;
e772353f 1904
1c611bbd 1905 if (nt1 == nt2) return 0;
1906
1907 nttmp1 = nt1;
1908 nttmp2 = nt2;
1909
1910 for (i = 1; i < 32768; i++) {
1911 nttmp1 = prng_successor(nttmp1, 1);
1912 if (nttmp1 == nt2) return i;
1913 nttmp2 = prng_successor(nttmp2, 1);
1914 if (nttmp2 == nt1) return -i;
1915 }
1916
1917 return(-99999); // either nt1 or nt2 are invalid nonces
e772353f 1918}
1919
e772353f 1920
1c611bbd 1921//-----------------------------------------------------------------------------
1922// Recover several bits of the cypher stream. This implements (first stages of)
1923// the algorithm described in "The Dark Side of Security by Obscurity and
1924// Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
1925// (article by Nicolas T. Courtois, 2009)
1926//-----------------------------------------------------------------------------
1927void ReaderMifare(bool first_try)
1928{
1929 // Mifare AUTH
1930 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
1931 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1932 static uint8_t mf_nr_ar3;
e772353f 1933
1c611bbd 1934 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
7bc95e2e 1935
d2f487af 1936 iso14a_clear_trace();
7bc95e2e 1937 iso14a_set_tracing(TRUE);
e772353f 1938
1c611bbd 1939 byte_t nt_diff = 0;
1940 byte_t par = 0;
1941 //byte_t par_mask = 0xff;
1942 static byte_t par_low = 0;
1943 bool led_on = TRUE;
ca4714cd 1944 uint8_t uid[10] ={0};
1c611bbd 1945 uint32_t cuid;
e772353f 1946
2ed270a8
MHS
1947 uint32_t nt =0 ;
1948 uint32_t previous_nt = 0;
1c611bbd 1949 static uint32_t nt_attacked = 0;
1950 byte_t par_list[8] = {0,0,0,0,0,0,0,0};
1951 byte_t ks_list[8] = {0,0,0,0,0,0,0,0};
e772353f 1952
1c611bbd 1953 static uint32_t sync_time;
1954 static uint32_t sync_cycles;
1955 int catch_up_cycles = 0;
1956 int last_catch_up = 0;
1957 uint16_t consecutive_resyncs = 0;
1958 int isOK = 0;
e772353f 1959
e772353f 1960
e772353f 1961
1c611bbd 1962 if (first_try) {
1c611bbd 1963 mf_nr_ar3 = 0;
7bc95e2e 1964 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
1965 sync_time = GetCountSspClk() & 0xfffffff8;
1c611bbd 1966 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
1967 nt_attacked = 0;
1968 nt = 0;
1969 par = 0;
1970 }
1971 else {
1972 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
1973 // nt_attacked = prng_successor(nt_attacked, 1);
1974 mf_nr_ar3++;
1975 mf_nr_ar[3] = mf_nr_ar3;
1976 par = par_low;
1977 }
e30c654b 1978
15c4dc5a 1979 LED_A_ON();
1980 LED_B_OFF();
1981 LED_C_OFF();
1c611bbd 1982
7bc95e2e 1983
1c611bbd 1984 for(uint16_t i = 0; TRUE; i++) {
1985
1986 WDT_HIT();
e30c654b 1987
1c611bbd 1988 // Test if the action was cancelled
1989 if(BUTTON_PRESS()) {
1990 break;
1991 }
1992
1993 LED_C_ON();
e30c654b 1994
1c611bbd 1995 if(!iso14443a_select_card(uid, NULL, &cuid)) {
9492e0b0 1996 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
1c611bbd 1997 continue;
1998 }
1999
9492e0b0 2000 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
1c611bbd 2001 catch_up_cycles = 0;
2002
2003 // if we missed the sync time already, advance to the next nonce repeat
7bc95e2e 2004 while(GetCountSspClk() > sync_time) {
9492e0b0 2005 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
1c611bbd 2006 }
e30c654b 2007
9492e0b0 2008 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2009 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
f89c7050 2010
1c611bbd 2011 // Receive the (4 Byte) "random" nonce
2012 if (!ReaderReceive(receivedAnswer)) {
9492e0b0 2013 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
1c611bbd 2014 continue;
2015 }
2016
1c611bbd 2017 previous_nt = nt;
2018 nt = bytes_to_num(receivedAnswer, 4);
2019
2020 // Transmit reader nonce with fake par
9492e0b0 2021 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
1c611bbd 2022
2023 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2024 int nt_distance = dist_nt(previous_nt, nt);
2025 if (nt_distance == 0) {
2026 nt_attacked = nt;
2027 }
2028 else {
2029 if (nt_distance == -99999) { // invalid nonce received, try again
2030 continue;
2031 }
2032 sync_cycles = (sync_cycles - nt_distance);
9492e0b0 2033 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
1c611bbd 2034 continue;
2035 }
2036 }
2037
2038 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2039 catch_up_cycles = -dist_nt(nt_attacked, nt);
2040 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2041 catch_up_cycles = 0;
2042 continue;
2043 }
2044 if (catch_up_cycles == last_catch_up) {
2045 consecutive_resyncs++;
2046 }
2047 else {
2048 last_catch_up = catch_up_cycles;
2049 consecutive_resyncs = 0;
2050 }
2051 if (consecutive_resyncs < 3) {
9492e0b0 2052 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
1c611bbd 2053 }
2054 else {
2055 sync_cycles = sync_cycles + catch_up_cycles;
9492e0b0 2056 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
1c611bbd 2057 }
2058 continue;
2059 }
2060
2061 consecutive_resyncs = 0;
2062
2063 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2064 if (ReaderReceive(receivedAnswer))
2065 {
9492e0b0 2066 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
1c611bbd 2067
2068 if (nt_diff == 0)
2069 {
2070 par_low = par & 0x07; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2071 }
2072
2073 led_on = !led_on;
2074 if(led_on) LED_B_ON(); else LED_B_OFF();
2075
2076 par_list[nt_diff] = par;
2077 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2078
2079 // Test if the information is complete
2080 if (nt_diff == 0x07) {
2081 isOK = 1;
2082 break;
2083 }
2084
2085 nt_diff = (nt_diff + 1) & 0x07;
2086 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2087 par = par_low;
2088 } else {
2089 if (nt_diff == 0 && first_try)
2090 {
2091 par++;
2092 } else {
2093 par = (((par >> 3) + 1) << 3) | par_low;
2094 }
2095 }
2096 }
2097
1c611bbd 2098
2099 mf_nr_ar[3] &= 0x1F;
2100
2101 byte_t buf[28];
2102 memcpy(buf + 0, uid, 4);
2103 num_to_bytes(nt, 4, buf + 4);
2104 memcpy(buf + 8, par_list, 8);
2105 memcpy(buf + 16, ks_list, 8);
2106 memcpy(buf + 24, mf_nr_ar, 4);
2107
2108 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2109
2110 // Thats it...
2111 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2112 LEDsoff();
7bc95e2e 2113
2114 iso14a_set_tracing(FALSE);
20f9a2a1 2115}
1c611bbd 2116
d2f487af 2117/**
2118 *MIFARE 1K simulate.
2119 *
2120 *@param flags :
2121 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2122 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2123 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2124 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2125 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2126 */
2127void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
20f9a2a1 2128{
50193c1e 2129 int cardSTATE = MFEMUL_NOFIELD;
8556b852 2130 int _7BUID = 0;
9ca155ba 2131 int vHf = 0; // in mV
8f51ddb0 2132 int res;
0a39986e
M
2133 uint32_t selTimer = 0;
2134 uint32_t authTimer = 0;
2135 uint32_t par = 0;
9ca155ba 2136 int len = 0;
8f51ddb0 2137 uint8_t cardWRBL = 0;
9ca155ba
M
2138 uint8_t cardAUTHSC = 0;
2139 uint8_t cardAUTHKEY = 0xff; // no authentication
51969283 2140 uint32_t cardRr = 0;
9ca155ba 2141 uint32_t cuid = 0;
d2f487af 2142 //uint32_t rn_enc = 0;
51969283 2143 uint32_t ans = 0;
0014cb46
M
2144 uint32_t cardINTREG = 0;
2145 uint8_t cardINTBLOCK = 0;
9ca155ba
M
2146 struct Crypto1State mpcs = {0, 0};
2147 struct Crypto1State *pcs;
2148 pcs = &mpcs;
d2f487af 2149 uint32_t numReads = 0;//Counts numer of times reader read a block
8f51ddb0
M
2150 uint8_t* receivedCmd = eml_get_bigbufptr_recbuf();
2151 uint8_t *response = eml_get_bigbufptr_sendbuf();
9ca155ba 2152
d2f487af 2153 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2154 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2155 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2156 uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2157 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
9ca155ba 2158
d2f487af 2159 uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2160 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
7bc95e2e 2161
d2f487af 2162 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2163 // This can be used in a reader-only attack.
2164 // (it can also be retrieved via 'hf 14a list', but hey...
2165 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0};
2166 uint8_t ar_nr_collected = 0;
0014cb46 2167
0a39986e 2168 // clear trace
7bc95e2e 2169 iso14a_clear_trace();
2170 iso14a_set_tracing(TRUE);
51969283 2171
7bc95e2e 2172 // Authenticate response - nonce
51969283 2173 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
7bc95e2e 2174
d2f487af 2175 //-- Determine the UID
2176 // Can be set from emulator memory, incoming data
2177 // and can be 7 or 4 bytes long
7bc95e2e 2178 if (flags & FLAG_4B_UID_IN_DATA)
d2f487af 2179 {
2180 // 4B uid comes from data-portion of packet
2181 memcpy(rUIDBCC1,datain,4);
8556b852 2182 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
8556b852 2183
7bc95e2e 2184 } else if (flags & FLAG_7B_UID_IN_DATA) {
d2f487af 2185 // 7B uid comes from data-portion of packet
2186 memcpy(&rUIDBCC1[1],datain,3);
2187 memcpy(rUIDBCC2, datain+3, 4);
2188 _7BUID = true;
7bc95e2e 2189 } else {
d2f487af 2190 // get UID from emul memory
2191 emlGetMemBt(receivedCmd, 7, 1);
2192 _7BUID = !(receivedCmd[0] == 0x00);
2193 if (!_7BUID) { // ---------- 4BUID
2194 emlGetMemBt(rUIDBCC1, 0, 4);
2195 } else { // ---------- 7BUID
2196 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2197 emlGetMemBt(rUIDBCC2, 3, 4);
2198 }
2199 }
7bc95e2e 2200
d2f487af 2201 /*
2202 * Regardless of what method was used to set the UID, set fifth byte and modify
2203 * the ATQA for 4 or 7-byte UID
2204 */
d2f487af 2205 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
7bc95e2e 2206 if (_7BUID) {
d2f487af 2207 rATQA[0] = 0x44;
8556b852 2208 rUIDBCC1[0] = 0x88;
8556b852
M
2209 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2210 }
2211
9ca155ba 2212 // We need to listen to the high-frequency, peak-detected path.
7bc95e2e 2213 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
9ca155ba 2214
9ca155ba 2215
d2f487af 2216 if (MF_DBGLEVEL >= 1) {
2217 if (!_7BUID) {
b03c0f2d 2218 Dbprintf("4B UID: %02x%02x%02x%02x",
2219 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
7bc95e2e 2220 } else {
b03c0f2d 2221 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2222 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2223 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
d2f487af 2224 }
2225 }
7bc95e2e 2226
2227 bool finished = FALSE;
d2f487af 2228 while (!BUTTON_PRESS() && !finished) {
9ca155ba 2229 WDT_HIT();
9ca155ba
M
2230
2231 // find reader field
2232 // Vref = 3300mV, and an 10:1 voltage divider on the input
2233 // can measure voltages up to 33000 mV
2234 if (cardSTATE == MFEMUL_NOFIELD) {
2235 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2236 if (vHf > MF_MINFIELDV) {
0014cb46 2237 cardSTATE_TO_IDLE();
9ca155ba
M
2238 LED_A_ON();
2239 }
2240 }
d2f487af 2241 if(cardSTATE == MFEMUL_NOFIELD) continue;
9ca155ba 2242
d2f487af 2243 //Now, get data
2244
7bc95e2e 2245 res = EmGetCmd(receivedCmd, &len);
d2f487af 2246 if (res == 2) { //Field is off!
2247 cardSTATE = MFEMUL_NOFIELD;
2248 LEDsoff();
2249 continue;
7bc95e2e 2250 } else if (res == 1) {
2251 break; //return value 1 means button press
2252 }
2253
d2f487af 2254 // REQ or WUP request in ANY state and WUP in HALTED state
2255 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2256 selTimer = GetTickCount();
2257 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2258 cardSTATE = MFEMUL_SELECT1;
2259
2260 // init crypto block
2261 LED_B_OFF();
2262 LED_C_OFF();
2263 crypto1_destroy(pcs);
2264 cardAUTHKEY = 0xff;
2265 continue;
0a39986e 2266 }
7bc95e2e 2267
50193c1e 2268 switch (cardSTATE) {
d2f487af 2269 case MFEMUL_NOFIELD:
2270 case MFEMUL_HALTED:
50193c1e 2271 case MFEMUL_IDLE:{
7bc95e2e 2272 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2273 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
50193c1e
M
2274 break;
2275 }
2276 case MFEMUL_SELECT1:{
9ca155ba
M
2277 // select all
2278 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
d2f487af 2279 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
9ca155ba 2280 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
0014cb46 2281 break;
9ca155ba
M
2282 }
2283
d2f487af 2284 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2285 {
2286 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2287 }
9ca155ba 2288 // select card
0a39986e
M
2289 if (len == 9 &&
2290 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
bfb6a143 2291 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
9ca155ba 2292 cuid = bytes_to_num(rUIDBCC1, 4);
8556b852
M
2293 if (!_7BUID) {
2294 cardSTATE = MFEMUL_WORK;
0014cb46
M
2295 LED_B_ON();
2296 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2297 break;
8556b852
M
2298 } else {
2299 cardSTATE = MFEMUL_SELECT2;
8556b852 2300 }
9ca155ba 2301 }
50193c1e
M
2302 break;
2303 }
d2f487af 2304 case MFEMUL_AUTH1:{
2305 if( len != 8)
2306 {
2307 cardSTATE_TO_IDLE();
7bc95e2e 2308 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2309 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
d2f487af 2310 break;
2311 }
2312 uint32_t ar = bytes_to_num(receivedCmd, 4);
2313 uint32_t nr= bytes_to_num(&receivedCmd[4], 4);
2314
2315 //Collect AR/NR
2316 if(ar_nr_collected < 2){
273b57a7 2317 if(ar_nr_responses[2] != ar)
2318 {// Avoid duplicates... probably not necessary, ar should vary.
d2f487af 2319 ar_nr_responses[ar_nr_collected*4] = cuid;
2320 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2321 ar_nr_responses[ar_nr_collected*4+2] = ar;
2322 ar_nr_responses[ar_nr_collected*4+3] = nr;
273b57a7 2323 ar_nr_collected++;
d2f487af 2324 }
2325 }
2326
2327 // --- crypto
2328 crypto1_word(pcs, ar , 1);
2329 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2330
2331 // test if auth OK
2332 if (cardRr != prng_successor(nonce, 64)){
b03c0f2d 2333 if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2334 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2335 cardRr, prng_successor(nonce, 64));
7bc95e2e 2336 // Shouldn't we respond anything here?
d2f487af 2337 // Right now, we don't nack or anything, which causes the
2338 // reader to do a WUPA after a while. /Martin
b03c0f2d 2339 // -- which is the correct response. /piwi
d2f487af 2340 cardSTATE_TO_IDLE();
7bc95e2e 2341 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2342 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
d2f487af 2343 break;
2344 }
2345
2346 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2347
2348 num_to_bytes(ans, 4, rAUTH_AT);
2349 // --- crypto
2350 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2351 LED_C_ON();
2352 cardSTATE = MFEMUL_WORK;
b03c0f2d 2353 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2354 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2355 GetTickCount() - authTimer);
d2f487af 2356 break;
2357 }
50193c1e 2358 case MFEMUL_SELECT2:{
7bc95e2e 2359 if (!len) {
2360 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2361 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2362 break;
2363 }
8556b852 2364 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
9ca155ba 2365 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
8556b852
M
2366 break;
2367 }
9ca155ba 2368
8556b852
M
2369 // select 2 card
2370 if (len == 9 &&
2371 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2372 EmSendCmd(rSAK, sizeof(rSAK));
8556b852
M
2373 cuid = bytes_to_num(rUIDBCC2, 4);
2374 cardSTATE = MFEMUL_WORK;
2375 LED_B_ON();
0014cb46 2376 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
8556b852
M
2377 break;
2378 }
0014cb46
M
2379
2380 // i guess there is a command). go into the work state.
7bc95e2e 2381 if (len != 4) {
2382 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2383 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2384 break;
2385 }
0014cb46 2386 cardSTATE = MFEMUL_WORK;
d2f487af 2387 //goto lbWORK;
2388 //intentional fall-through to the next case-stmt
50193c1e 2389 }
51969283 2390
7bc95e2e 2391 case MFEMUL_WORK:{
2392 if (len == 0) {
2393 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2394 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2395 break;
2396 }
2397
d2f487af 2398 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2399
7bc95e2e 2400 if(encrypted_data) {
51969283
M
2401 // decrypt seqence
2402 mf_crypto1_decrypt(pcs, receivedCmd, len);
d2f487af 2403 }
7bc95e2e 2404
d2f487af 2405 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2406 authTimer = GetTickCount();
2407 cardAUTHSC = receivedCmd[1] / 4; // received block num
2408 cardAUTHKEY = receivedCmd[0] - 0x60;
2409 crypto1_destroy(pcs);//Added by martin
2410 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
51969283 2411
d2f487af 2412 if (!encrypted_data) { // first authentication
b03c0f2d 2413 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
51969283 2414
d2f487af 2415 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2416 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
7bc95e2e 2417 } else { // nested authentication
b03c0f2d 2418 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
7bc95e2e 2419 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
d2f487af 2420 num_to_bytes(ans, 4, rAUTH_AT);
2421 }
2422 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2423 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2424 cardSTATE = MFEMUL_AUTH1;
2425 break;
51969283 2426 }
7bc95e2e 2427
8f51ddb0
M
2428 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2429 // BUT... ACK --> NACK
2430 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2431 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2432 break;
2433 }
2434
2435 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2436 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2437 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2438 break;
0a39986e
M
2439 }
2440
7bc95e2e 2441 if(len != 4) {
2442 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2443 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2444 break;
2445 }
d2f487af 2446
2447 if(receivedCmd[0] == 0x30 // read block
2448 || receivedCmd[0] == 0xA0 // write block
b03c0f2d 2449 || receivedCmd[0] == 0xC0 // inc
2450 || receivedCmd[0] == 0xC1 // dec
2451 || receivedCmd[0] == 0xC2 // restore
7bc95e2e 2452 || receivedCmd[0] == 0xB0) { // transfer
2453 if (receivedCmd[1] >= 16 * 4) {
d2f487af 2454 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2455 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2456 break;
2457 }
2458
7bc95e2e 2459 if (receivedCmd[1] / 4 != cardAUTHSC) {
8f51ddb0 2460 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
d2f487af 2461 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
8f51ddb0
M
2462 break;
2463 }
d2f487af 2464 }
2465 // read block
2466 if (receivedCmd[0] == 0x30) {
b03c0f2d 2467 if (MF_DBGLEVEL >= 4) {
d2f487af 2468 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2469 }
8f51ddb0
M
2470 emlGetMem(response, receivedCmd[1], 1);
2471 AppendCrc14443a(response, 16);
2472 mf_crypto1_encrypt(pcs, response, 18, &par);
2473 EmSendCmdPar(response, 18, par);
d2f487af 2474 numReads++;
7bc95e2e 2475 if(exitAfterNReads > 0 && numReads == exitAfterNReads) {
d2f487af 2476 Dbprintf("%d reads done, exiting", numReads);
2477 finished = true;
2478 }
0a39986e
M
2479 break;
2480 }
0a39986e 2481 // write block
d2f487af 2482 if (receivedCmd[0] == 0xA0) {
b03c0f2d 2483 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
8f51ddb0 2484 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
8f51ddb0
M
2485 cardSTATE = MFEMUL_WRITEBL2;
2486 cardWRBL = receivedCmd[1];
0a39986e 2487 break;
7bc95e2e 2488 }
0014cb46 2489 // increment, decrement, restore
d2f487af 2490 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
b03c0f2d 2491 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
d2f487af 2492 if (emlCheckValBl(receivedCmd[1])) {
2493 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
0014cb46
M
2494 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2495 break;
2496 }
2497 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2498 if (receivedCmd[0] == 0xC1)
2499 cardSTATE = MFEMUL_INTREG_INC;
2500 if (receivedCmd[0] == 0xC0)
2501 cardSTATE = MFEMUL_INTREG_DEC;
2502 if (receivedCmd[0] == 0xC2)
2503 cardSTATE = MFEMUL_INTREG_REST;
2504 cardWRBL = receivedCmd[1];
0014cb46
M
2505 break;
2506 }
0014cb46 2507 // transfer
d2f487af 2508 if (receivedCmd[0] == 0xB0) {
b03c0f2d 2509 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
0014cb46
M
2510 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2511 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2512 else
2513 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
0014cb46
M
2514 break;
2515 }
9ca155ba 2516 // halt
d2f487af 2517 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
9ca155ba 2518 LED_B_OFF();
0a39986e 2519 LED_C_OFF();
0014cb46
M
2520 cardSTATE = MFEMUL_HALTED;
2521 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
7bc95e2e 2522 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2523 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
0a39986e 2524 break;
9ca155ba 2525 }
d2f487af 2526 // RATS
2527 if (receivedCmd[0] == 0xe0) {//RATS
8f51ddb0
M
2528 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2529 break;
2530 }
d2f487af 2531 // command not allowed
2532 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2533 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
51969283 2534 break;
8f51ddb0
M
2535 }
2536 case MFEMUL_WRITEBL2:{
2537 if (len == 18){
2538 mf_crypto1_decrypt(pcs, receivedCmd, len);
2539 emlSetMem(receivedCmd, cardWRBL, 1);
2540 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2541 cardSTATE = MFEMUL_WORK;
51969283 2542 } else {
0014cb46 2543 cardSTATE_TO_IDLE();
7bc95e2e 2544 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2545 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
8f51ddb0 2546 }
8f51ddb0 2547 break;
50193c1e 2548 }
0014cb46
M
2549
2550 case MFEMUL_INTREG_INC:{
2551 mf_crypto1_decrypt(pcs, receivedCmd, len);
2552 memcpy(&ans, receivedCmd, 4);
2553 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2554 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2555 cardSTATE_TO_IDLE();
2556 break;
7bc95e2e 2557 }
2558 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2559 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
0014cb46
M
2560 cardINTREG = cardINTREG + ans;
2561 cardSTATE = MFEMUL_WORK;
2562 break;
2563 }
2564 case MFEMUL_INTREG_DEC:{
2565 mf_crypto1_decrypt(pcs, receivedCmd, len);
2566 memcpy(&ans, receivedCmd, 4);
2567 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2568 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2569 cardSTATE_TO_IDLE();
2570 break;
2571 }
7bc95e2e 2572 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2573 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
0014cb46
M
2574 cardINTREG = cardINTREG - ans;
2575 cardSTATE = MFEMUL_WORK;
2576 break;
2577 }
2578 case MFEMUL_INTREG_REST:{
2579 mf_crypto1_decrypt(pcs, receivedCmd, len);
2580 memcpy(&ans, receivedCmd, 4);
2581 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2582 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2583 cardSTATE_TO_IDLE();
2584 break;
2585 }
7bc95e2e 2586 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2587 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
0014cb46
M
2588 cardSTATE = MFEMUL_WORK;
2589 break;
2590 }
50193c1e 2591 }
50193c1e
M
2592 }
2593
9ca155ba
M
2594 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2595 LEDsoff();
2596
d2f487af 2597 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2598 {
2599 //May just aswell send the collected ar_nr in the response aswell
2600 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4);
2601 }
d714d3ef 2602
d2f487af 2603 if(flags & FLAG_NR_AR_ATTACK)
2604 {
7bc95e2e 2605 if(ar_nr_collected > 1) {
d2f487af 2606 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
d714d3ef 2607 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
d2f487af 2608 ar_nr_responses[0], // UID
2609 ar_nr_responses[1], //NT
2610 ar_nr_responses[2], //AR1
2611 ar_nr_responses[3], //NR1
2612 ar_nr_responses[6], //AR2
2613 ar_nr_responses[7] //NR2
2614 );
7bc95e2e 2615 } else {
d2f487af 2616 Dbprintf("Failed to obtain two AR/NR pairs!");
7bc95e2e 2617 if(ar_nr_collected >0) {
d714d3ef 2618 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
d2f487af 2619 ar_nr_responses[0], // UID
2620 ar_nr_responses[1], //NT
2621 ar_nr_responses[2], //AR1
2622 ar_nr_responses[3] //NR1
2623 );
2624 }
2625 }
2626 }
0014cb46 2627 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
15c4dc5a 2628}
b62a5a84 2629
d2f487af 2630
2631
b62a5a84
M
2632//-----------------------------------------------------------------------------
2633// MIFARE sniffer.
2634//
2635//-----------------------------------------------------------------------------
5cd9ec01
M
2636void RAMFUNC SniffMifare(uint8_t param) {
2637 // param:
2638 // bit 0 - trigger from first card answer
2639 // bit 1 - trigger from first reader 7-bit request
39864b0b
M
2640
2641 // C(red) A(yellow) B(green)
b62a5a84
M
2642 LEDsoff();
2643 // init trace buffer
991f13f2 2644 iso14a_clear_trace();
2645 iso14a_set_tracing(TRUE);
b62a5a84 2646
b62a5a84
M
2647 // The command (reader -> tag) that we're receiving.
2648 // The length of a received command will in most cases be no more than 18 bytes.
2649 // So 32 should be enough!
2650 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2651 // The response (tag -> reader) that we're receiving.
2652 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
2653
2654 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2655 // into trace, along with its length and other annotations.
2656 //uint8_t *trace = (uint8_t *)BigBuf;
2657
2658 // The DMA buffer, used to stream samples from the FPGA
7bc95e2e 2659 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
2660 uint8_t *data = dmaBuf;
2661 uint8_t previous_data = 0;
5cd9ec01
M
2662 int maxDataLen = 0;
2663 int dataLen = 0;
7bc95e2e 2664 bool ReaderIsActive = FALSE;
2665 bool TagIsActive = FALSE;
2666
2667 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
b62a5a84
M
2668
2669 // Set up the demodulator for tag -> reader responses.
2670 Demod.output = receivedResponse;
b62a5a84
M
2671
2672 // Set up the demodulator for the reader -> tag commands
b62a5a84 2673 Uart.output = receivedCmd;
b62a5a84
M
2674
2675 // Setup for the DMA.
7bc95e2e 2676 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
b62a5a84 2677
b62a5a84 2678 LED_D_OFF();
39864b0b
M
2679
2680 // init sniffer
2681 MfSniffInit();
b62a5a84 2682
b62a5a84 2683 // And now we loop, receiving samples.
7bc95e2e 2684 for(uint32_t sniffCounter = 0; TRUE; ) {
2685
5cd9ec01
M
2686 if(BUTTON_PRESS()) {
2687 DbpString("cancelled by button");
7bc95e2e 2688 break;
5cd9ec01
M
2689 }
2690
b62a5a84
M
2691 LED_A_ON();
2692 WDT_HIT();
39864b0b 2693
7bc95e2e 2694 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2695 // check if a transaction is completed (timeout after 2000ms).
2696 // if yes, stop the DMA transfer and send what we have so far to the client
2697 if (MfSniffSend(2000)) {
2698 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2699 sniffCounter = 0;
2700 data = dmaBuf;
2701 maxDataLen = 0;
2702 ReaderIsActive = FALSE;
2703 TagIsActive = FALSE;
2704 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
39864b0b 2705 }
39864b0b 2706 }
7bc95e2e 2707
2708 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2709 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2710 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2711 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2712 } else {
2713 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
5cd9ec01
M
2714 }
2715 // test for length of buffer
7bc95e2e 2716 if(dataLen > maxDataLen) { // we are more behind than ever...
2717 maxDataLen = dataLen;
5cd9ec01
M
2718 if(dataLen > 400) {
2719 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
7bc95e2e 2720 break;
b62a5a84
M
2721 }
2722 }
5cd9ec01 2723 if(dataLen < 1) continue;
b62a5a84 2724
7bc95e2e 2725 // primary buffer was stopped ( <-- we lost data!
5cd9ec01
M
2726 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2727 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2728 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
55acbb2a 2729 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
2730 }
2731 // secondary buffer sets as primary, secondary buffer was stopped
2732 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2733 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
b62a5a84
M
2734 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2735 }
5cd9ec01
M
2736
2737 LED_A_OFF();
b62a5a84 2738
7bc95e2e 2739 if (sniffCounter & 0x01) {
b62a5a84 2740
7bc95e2e 2741 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
2742 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
2743 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
2744 LED_C_INV();
2745 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parityBits, Uart.bitCount, TRUE)) break;
b62a5a84 2746
7bc95e2e 2747 /* And ready to receive another command. */
2748 UartReset();
2749
2750 /* And also reset the demod code */
2751 DemodReset();
2752 }
2753 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
2754 }
2755
2756 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
2757 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
2758 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
2759 LED_C_INV();
b62a5a84 2760
7bc95e2e 2761 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parityBits, Demod.bitCount, FALSE)) break;
39864b0b 2762
7bc95e2e 2763 // And ready to receive another response.
2764 DemodReset();
2765 }
2766 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
2767 }
b62a5a84
M
2768 }
2769
7bc95e2e 2770 previous_data = *data;
2771 sniffCounter++;
5cd9ec01 2772 data++;
d714d3ef 2773 if(data == dmaBuf + DMA_BUFFER_SIZE) {
5cd9ec01 2774 data = dmaBuf;
b62a5a84 2775 }
7bc95e2e 2776
b62a5a84
M
2777 } // main cycle
2778
2779 DbpString("COMMAND FINISHED");
2780
55acbb2a 2781 FpgaDisableSscDma();
39864b0b
M
2782 MfSniffEnd();
2783
7bc95e2e 2784 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
b62a5a84 2785 LEDsoff();
3803d529 2786}
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