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Commit | Line | Data |
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bd20f8f4 | 1 | @----------------------------------------------------------------------------- |
2 | @ This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
3 | @ at your option, any later version. See the LICENSE.txt file for the text of | |
4 | @ the license. | |
5 | @----------------------------------------------------------------------------- | |
6 | @ Reset vector for running from FLASH | |
7 | @----------------------------------------------------------------------------- | |
8 | ||
15c4dc5a | 9 | .section .startup,"ax" |
86d31955 | 10 | |
11 | .arm | |
15c4dc5a | 12 | |
13 | .global flashstart | |
14 | flashstart: | |
86d31955 | 15 | b reset |
16 | b undefined_instruction | |
17 | b software_interrupt | |
18 | b prefetch_abort | |
19 | b data_abort | |
20 | b . @reserved | |
2c3685c2 | 21 | ldr pc, [pc,#-0xF20] @ IRQ - read the AIC |
86d31955 | 22 | b fiq |
23 | ||
24 | reset: | |
25 | ldr sp, =_stack_end @ initialize stack pointer to top of RAM | |
26 | ||
27 | @ copy bootloader to RAM (in case the user re-flashes the bootloader) | |
28 | ldr r0, =__bootphase2_src_start__ | |
29 | ldr r1, =__bootphase2_start__ | |
30 | ldr r2, =__bootphase2_end__ | |
31 | 1: | |
32 | ldr r3, [r0], #4 | |
33 | str r3, [r1], #4 | |
34 | cmp r1, r2 | |
35 | blo 1b | |
36 | ||
37 | ldr r3, =ram_start @ start address of RAM bootloader | |
38 | bx r3 @ jump to it | |
39 | ||
40 | .ltorg | |
41 | ||
42 | undefined_instruction: | |
43 | b . | |
44 | software_interrupt: | |
45 | b . | |
46 | prefetch_abort: | |
47 | b . | |
48 | data_abort: | |
49 | b . | |
86d31955 | 50 | fiq: |
51 | b . |