fpga_compress: interleave (combine) fpga_lf.bit and fpga_hf.bit before compression.
[proxmark3-svn] / armsrc / ldscript
CommitLineData
e949e6a6 1/*
2-----------------------------------------------------------------------------
3 This code is licensed to you under the terms of the GNU GPL, version 2 or,
4 at your option, any later version. See the LICENSE.txt file for the text of
5 the license.
6-----------------------------------------------------------------------------
7 Linker script for the ARM binary
8-----------------------------------------------------------------------------
9*/
15c4dc5a 10INCLUDE ../common/ldscript.common
11
98bf65a6 12PHDRS
13{
e335ca28 14 text PT_LOAD FLAGS(5);
98bf65a6 15 data PT_LOAD;
16 bss PT_LOAD;
17}
18
15c4dc5a 19ENTRY(Vector)
20SECTIONS
21{
98bf65a6 22 .start : {
23 *(.startos)
24 } >osimage :text
25
26 .text : {
15c4dc5a 27 *(.text)
28 *(.text.*)
29 *(.eh_frame)
30 *(.glue_7)
31 *(.glue_7t)
98bf65a6 32 } >osimage :text
33
34 .rodata : {
35 *(.rodata)
cc7580be 36 *(.rodata.*)
fb228974 37 *(fpga_all_bit.data)
9af48358 38 KEEP(*(.version_information))
98bf65a6 39 } >osimage :text
40
41 . = ALIGN(4);
42
15c4dc5a 43 .data : {
15c4dc5a 44 *(.data)
45 *(.data.*)
6c1e2d95 46 *(.ramfunc)
98bf65a6 47 . = ALIGN(4);
48 } >ram AT>osimage :data
49
50 __data_src_start__ = LOADADDR(.data);
51 __data_start__ = ADDR(.data);
52 __data_end__ = __data_start__ + SIZEOF(.data);
e6153040 53 __os_size__ = SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.rodata);
15c4dc5a 54
55 .bss : {
56 __bss_start__ = .;
57 *(.bss)
58 *(.bss.*)
98bf65a6 59 . = ALIGN(4);
60 __bss_end__ = .;
9b87d273 61 } >ram AT>ram :bss
15c4dc5a 62
98bf65a6 63 .commonarea (NOLOAD) : {
64 *(.commonarea)
65 } >commonarea :NONE
15c4dc5a 66}
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