]> git.zerfleddert.de Git - proxmark3-svn/blame_incremental - tools/at91sam7s512-jtagkey.cfg
Updated changelog
[proxmark3-svn] / tools / at91sam7s512-jtagkey.cfg
... / ...
CommitLineData
1#define our ports\r
2telnet_port 4444\r
3gdb_port 3333\r
4\r
5#commands specific to the Amontec JTAGKey\r
6interface ft2232\r
7ft2232_device_desc "Amontec JTAGkey A"\r
8ft2232_layout jtagkey\r
9ft2232_vid_pid 0x0403 0xcff8\r
10jtag_khz 200\r
11jtag_nsrst_delay 200\r
12jtag_ntrst_delay 200\r
13\r
14#reset_config <signals> [combination] [trst_type] [srst_type]\r
15reset_config srst_only srst_pulls_trst\r
16\r
17jtag newtap sam7x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f\r
18\r
19target create sam7x.cpu arm7tdmi -endian little -chain-position sam7x.cpu -variant arm7tdmi\r
20\r
21sam7x.cpu configure -event reset-init {\r
22 soft_reset_halt\r
23 mww 0xfffffd00 0xa5000004 # RSTC_CR: Reset peripherals\r
24 mww 0xfffffd44 0x00008000 # WDT_MR: disable watchdog\r
25 mww 0xfffffd08 0xa5000001 # RSTC_MR enable user reset\r
26 mww 0xfffffc20 0x00005001 # CKGR_MOR : enable the main oscillator\r
27 sleep 10\r
28 mww 0xfffffc2c 0x000b1c02 # CKGR_PLLR: 16MHz * 12/2 = 96MHz\r
29 sleep 10\r
30 mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 = 48 MHz\r
31 sleep 10\r
32 mww 0xffffff60 0x00480100 # MC_FMR: flash mode (FWS=1,FMCN=72)\r
33 sleep 100\r
34}\r
35\r
36gdb_memory_map enable\r
37gdb_breakpoint_override hard\r
38armv4_5 core_state arm\r
39\r
40sam7x.cpu configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x10000 -work-area-backup 0\r
41flash bank at91sam7 0x100000 0x40000 0 4 sam7x.cpu\r
Impressum, Datenschutz