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Fix 15 snoop (#752)
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1//-----------------------------------------------------------------------------
2// Jonathan Westhues, split Nov 2006
3// Modified by Greg Jones, Jan 2009
4// Modified by Adrian Dabrowski "atrox", Mar-Sept 2010,Oct 2011
5// Modified by piwi, Oct 2018
6//
7// This code is licensed to you under the terms of the GNU GPL, version 2 or,
8// at your option, any later version. See the LICENSE.txt file for the text of
9// the license.
10//-----------------------------------------------------------------------------
11// Routines to support ISO 15693. This includes both the reader software and
12// the `fake tag' modes.
13//-----------------------------------------------------------------------------
14
15// The ISO 15693 describes two transmission modes from reader to tag, and four
16// transmission modes from tag to reader. As of Oct 2018 this code supports
17// both reader modes and the high speed variant with one subcarrier from card to reader.
18// As long as the card fully support ISO 15693 this is no problem, since the
19// reader chooses both data rates, but some non-standard tags do not.
20// For card simulation, the code supports both high and low speed modes with one subcarrier.
21//
22// VCD (reader) -> VICC (tag)
23// 1 out of 256:
24// data rate: 1,66 kbit/s (fc/8192)
25// used for long range
26// 1 out of 4:
27// data rate: 26,48 kbit/s (fc/512)
28// used for short range, high speed
29//
30// VICC (tag) -> VCD (reader)
31// Modulation:
32// ASK / one subcarrier (423,75 khz)
33// FSK / two subcarriers (423,75 khz && 484,28 khz)
34// Data Rates / Modes:
35// low ASK: 6,62 kbit/s
36// low FSK: 6.67 kbit/s
37// high ASK: 26,48 kbit/s
38// high FSK: 26,69 kbit/s
39//-----------------------------------------------------------------------------
40
41
42// Random Remarks:
43// *) UID is always used "transmission order" (LSB), which is reverse to display order
44
45// TODO / BUGS / ISSUES:
46// *) signal decoding is unable to detect collisions.
47// *) add anti-collision support for inventory-commands
48// *) read security status of a block
49// *) sniffing and simulation do not support two subcarrier modes.
50// *) remove or refactor code under "deprecated"
51// *) document all the functions
52
53#include "iso15693.h"
54
55#include "proxmark3.h"
56#include "util.h"
57#include "apps.h"
58#include "string.h"
59#include "iso15693tools.h"
60#include "protocols.h"
61#include "cmd.h"
62#include "BigBuf.h"
63
64#define arraylen(x) (sizeof(x)/sizeof((x)[0]))
65
66static int DEBUG = 0;
67
68///////////////////////////////////////////////////////////////////////
69// ISO 15693 Part 2 - Air Interface
70// This section basicly contains transmission and receiving of bits
71///////////////////////////////////////////////////////////////////////
72
73#define Crc(data,datalen) Iso15693Crc(data,datalen)
74#define AddCrc(data,datalen) Iso15693AddCrc(data,datalen)
75#define sprintUID(target,uid) Iso15693sprintUID(target,uid)
76
77// buffers
78#define ISO15693_DMA_BUFFER_SIZE 2048 // must be a power of 2
79#define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
80#define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
81
82// timing. Delays in SSP_CLK ticks.
83#define DELAY_READER_TO_ARM 8
84#define DELAY_ARM_TO_READER 1
85#define DELAY_ISO15693_VCD_TO_VICC 132 // 132/423.75kHz = 311.5us from end of EOF to start of tag response
86#define DELAY_ISO15693_VICC_TO_VCD 1017 // 1017/3.39MHz = 300us between end of tag response and next reader command
87
88// ---------------------------
89// Signal Processing
90// ---------------------------
91
92// prepare data using "1 out of 4" code for later transmission
93// resulting data rate is 26.48 kbit/s (fc/512)
94// cmd ... data
95// n ... length of data
96static void CodeIso15693AsReader(uint8_t *cmd, int n)
97{
98 int i, j;
99
100 ToSendReset();
101
102 // Give it a bit of slack at the beginning
103 for(i = 0; i < 24; i++) {
104 ToSendStuffBit(1);
105 }
106
107 // SOF for 1of4
108 ToSendStuffBit(0);
109 ToSendStuffBit(1);
110 ToSendStuffBit(1);
111 ToSendStuffBit(1);
112 ToSendStuffBit(1);
113 ToSendStuffBit(0);
114 ToSendStuffBit(1);
115 ToSendStuffBit(1);
116 for(i = 0; i < n; i++) {
117 for(j = 0; j < 8; j += 2) {
118 int these = (cmd[i] >> j) & 3;
119 switch(these) {
120 case 0:
121 ToSendStuffBit(1);
122 ToSendStuffBit(0);
123 ToSendStuffBit(1);
124 ToSendStuffBit(1);
125 ToSendStuffBit(1);
126 ToSendStuffBit(1);
127 ToSendStuffBit(1);
128 ToSendStuffBit(1);
129 break;
130 case 1:
131 ToSendStuffBit(1);
132 ToSendStuffBit(1);
133 ToSendStuffBit(1);
134 ToSendStuffBit(0);
135 ToSendStuffBit(1);
136 ToSendStuffBit(1);
137 ToSendStuffBit(1);
138 ToSendStuffBit(1);
139 break;
140 case 2:
141 ToSendStuffBit(1);
142 ToSendStuffBit(1);
143 ToSendStuffBit(1);
144 ToSendStuffBit(1);
145 ToSendStuffBit(1);
146 ToSendStuffBit(0);
147 ToSendStuffBit(1);
148 ToSendStuffBit(1);
149 break;
150 case 3:
151 ToSendStuffBit(1);
152 ToSendStuffBit(1);
153 ToSendStuffBit(1);
154 ToSendStuffBit(1);
155 ToSendStuffBit(1);
156 ToSendStuffBit(1);
157 ToSendStuffBit(1);
158 ToSendStuffBit(0);
159 break;
160 }
161 }
162 }
163 // EOF
164 ToSendStuffBit(1);
165 ToSendStuffBit(1);
166 ToSendStuffBit(0);
167 ToSendStuffBit(1);
168
169 // Fill remainder of last byte with 1
170 for(i = 0; i < 4; i++) {
171 ToSendStuffBit(1);
172 }
173
174 ToSendMax++;
175}
176
177// encode data using "1 out of 256" scheme
178// data rate is 1,66 kbit/s (fc/8192)
179// is designed for more robust communication over longer distances
180static void CodeIso15693AsReader256(uint8_t *cmd, int n)
181{
182 int i, j;
183
184 ToSendReset();
185
186 // Give it a bit of slack at the beginning
187 for(i = 0; i < 24; i++) {
188 ToSendStuffBit(1);
189 }
190
191 // SOF for 1of256
192 ToSendStuffBit(0);
193 ToSendStuffBit(1);
194 ToSendStuffBit(1);
195 ToSendStuffBit(1);
196 ToSendStuffBit(1);
197 ToSendStuffBit(1);
198 ToSendStuffBit(1);
199 ToSendStuffBit(0);
200
201 for(i = 0; i < n; i++) {
202 for (j = 0; j<=255; j++) {
203 if (cmd[i]==j) {
204 ToSendStuffBit(1);
205 ToSendStuffBit(0);
206 } else {
207 ToSendStuffBit(1);
208 ToSendStuffBit(1);
209 }
210 }
211 }
212 // EOF
213 ToSendStuffBit(1);
214 ToSendStuffBit(1);
215 ToSendStuffBit(0);
216 ToSendStuffBit(1);
217
218 // Fill remainder of last byte with 1
219 for(i = 0; i < 4; i++) {
220 ToSendStuffBit(1);
221 }
222
223 ToSendMax++;
224}
225
226
227static void CodeIso15693AsTag(uint8_t *cmd, int n)
228{
229 ToSendReset();
230
231 // SOF
232 ToSendStuffBit(0);
233 ToSendStuffBit(0);
234 ToSendStuffBit(0);
235 ToSendStuffBit(1);
236 ToSendStuffBit(1);
237 ToSendStuffBit(1);
238 ToSendStuffBit(0);
239 ToSendStuffBit(1);
240
241 // data
242 for(int i = 0; i < n; i++) {
243 for(int j = 0; j < 8; j++) {
244 if ((cmd[i] >> j) & 0x01) {
245 ToSendStuffBit(0);
246 ToSendStuffBit(1);
247 } else {
248 ToSendStuffBit(1);
249 ToSendStuffBit(0);
250 }
251 }
252 }
253
254 // EOF
255 ToSendStuffBit(1);
256 ToSendStuffBit(0);
257 ToSendStuffBit(1);
258 ToSendStuffBit(1);
259 ToSendStuffBit(1);
260 ToSendStuffBit(0);
261 ToSendStuffBit(0);
262 ToSendStuffBit(0);
263
264 ToSendMax++;
265}
266
267
268// Transmit the command (to the tag) that was placed in cmd[].
269static void TransmitTo15693Tag(const uint8_t *cmd, int len, uint32_t start_time)
270{
271 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_TX);
272 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
273
274 while (GetCountSspClk() < start_time);
275
276 LED_B_ON();
277 for(int c = 0; c < len; ) {
278 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
279 AT91C_BASE_SSC->SSC_THR = ~cmd[c];
280 c++;
281 }
282 WDT_HIT();
283 }
284 LED_B_OFF();
285}
286
287//-----------------------------------------------------------------------------
288// Transmit the tag response (to the reader) that was placed in cmd[].
289//-----------------------------------------------------------------------------
290static void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow)
291{
292 // don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
293 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
294
295 uint8_t shift_delay = start_time & 0x00000007;
296 uint8_t bitmask = 0x00;
297 for (int i = 0; i < shift_delay; i++) {
298 bitmask |= (0x01 << i);
299 }
300
301 while (GetCountSspClk() < (start_time & 0xfffffff8)) ;
302
303 AT91C_BASE_SSC->SSC_THR = 0x00; // clear TXRDY
304
305 LED_C_ON();
306 uint8_t bits_to_shift = 0x00;
307 for(size_t c = 0; c <= len; c++) {
308 uint8_t bits_to_send = bits_to_shift << (8 - shift_delay) | (c==len?0x00:cmd[c]) >> shift_delay;
309 bits_to_shift = cmd[c] & bitmask;
310 for (int i = 7; i >= 0; i--) {
311 for (int j = 0; j < (slow?4:1); ) {
312 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
313 if (bits_to_send >> i & 0x01) {
314 AT91C_BASE_SSC->SSC_THR = 0xff;
315 } else {
316 AT91C_BASE_SSC->SSC_THR = 0x00;
317 }
318 j++;
319 }
320 WDT_HIT();
321 }
322 }
323 }
324 LED_C_OFF();
325}
326
327
328//=============================================================================
329// An ISO 15693 decoder for tag responses (one subcarrier only).
330// Uses cross correlation to identify each bit and EOF.
331// This function is called 8 times per bit (every 2 subcarrier cycles).
332// Subcarrier frequency fs is 424kHz, 1/fs = 2,36us,
333// i.e. function is called every 4,72us
334// LED handling:
335// LED C -> ON once we have received the SOF and are expecting the rest.
336// LED C -> OFF once we have received EOF or are unsynced
337//
338// Returns: true if we received a EOF
339// false if we are still waiting for some more
340//=============================================================================
341
342#define NOISE_THRESHOLD 30 // don't try to correlate noise
343
344typedef struct DecodeTag {
345 enum {
346 STATE_TAG_SOF_LOW,
347 STATE_TAG_SOF_HIGH,
348 STATE_TAG_SOF_HIGH_END,
349 STATE_TAG_RECEIVING_DATA,
350 STATE_TAG_EOF
351 } state;
352 int bitCount;
353 int posCount;
354 enum {
355 LOGIC0,
356 LOGIC1,
357 SOF_PART1,
358 SOF_PART2
359 } lastBit;
360 uint16_t shiftReg;
361 uint16_t max_len;
362 uint8_t *output;
363 int len;
364 int sum1, sum2;
365} DecodeTag_t;
366
367
368static int inline __attribute__((always_inline)) Handle15693SamplesFromTag(uint16_t amplitude, DecodeTag_t *DecodeTag)
369{
370 switch(DecodeTag->state) {
371 case STATE_TAG_SOF_LOW:
372 // waiting for 12 times low (11 times low is accepted as well)
373 if (amplitude < NOISE_THRESHOLD) {
374 DecodeTag->posCount++;
375 } else {
376 if (DecodeTag->posCount > 10) {
377 DecodeTag->posCount = 1;
378 DecodeTag->sum1 = 0;
379 DecodeTag->state = STATE_TAG_SOF_HIGH;
380 } else {
381 DecodeTag->posCount = 0;
382 }
383 }
384 break;
385
386 case STATE_TAG_SOF_HIGH:
387 // waiting for 10 times high. Take average over the last 8
388 if (amplitude > NOISE_THRESHOLD) {
389 DecodeTag->posCount++;
390 if (DecodeTag->posCount > 2) {
391 DecodeTag->sum1 += amplitude; // keep track of average high value
392 }
393 if (DecodeTag->posCount == 10) {
394 DecodeTag->sum1 >>= 4; // calculate half of average high value (8 samples)
395 DecodeTag->state = STATE_TAG_SOF_HIGH_END;
396 }
397 } else { // high phase was too short
398 DecodeTag->posCount = 1;
399 DecodeTag->state = STATE_TAG_SOF_LOW;
400 }
401 break;
402
403 case STATE_TAG_SOF_HIGH_END:
404 // waiting for a falling edge
405 if (amplitude < DecodeTag->sum1) { // signal drops below 50% average high: a falling edge
406 DecodeTag->lastBit = SOF_PART1; // detected 1st part of SOF (12 samples low and 12 samples high)
407 DecodeTag->shiftReg = 0;
408 DecodeTag->bitCount = 0;
409 DecodeTag->len = 0;
410 DecodeTag->sum1 = amplitude;
411 DecodeTag->sum2 = 0;
412 DecodeTag->posCount = 2;
413 DecodeTag->state = STATE_TAG_RECEIVING_DATA;
414 LED_C_ON();
415 } else {
416 DecodeTag->posCount++;
417 if (DecodeTag->posCount > 13) { // high phase too long
418 DecodeTag->posCount = 0;
419 DecodeTag->state = STATE_TAG_SOF_LOW;
420 LED_C_OFF();
421 }
422 }
423 break;
424
425 case STATE_TAG_RECEIVING_DATA:
426 if (DecodeTag->posCount == 1) {
427 DecodeTag->sum1 = 0;
428 DecodeTag->sum2 = 0;
429 }
430 if (DecodeTag->posCount <= 4) {
431 DecodeTag->sum1 += amplitude;
432 } else {
433 DecodeTag->sum2 += amplitude;
434 }
435 if (DecodeTag->posCount == 8) {
436 int32_t corr_1 = DecodeTag->sum2 - DecodeTag->sum1;
437 int32_t corr_0 = -corr_1;
438 int32_t corr_EOF = (DecodeTag->sum1 + DecodeTag->sum2) / 2;
439 if (corr_EOF > corr_0 && corr_EOF > corr_1) {
440 if (DecodeTag->lastBit == LOGIC0) { // this was already part of EOF
441 DecodeTag->state = STATE_TAG_EOF;
442 } else {
443 DecodeTag->posCount = 0;
444 DecodeTag->state = STATE_TAG_SOF_LOW;
445 LED_C_OFF();
446 }
447 } else if (corr_1 > corr_0) {
448 // logic 1
449 if (DecodeTag->lastBit == SOF_PART1) { // still part of SOF
450 DecodeTag->lastBit = SOF_PART2; // SOF completed
451 } else {
452 DecodeTag->lastBit = LOGIC1;
453 DecodeTag->shiftReg >>= 1;
454 DecodeTag->shiftReg |= 0x80;
455 DecodeTag->bitCount++;
456 if (DecodeTag->bitCount == 8) {
457 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
458 DecodeTag->len++;
459 if (DecodeTag->len > DecodeTag->max_len) {
460 // buffer overflow, give up
461 DecodeTag->posCount = 0;
462 DecodeTag->state = STATE_TAG_SOF_LOW;
463 LED_C_OFF();
464 }
465 DecodeTag->bitCount = 0;
466 DecodeTag->shiftReg = 0;
467 }
468 }
469 } else {
470 // logic 0
471 if (DecodeTag->lastBit == SOF_PART1) { // incomplete SOF
472 DecodeTag->posCount = 0;
473 DecodeTag->state = STATE_TAG_SOF_LOW;
474 LED_C_OFF();
475 } else {
476 DecodeTag->lastBit = LOGIC0;
477 DecodeTag->shiftReg >>= 1;
478 DecodeTag->bitCount++;
479 if (DecodeTag->bitCount == 8) {
480 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
481 DecodeTag->len++;
482 if (DecodeTag->len > DecodeTag->max_len) {
483 // buffer overflow, give up
484 DecodeTag->posCount = 0;
485 DecodeTag->state = STATE_TAG_SOF_LOW;
486 LED_C_OFF();
487 }
488 DecodeTag->bitCount = 0;
489 DecodeTag->shiftReg = 0;
490 }
491 }
492 }
493 DecodeTag->posCount = 0;
494 }
495 DecodeTag->posCount++;
496 break;
497
498 case STATE_TAG_EOF:
499 if (DecodeTag->posCount == 1) {
500 DecodeTag->sum1 = 0;
501 DecodeTag->sum2 = 0;
502 }
503 if (DecodeTag->posCount <= 4) {
504 DecodeTag->sum1 += amplitude;
505 } else {
506 DecodeTag->sum2 += amplitude;
507 }
508 if (DecodeTag->posCount == 8) {
509 int32_t corr_1 = DecodeTag->sum2 - DecodeTag->sum1;
510 int32_t corr_0 = -corr_1;
511 int32_t corr_EOF = (DecodeTag->sum1 + DecodeTag->sum2) / 2;
512 if (corr_EOF > corr_0 || corr_1 > corr_0) {
513 DecodeTag->posCount = 0;
514 DecodeTag->state = STATE_TAG_SOF_LOW;
515 LED_C_OFF();
516 } else {
517 LED_C_OFF();
518 return true;
519 }
520 }
521 DecodeTag->posCount++;
522 break;
523
524 }
525
526 return false;
527}
528
529
530static void DecodeTagInit(DecodeTag_t *DecodeTag, uint8_t *data, uint16_t max_len)
531{
532 DecodeTag->posCount = 0;
533 DecodeTag->state = STATE_TAG_SOF_LOW;
534 DecodeTag->output = data;
535 DecodeTag->max_len = max_len;
536}
537
538
539static void DecodeTagReset(DecodeTag_t *DecodeTag)
540{
541 DecodeTag->posCount = 0;
542 DecodeTag->state = STATE_TAG_SOF_LOW;
543}
544
545
546/*
547 * Receive and decode the tag response, also log to tracebuffer
548 */
549static int GetIso15693AnswerFromTag(uint8_t* response, uint16_t max_len, int timeout)
550{
551 int samples = 0;
552 bool gotFrame = false;
553
554 uint16_t *dmaBuf = (uint16_t*)BigBuf_malloc(ISO15693_DMA_BUFFER_SIZE*sizeof(uint16_t));
555
556 // the Decoder data structure
557 DecodeTag_t DecodeTag = { 0 };
558 DecodeTagInit(&DecodeTag, response, max_len);
559
560 // wait for last transfer to complete
561 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
562
563 // And put the FPGA in the appropriate mode
564 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_AMPLITUDE);
565
566 // Setup and start DMA.
567 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
568 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
569 uint16_t *upTo = dmaBuf;
570
571 for(;;) {
572 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
573
574 if (behindBy == 0) continue;
575
576 uint16_t tagdata = *upTo++;
577
578 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
579 upTo = dmaBuf; // start reading the circular buffer from the beginning
580 if(behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
581 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
582 break;
583 }
584 }
585 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
586 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
587 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
588 }
589
590 samples++;
591
592 if (Handle15693SamplesFromTag(tagdata, &DecodeTag)) {
593 gotFrame = true;
594 break;
595 }
596
597 if (samples > timeout && DecodeTag.state < STATE_TAG_RECEIVING_DATA) {
598 DecodeTag.len = 0;
599 break;
600 }
601
602 }
603
604 FpgaDisableSscDma();
605 BigBuf_free();
606
607 if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
608 samples, gotFrame, DecodeTag.state, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
609
610 if (DecodeTag.len > 0) {
611 LogTrace(DecodeTag.output, DecodeTag.len, 0, 0, NULL, false);
612 }
613
614 return DecodeTag.len;
615}
616
617
618//=============================================================================
619// An ISO15693 decoder for reader commands.
620//
621// This function is called 4 times per bit (every 2 subcarrier cycles).
622// Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
623// LED handling:
624// LED B -> ON once we have received the SOF and are expecting the rest.
625// LED B -> OFF once we have received EOF or are in error state or unsynced
626//
627// Returns: true if we received a EOF
628// false if we are still waiting for some more
629//=============================================================================
630
631typedef struct DecodeReader {
632 enum {
633 STATE_READER_UNSYNCD,
634 STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
635 STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
636 STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
637 STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4,
638 STATE_READER_RECEIVE_DATA_1_OUT_OF_4,
639 STATE_READER_RECEIVE_DATA_1_OUT_OF_256
640 } state;
641 enum {
642 CODING_1_OUT_OF_4,
643 CODING_1_OUT_OF_256
644 } Coding;
645 uint8_t shiftReg;
646 uint8_t bitCount;
647 int byteCount;
648 int byteCountMax;
649 int posCount;
650 int sum1, sum2;
651 uint8_t *output;
652} DecodeReader_t;
653
654
655static void DecodeReaderInit(DecodeReader_t* DecodeReader, uint8_t *data, uint16_t max_len)
656{
657 DecodeReader->output = data;
658 DecodeReader->byteCountMax = max_len;
659 DecodeReader->state = STATE_READER_UNSYNCD;
660 DecodeReader->byteCount = 0;
661 DecodeReader->bitCount = 0;
662 DecodeReader->posCount = 1;
663 DecodeReader->shiftReg = 0;
664}
665
666
667static void DecodeReaderReset(DecodeReader_t* DecodeReader)
668{
669 DecodeReader->state = STATE_READER_UNSYNCD;
670}
671
672
673static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uint8_t bit, DecodeReader_t *restrict DecodeReader)
674{
675 switch(DecodeReader->state) {
676 case STATE_READER_UNSYNCD:
677 if(!bit) {
678 // we went low, so this could be the beginning of a SOF
679 DecodeReader->posCount = 1;
680 DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
681 }
682 break;
683
684 case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
685 DecodeReader->posCount++;
686 if(bit) { // detected rising edge
687 if(DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
688 DecodeReaderReset(DecodeReader);
689 } else { // SOF
690 DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
691 }
692 } else {
693 if(DecodeReader->posCount > 5) { // stayed low for too long
694 DecodeReaderReset(DecodeReader);
695 } else {
696 // do nothing, keep waiting
697 }
698 }
699 break;
700
701 case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
702 DecodeReader->posCount++;
703 if(!bit) { // detected a falling edge
704 if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
705 DecodeReaderReset(DecodeReader);
706 } else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
707 DecodeReader->Coding = CODING_1_OUT_OF_4;
708 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
709 } else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
710 DecodeReaderReset(DecodeReader);
711 } else { // SOF for 1 out of 4 coding
712 DecodeReader->Coding = CODING_1_OUT_OF_256;
713 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
714 }
715 } else {
716 if(DecodeReader->posCount > 29) { // stayed high for too long
717 DecodeReaderReset(DecodeReader);
718 } else {
719 // do nothing, keep waiting
720 }
721 }
722 break;
723
724 case STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF:
725 DecodeReader->posCount++;
726 if (bit) { // detected rising edge
727 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
728 if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
729 DecodeReaderReset(DecodeReader);
730 } else {
731 DecodeReader->posCount = 1;
732 DecodeReader->bitCount = 0;
733 DecodeReader->byteCount = 0;
734 DecodeReader->sum1 = 1;
735 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
736 LED_B_ON();
737 }
738 } else { // CODING_1_OUT_OF_4
739 if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
740 DecodeReaderReset(DecodeReader);
741 } else {
742 DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
743 }
744 }
745 } else {
746 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
747 if (DecodeReader->posCount > 34) { // signal stayed low for too long
748 DecodeReaderReset(DecodeReader);
749 } else {
750 // do nothing, keep waiting
751 }
752 } else { // CODING_1_OUT_OF_4
753 if (DecodeReader->posCount > 26) { // signal stayed low for too long
754 DecodeReaderReset(DecodeReader);
755 } else {
756 // do nothing, keep waiting
757 }
758 }
759 }
760 break;
761
762 case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
763 DecodeReader->posCount++;
764 if (bit) {
765 if (DecodeReader->posCount == 33) {
766 DecodeReader->posCount = 1;
767 DecodeReader->bitCount = 0;
768 DecodeReader->byteCount = 0;
769 DecodeReader->sum1 = 1;
770 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
771 LED_B_ON();
772 } else {
773 // do nothing, keep waiting
774 }
775 } else { // unexpected falling edge
776 DecodeReaderReset(DecodeReader);
777 }
778 break;
779
780 case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
781 DecodeReader->posCount++;
782 if (DecodeReader->posCount == 1) {
783 DecodeReader->sum1 = bit;
784 } else if (DecodeReader->posCount <= 4) {
785 DecodeReader->sum1 += bit;
786 } else if (DecodeReader->posCount == 5) {
787 DecodeReader->sum2 = bit;
788 } else {
789 DecodeReader->sum2 += bit;
790 }
791 if (DecodeReader->posCount == 8) {
792 DecodeReader->posCount = 0;
793 int corr10 = DecodeReader->sum1 - DecodeReader->sum2;
794 int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
795 int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
796 if (corr01 > corr11 && corr01 > corr10) { // EOF
797 LED_B_OFF(); // Finished receiving
798 DecodeReaderReset(DecodeReader);
799 if (DecodeReader->byteCount != 0) {
800 return true;
801 }
802 }
803 if (corr10 > corr11) { // detected a 2bit position
804 DecodeReader->shiftReg >>= 2;
805 DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
806 }
807 if (DecodeReader->bitCount == 15) { // we have a full byte
808 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
809 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
810 // buffer overflow, give up
811 LED_B_OFF();
812 DecodeReaderReset(DecodeReader);
813 }
814 DecodeReader->bitCount = 0;
815 DecodeReader->shiftReg = 0;
816 } else {
817 DecodeReader->bitCount++;
818 }
819 }
820 break;
821
822 case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
823 DecodeReader->posCount++;
824 if (DecodeReader->posCount == 1) {
825 DecodeReader->sum1 = bit;
826 } else if (DecodeReader->posCount <= 4) {
827 DecodeReader->sum1 += bit;
828 } else if (DecodeReader->posCount == 5) {
829 DecodeReader->sum2 = bit;
830 } else {
831 DecodeReader->sum2 += bit;
832 }
833 if (DecodeReader->posCount == 8) {
834 DecodeReader->posCount = 0;
835 int corr10 = DecodeReader->sum1 - DecodeReader->sum2;
836 int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
837 int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
838 if (corr01 > corr11 && corr01 > corr10) { // EOF
839 LED_B_OFF(); // Finished receiving
840 DecodeReaderReset(DecodeReader);
841 if (DecodeReader->byteCount != 0) {
842 return true;
843 }
844 }
845 if (corr10 > corr11) { // detected the bit position
846 DecodeReader->shiftReg = DecodeReader->bitCount;
847 }
848 if (DecodeReader->bitCount == 255) { // we have a full byte
849 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
850 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
851 // buffer overflow, give up
852 LED_B_OFF();
853 DecodeReaderReset(DecodeReader);
854 }
855 }
856 DecodeReader->bitCount++;
857 }
858 break;
859
860 default:
861 LED_B_OFF();
862 DecodeReaderReset(DecodeReader);
863 break;
864 }
865
866 return false;
867}
868
869
870//-----------------------------------------------------------------------------
871// Receive a command (from the reader to us, where we are the simulated tag),
872// and store it in the given buffer, up to the given maximum length. Keeps
873// spinning, waiting for a well-framed command, until either we get one
874// (returns true) or someone presses the pushbutton on the board (false).
875//
876// Assume that we're called with the SSC (to the FPGA) and ADC path set
877// correctly.
878//-----------------------------------------------------------------------------
879
880static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time)
881{
882 int samples = 0;
883 bool gotFrame = false;
884 uint8_t b;
885
886 uint8_t *dmaBuf = BigBuf_malloc(ISO15693_DMA_BUFFER_SIZE);
887
888 // the decoder data structure
889 DecodeReader_t DecodeReader = {0};
890 DecodeReaderInit(&DecodeReader, received, max_len);
891
892 // wait for last transfer to complete
893 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
894
895 LED_D_OFF();
896 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
897
898 // clear receive register and wait for next transfer
899 uint32_t temp = AT91C_BASE_SSC->SSC_RHR;
900 (void) temp;
901 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
902
903 uint32_t bit_time = GetCountSspClk() & 0xfffffff8;
904
905 // Setup and start DMA.
906 FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
907 uint8_t *upTo = dmaBuf;
908
909 for(;;) {
910 uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
911
912 if (behindBy == 0) continue;
913
914 b = *upTo++;
915 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
916 upTo = dmaBuf; // start reading the circular buffer from the beginning
917 if(behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
918 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
919 break;
920 }
921 }
922 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
923 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
924 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
925 }
926
927 for (int i = 7; i >= 0; i--) {
928 if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
929 *eof_time = bit_time + samples - DELAY_READER_TO_ARM; // end of EOF
930 gotFrame = true;
931 break;
932 }
933 samples++;
934 }
935
936 if (gotFrame) {
937 break;
938 }
939
940 if (BUTTON_PRESS()) {
941 DecodeReader.byteCount = 0;
942 break;
943 }
944
945 WDT_HIT();
946 }
947
948
949 FpgaDisableSscDma();
950 BigBuf_free_keep_EM();
951
952 if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
953 samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
954
955 if (DecodeReader.byteCount > 0) {
956 LogTrace(DecodeReader.output, DecodeReader.byteCount, 0, 0, NULL, true);
957 }
958
959 return DecodeReader.byteCount;
960}
961
962
963// Encode (into the ToSend buffers) an identify request, which is the first
964// thing that you must send to a tag to get a response.
965static void BuildIdentifyRequest(void)
966{
967 uint8_t cmd[5];
968
969 uint16_t crc;
970 // one sub-carrier, inventory, 1 slot, fast rate
971 // AFI is at bit 5 (1<<4) when doing an INVENTORY
972 cmd[0] = (1 << 2) | (1 << 5) | (1 << 1);
973 // inventory command code
974 cmd[1] = 0x01;
975 // no mask
976 cmd[2] = 0x00;
977 //Now the CRC
978 crc = Crc(cmd, 3);
979 cmd[3] = crc & 0xff;
980 cmd[4] = crc >> 8;
981
982 CodeIso15693AsReader(cmd, sizeof(cmd));
983}
984
985
986//-----------------------------------------------------------------------------
987// Start to read an ISO 15693 tag. We send an identify request, then wait
988// for the response. The response is not demodulated, just left in the buffer
989// so that it can be downloaded to a PC and processed there.
990//-----------------------------------------------------------------------------
991void AcquireRawAdcSamplesIso15693(void)
992{
993 LEDsoff();
994 LED_A_ON();
995
996 uint8_t *dest = BigBuf_get_addr();
997
998 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
999 BuildIdentifyRequest();
1000
1001 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1002
1003 // Give the tags time to energize
1004 LED_D_ON();
1005 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1006 SpinDelay(100);
1007
1008 // Now send the command
1009 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_TX);
1010 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
1011
1012 LED_B_ON();
1013 for(int c = 0; c < ToSendMax; ) {
1014 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1015 AT91C_BASE_SSC->SSC_THR = ~ToSend[c];
1016 c++;
1017 }
1018 WDT_HIT();
1019 }
1020 LED_B_OFF();
1021
1022 // wait for last transfer to complete
1023 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
1024
1025 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1026 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_AMPLITUDE);
1027
1028 for(int c = 0; c < 4000; ) {
1029 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1030 uint16_t r = AT91C_BASE_SSC->SSC_RHR;
1031 dest[c++] = r >> 5;
1032 }
1033 }
1034
1035 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1036 LEDsoff();
1037}
1038
1039
1040void SnoopIso15693(void)
1041{
1042 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1043 BigBuf_free();
1044
1045 clear_trace();
1046 set_tracing(true);
1047
1048
1049 // The DMA buffer, used to stream samples from the FPGA
1050 uint16_t* dmaBuf = (uint16_t*)BigBuf_malloc(ISO15693_DMA_BUFFER_SIZE*sizeof(uint16_t));
1051 uint16_t *upTo;
1052
1053 // Count of samples received so far, so that we can include timing
1054 // information in the trace buffer.
1055 int samples = 0;
1056
1057 DecodeTag_t DecodeTag = {0};
1058 uint8_t response[ISO15693_MAX_RESPONSE_LENGTH];
1059 DecodeTagInit(&DecodeTag, response, sizeof(response));
1060
1061 DecodeReader_t DecodeReader = {0};;
1062 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1063 DecodeReaderInit(&DecodeReader, cmd, sizeof(cmd));
1064
1065 // Print some debug information about the buffer sizes
1066 if (DEBUG) {
1067 Dbprintf("Snooping buffers initialized:");
1068 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1069 Dbprintf(" Reader -> tag: %i bytes", ISO15693_MAX_COMMAND_LENGTH);
1070 Dbprintf(" tag -> Reader: %i bytes", ISO15693_MAX_RESPONSE_LENGTH);
1071 Dbprintf(" DMA: %i bytes", ISO15693_DMA_BUFFER_SIZE * sizeof(uint16_t));
1072 }
1073 Dbprintf("Snoop started. Press button to stop.");
1074
1075 // Signal field is off, no reader signal, no tag signal
1076 LEDsoff();
1077 // And put the FPGA in the appropriate mode
1078 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_SNOOP | FPGA_HF_READER_RX_XCORR_AMPLITUDE);
1079 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1080
1081 // Setup for the DMA.
1082 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1083 upTo = dmaBuf;
1084 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1085
1086 bool TagIsActive = false;
1087 bool ReaderIsActive = false;
1088 bool ExpectTagAnswer = false;
1089
1090 // And now we loop, receiving samples.
1091 for(;;) {
1092 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1093
1094 if (behindBy == 0) continue;
1095
1096 uint16_t snoopdata = *upTo++;
1097
1098 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1099 upTo = dmaBuf; // start reading the circular buffer from the beginning
1100 if(behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1101 Dbprintf("About to blow circular buffer - aborted! behindBy=%d, samples=%d", behindBy, samples);
1102 break;
1103 }
1104 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1105 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1106 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1107 WDT_HIT();
1108 if(BUTTON_PRESS()) {
1109 DbpString("Snoop stopped.");
1110 break;
1111 }
1112 }
1113 }
1114 samples++;
1115
1116 if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
1117 if (Handle15693SampleFromReader(snoopdata & 0x02, &DecodeReader)) {
1118 FpgaDisableSscDma();
1119 ExpectTagAnswer = true;
1120 LogTrace(DecodeReader.output, DecodeReader.byteCount, samples, samples, NULL, true);
1121 /* And ready to receive another command. */
1122 DecodeReaderReset(&DecodeReader);
1123 /* And also reset the demod code, which might have been */
1124 /* false-triggered by the commands from the reader. */
1125 DecodeTagReset(&DecodeTag);
1126 upTo = dmaBuf;
1127 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1128 }
1129 if (Handle15693SampleFromReader(snoopdata & 0x01, &DecodeReader)) {
1130 FpgaDisableSscDma();
1131 ExpectTagAnswer = true;
1132 LogTrace(DecodeReader.output, DecodeReader.byteCount, samples, samples, NULL, true);
1133 /* And ready to receive another command. */
1134 DecodeReaderReset(&DecodeReader);
1135 /* And also reset the demod code, which might have been */
1136 /* false-triggered by the commands from the reader. */
1137 DecodeTagReset(&DecodeTag);
1138 upTo = dmaBuf;
1139 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1140 }
1141 ReaderIsActive = (DecodeReader.state >= STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF);
1142 }
1143
1144 if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet
1145 if (Handle15693SamplesFromTag(snoopdata >> 2, &DecodeTag)) {
1146 FpgaDisableSscDma();
1147 //Use samples as a time measurement
1148 LogTrace(DecodeTag.output, DecodeTag.len, samples, samples, NULL, false);
1149 // And ready to receive another response.
1150 DecodeTagReset(&DecodeTag);
1151 DecodeReaderReset(&DecodeReader);
1152 ExpectTagAnswer = false;
1153 upTo = dmaBuf;
1154 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1155 }
1156 TagIsActive = (DecodeTag.state >= STATE_TAG_RECEIVING_DATA);
1157 }
1158
1159 }
1160
1161 FpgaDisableSscDma();
1162 BigBuf_free();
1163
1164 LEDsoff();
1165
1166 DbpString("Snoop statistics:");
1167 Dbprintf(" ExpectTagAnswer: %d", ExpectTagAnswer);
1168 Dbprintf(" DecodeTag State: %d", DecodeTag.state);
1169 Dbprintf(" DecodeTag byteCnt: %d", DecodeTag.len);
1170 Dbprintf(" DecodeReader State: %d", DecodeReader.state);
1171 Dbprintf(" DecodeReader byteCnt: %d", DecodeReader.byteCount);
1172 Dbprintf(" Trace length: %d", BigBuf_get_traceLen());
1173}
1174
1175
1176// Initialize the proxmark as iso15k reader
1177// (this might produces glitches that confuse some tags
1178static void Iso15693InitReader() {
1179 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1180 // Setup SSC
1181 // FpgaSetupSsc();
1182
1183 // Start from off (no field generated)
1184 LED_D_OFF();
1185 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1186 SpinDelay(10);
1187
1188 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1189 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1190
1191 // Give the tags time to energize
1192 LED_D_ON();
1193 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1194 SpinDelay(250);
1195}
1196
1197///////////////////////////////////////////////////////////////////////
1198// ISO 15693 Part 3 - Air Interface
1199// This section basically contains transmission and receiving of bits
1200///////////////////////////////////////////////////////////////////////
1201
1202
1203// uid is in transmission order (which is reverse of display order)
1204static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber )
1205{
1206 uint8_t cmd[13];
1207
1208 uint16_t crc;
1209 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1210 // followed by the block data
1211 cmd[0] = ISO15693_REQ_OPTION | ISO15693_REQ_ADDRESS | ISO15693_REQ_DATARATE_HIGH;
1212 // READ BLOCK command code
1213 cmd[1] = ISO15693_READBLOCK;
1214 // UID may be optionally specified here
1215 // 64-bit UID
1216 cmd[2] = uid[0];
1217 cmd[3] = uid[1];
1218 cmd[4] = uid[2];
1219 cmd[5] = uid[3];
1220 cmd[6] = uid[4];
1221 cmd[7] = uid[5];
1222 cmd[8] = uid[6];
1223 cmd[9] = uid[7]; // 0xe0; // always e0 (not exactly unique)
1224 // Block number to read
1225 cmd[10] = blockNumber;
1226 //Now the CRC
1227 crc = Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
1228 cmd[11] = crc & 0xff;
1229 cmd[12] = crc >> 8;
1230
1231 CodeIso15693AsReader(cmd, sizeof(cmd));
1232}
1233
1234
1235// Now the VICC>VCD responses when we are simulating a tag
1236static void BuildInventoryResponse(uint8_t *uid)
1237{
1238 uint8_t cmd[12];
1239
1240 uint16_t crc;
1241
1242 cmd[0] = 0; // No error, no protocol format extension
1243 cmd[1] = 0; // DSFID (data storage format identifier). 0x00 = not supported
1244 // 64-bit UID
1245 cmd[2] = uid[7]; //0x32;
1246 cmd[3] = uid[6]; //0x4b;
1247 cmd[4] = uid[5]; //0x03;
1248 cmd[5] = uid[4]; //0x01;
1249 cmd[6] = uid[3]; //0x00;
1250 cmd[7] = uid[2]; //0x10;
1251 cmd[8] = uid[1]; //0x05;
1252 cmd[9] = uid[0]; //0xe0;
1253 //Now the CRC
1254 crc = Crc(cmd, 10);
1255 cmd[10] = crc & 0xff;
1256 cmd[11] = crc >> 8;
1257
1258 CodeIso15693AsTag(cmd, sizeof(cmd));
1259}
1260
1261// Universal Method for sending to and recv bytes from a tag
1262// init ... should we initialize the reader?
1263// speed ... 0 low speed, 1 hi speed
1264// *recv will contain the tag's answer
1265// return: lenght of received data
1266int SendDataTag(uint8_t *send, int sendlen, bool init, int speed, uint8_t *recv, uint16_t max_recv_len, uint32_t start_time) {
1267
1268 LED_A_ON();
1269 LED_B_OFF();
1270 LED_C_OFF();
1271
1272 if (init) Iso15693InitReader();
1273
1274 int answerLen=0;
1275
1276 if (!speed) {
1277 // low speed (1 out of 256)
1278 CodeIso15693AsReader256(send, sendlen);
1279 } else {
1280 // high speed (1 out of 4)
1281 CodeIso15693AsReader(send, sendlen);
1282 }
1283
1284 TransmitTo15693Tag(ToSend, ToSendMax, start_time);
1285
1286 // Now wait for a response
1287 if (recv != NULL) {
1288 answerLen = GetIso15693AnswerFromTag(recv, max_recv_len, DELAY_ISO15693_VCD_TO_VICC * 2);
1289 }
1290
1291 LED_A_OFF();
1292
1293 return answerLen;
1294}
1295
1296
1297// --------------------------------------------------------------------
1298// Debug Functions
1299// --------------------------------------------------------------------
1300
1301// Decodes a message from a tag and displays its metadata and content
1302#define DBD15STATLEN 48
1303void DbdecodeIso15693Answer(int len, uint8_t *d) {
1304 char status[DBD15STATLEN+1]={0};
1305 uint16_t crc;
1306
1307 if (len > 3) {
1308 if (d[0] & ISO15693_RES_EXT)
1309 strncat(status,"ProtExt ", DBD15STATLEN);
1310 if (d[0] & ISO15693_RES_ERROR) {
1311 // error
1312 strncat(status,"Error ", DBD15STATLEN);
1313 switch (d[1]) {
1314 case 0x01:
1315 strncat(status,"01:notSupp", DBD15STATLEN);
1316 break;
1317 case 0x02:
1318 strncat(status,"02:notRecog", DBD15STATLEN);
1319 break;
1320 case 0x03:
1321 strncat(status,"03:optNotSupp", DBD15STATLEN);
1322 break;
1323 case 0x0f:
1324 strncat(status,"0f:noInfo", DBD15STATLEN);
1325 break;
1326 case 0x10:
1327 strncat(status,"10:doesn'tExist", DBD15STATLEN);
1328 break;
1329 case 0x11:
1330 strncat(status,"11:lockAgain", DBD15STATLEN);
1331 break;
1332 case 0x12:
1333 strncat(status,"12:locked", DBD15STATLEN);
1334 break;
1335 case 0x13:
1336 strncat(status,"13:progErr", DBD15STATLEN);
1337 break;
1338 case 0x14:
1339 strncat(status,"14:lockErr", DBD15STATLEN);
1340 break;
1341 default:
1342 strncat(status,"unknownErr", DBD15STATLEN);
1343 }
1344 strncat(status," ", DBD15STATLEN);
1345 } else {
1346 strncat(status,"NoErr ", DBD15STATLEN);
1347 }
1348
1349 crc=Crc(d,len-2);
1350 if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
1351 strncat(status,"CrcOK",DBD15STATLEN);
1352 else
1353 strncat(status,"CrcFail!",DBD15STATLEN);
1354
1355 Dbprintf("%s",status);
1356 }
1357}
1358
1359
1360
1361///////////////////////////////////////////////////////////////////////
1362// Functions called via USB/Client
1363///////////////////////////////////////////////////////////////////////
1364
1365void SetDebugIso15693(uint32_t debug) {
1366 DEBUG=debug;
1367 Dbprintf("Iso15693 Debug is now %s",DEBUG?"on":"off");
1368 return;
1369}
1370
1371
1372//-----------------------------------------------------------------------------
1373// Simulate an ISO15693 reader, perform anti-collision and then attempt to read a sector
1374// all demodulation performed in arm rather than host. - greg
1375//-----------------------------------------------------------------------------
1376void ReaderIso15693(uint32_t parameter)
1377{
1378 LEDsoff();
1379 LED_A_ON();
1380
1381 set_tracing(true);
1382
1383 int answerLen = 0;
1384 uint8_t TagUID[8] = {0x00};
1385
1386 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1387
1388 uint8_t answer[ISO15693_MAX_RESPONSE_LENGTH];
1389
1390 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1391 // Setup SSC
1392 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1393
1394 // Start from off (no field generated)
1395 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1396 SpinDelay(200);
1397
1398 // Give the tags time to energize
1399 LED_D_ON();
1400 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1401 SpinDelay(200);
1402 StartCountSspClk();
1403
1404
1405 // FIRST WE RUN AN INVENTORY TO GET THE TAG UID
1406 // THIS MEANS WE CAN PRE-BUILD REQUESTS TO SAVE CPU TIME
1407
1408 // Now send the IDENTIFY command
1409 BuildIdentifyRequest();
1410 TransmitTo15693Tag(ToSend, ToSendMax, 0);
1411
1412 // Now wait for a response
1413 answerLen = GetIso15693AnswerFromTag(answer, sizeof(answer), DELAY_ISO15693_VCD_TO_VICC * 2) ;
1414 uint32_t start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD;
1415
1416 if (answerLen >=12) // we should do a better check than this
1417 {
1418 TagUID[0] = answer[2];
1419 TagUID[1] = answer[3];
1420 TagUID[2] = answer[4];
1421 TagUID[3] = answer[5];
1422 TagUID[4] = answer[6];
1423 TagUID[5] = answer[7];
1424 TagUID[6] = answer[8]; // IC Manufacturer code
1425 TagUID[7] = answer[9]; // always E0
1426
1427 }
1428
1429 Dbprintf("%d octets read from IDENTIFY request:", answerLen);
1430 DbdecodeIso15693Answer(answerLen, answer);
1431 Dbhexdump(answerLen, answer, false);
1432
1433 // UID is reverse
1434 if (answerLen >= 12)
1435 Dbprintf("UID = %02hX%02hX%02hX%02hX%02hX%02hX%02hX%02hX",
1436 TagUID[7],TagUID[6],TagUID[5],TagUID[4],
1437 TagUID[3],TagUID[2],TagUID[1],TagUID[0]);
1438
1439
1440 // Dbprintf("%d octets read from SELECT request:", answerLen2);
1441 // DbdecodeIso15693Answer(answerLen2,answer2);
1442 // Dbhexdump(answerLen2,answer2,true);
1443
1444 // Dbprintf("%d octets read from XXX request:", answerLen3);
1445 // DbdecodeIso15693Answer(answerLen3,answer3);
1446 // Dbhexdump(answerLen3,answer3,true);
1447
1448 // read all pages
1449 if (answerLen >= 12 && DEBUG) {
1450
1451 // debugptr = BigBuf_get_addr();
1452
1453 int i = 0;
1454 while (i < 32) { // sanity check, assume max 32 pages
1455 BuildReadBlockRequest(TagUID, i);
1456 TransmitTo15693Tag(ToSend, ToSendMax, start_time);
1457 int answerLen = GetIso15693AnswerFromTag(answer, sizeof(answer), DELAY_ISO15693_VCD_TO_VICC * 2);
1458 start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD;
1459 if (answerLen > 0) {
1460 Dbprintf("READ SINGLE BLOCK %d returned %d octets:", i, answerLen);
1461 DbdecodeIso15693Answer(answerLen, answer);
1462 Dbhexdump(answerLen, answer, false);
1463 if ( *((uint32_t*) answer) == 0x07160101 ) break; // exit on NoPageErr
1464 }
1465 i++;
1466 }
1467 }
1468
1469 // for the time being, switch field off to protect rdv4.0
1470 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1471 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1472 LED_D_OFF();
1473
1474 LED_A_OFF();
1475}
1476
1477
1478// Simulate an ISO15693 TAG.
1479// For Inventory command: print command and send Inventory Response with given UID
1480// TODO: interpret other reader commands and send appropriate response
1481void SimTagIso15693(uint32_t parameter, uint8_t *uid)
1482{
1483 LEDsoff();
1484 LED_A_ON();
1485
1486 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1487 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1488 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1489 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1490
1491 StartCountSspClk();
1492
1493 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1494
1495 // Build a suitable response to the reader INVENTORY command
1496 BuildInventoryResponse(uid);
1497
1498 // Listen to reader
1499 while (!BUTTON_PRESS()) {
1500 uint32_t eof_time = 0, start_time = 0;
1501 int cmd_len = GetIso15693CommandFromReader(cmd, sizeof(cmd), &eof_time);
1502
1503 if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
1504 bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
1505 start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC - DELAY_ARM_TO_READER;
1506 TransmitTo15693Reader(ToSend, ToSendMax, start_time, slow);
1507 }
1508
1509 Dbprintf("%d bytes read from reader:", cmd_len);
1510 Dbhexdump(cmd_len, cmd, false);
1511 }
1512
1513 LEDsoff();
1514}
1515
1516
1517// Since there is no standardized way of reading the AFI out of a tag, we will brute force it
1518// (some manufactures offer a way to read the AFI, though)
1519void BruteforceIso15693Afi(uint32_t speed)
1520{
1521 LEDsoff();
1522 LED_A_ON();
1523
1524 uint8_t data[6];
1525 uint8_t recv[ISO15693_MAX_RESPONSE_LENGTH];
1526
1527 int datalen=0, recvlen=0;
1528
1529 Iso15693InitReader();
1530 StartCountSspClk();
1531
1532 // first without AFI
1533 // Tags should respond without AFI and with AFI=0 even when AFI is active
1534
1535 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
1536 data[1] = ISO15693_INVENTORY;
1537 data[2] = 0; // mask length
1538 datalen = AddCrc(data,3);
1539 recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), 0);
1540 uint32_t start_time = GetCountSspClk() + DELAY_ISO15693_VCD_TO_VICC;
1541 WDT_HIT();
1542 if (recvlen>=12) {
1543 Dbprintf("NoAFI UID=%s", sprintUID(NULL, &recv[2]));
1544 }
1545
1546 // now with AFI
1547
1548 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_AFI | ISO15693_REQINV_SLOT1;
1549 data[1] = ISO15693_INVENTORY;
1550 data[2] = 0; // AFI
1551 data[3] = 0; // mask length
1552
1553 for (int i = 0; i < 256; i++) {
1554 data[2] = i & 0xFF;
1555 datalen = AddCrc(data,4);
1556 recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time);
1557 start_time = GetCountSspClk() + DELAY_ISO15693_VCD_TO_VICC;
1558 WDT_HIT();
1559 if (recvlen >= 12) {
1560 Dbprintf("AFI=%i UID=%s", i, sprintUID(NULL, &recv[2]));
1561 }
1562 }
1563 Dbprintf("AFI Bruteforcing done.");
1564
1565 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1566 LEDsoff();
1567}
1568
1569// Allows to directly send commands to the tag via the client
1570void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]) {
1571
1572 int recvlen = 0;
1573 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1574
1575 LED_A_ON();
1576
1577 if (DEBUG) {
1578 Dbprintf("SEND:");
1579 Dbhexdump(datalen, data, false);
1580 }
1581
1582 recvlen = SendDataTag(data, datalen, true, speed, (recv?recvbuf:NULL), sizeof(recvbuf), 0);
1583
1584 if (recv) {
1585 if (DEBUG) {
1586 Dbprintf("RECV:");
1587 Dbhexdump(recvlen, recvbuf, false);
1588 DbdecodeIso15693Answer(recvlen, recvbuf);
1589 }
1590
1591 cmd_send(CMD_ACK, recvlen>ISO15693_MAX_RESPONSE_LENGTH?ISO15693_MAX_RESPONSE_LENGTH:recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
1592
1593 }
1594
1595 // for the time being, switch field off to protect rdv4.0
1596 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1597 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1598 LED_D_OFF();
1599
1600 LED_A_OFF();
1601}
1602
1603
1604
1605
1606// --------------------------------------------------------------------
1607// -- Misc & deprecated functions
1608// --------------------------------------------------------------------
1609
1610/*
1611
1612// do not use; has a fix UID
1613static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
1614{
1615 uint8_t cmd[12];
1616
1617 uint16_t crc;
1618 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1619 // followed by teh block data
1620 // one sub-carrier, inventory, 1 slot, fast rate
1621 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1622 // System Information command code
1623 cmd[1] = 0x2B;
1624 // UID may be optionally specified here
1625 // 64-bit UID
1626 cmd[2] = 0x32;
1627 cmd[3]= 0x4b;
1628 cmd[4] = 0x03;
1629 cmd[5] = 0x01;
1630 cmd[6] = 0x00;
1631 cmd[7] = 0x10;
1632 cmd[8] = 0x05;
1633 cmd[9]= 0xe0; // always e0 (not exactly unique)
1634 //Now the CRC
1635 crc = Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
1636 cmd[10] = crc & 0xff;
1637 cmd[11] = crc >> 8;
1638
1639 CodeIso15693AsReader(cmd, sizeof(cmd));
1640}
1641
1642
1643// do not use; has a fix UID
1644static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
1645{
1646 uint8_t cmd[14];
1647
1648 uint16_t crc;
1649 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1650 // followed by teh block data
1651 // one sub-carrier, inventory, 1 slot, fast rate
1652 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1653 // READ Multi BLOCK command code
1654 cmd[1] = 0x23;
1655 // UID may be optionally specified here
1656 // 64-bit UID
1657 cmd[2] = 0x32;
1658 cmd[3]= 0x4b;
1659 cmd[4] = 0x03;
1660 cmd[5] = 0x01;
1661 cmd[6] = 0x00;
1662 cmd[7] = 0x10;
1663 cmd[8] = 0x05;
1664 cmd[9]= 0xe0; // always e0 (not exactly unique)
1665 // First Block number to read
1666 cmd[10] = 0x00;
1667 // Number of Blocks to read
1668 cmd[11] = 0x2f; // read quite a few
1669 //Now the CRC
1670 crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1671 cmd[12] = crc & 0xff;
1672 cmd[13] = crc >> 8;
1673
1674 CodeIso15693AsReader(cmd, sizeof(cmd));
1675}
1676
1677// do not use; has a fix UID
1678static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t CmdCode)
1679{
1680 uint8_t cmd[14];
1681
1682 uint16_t crc;
1683 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1684 // followed by teh block data
1685 // one sub-carrier, inventory, 1 slot, fast rate
1686 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1687 // READ BLOCK command code
1688 cmd[1] = CmdCode;
1689 // UID may be optionally specified here
1690 // 64-bit UID
1691 cmd[2] = 0x32;
1692 cmd[3]= 0x4b;
1693 cmd[4] = 0x03;
1694 cmd[5] = 0x01;
1695 cmd[6] = 0x00;
1696 cmd[7] = 0x10;
1697 cmd[8] = 0x05;
1698 cmd[9]= 0xe0; // always e0 (not exactly unique)
1699 // Parameter
1700 cmd[10] = 0x00;
1701 cmd[11] = 0x0a;
1702
1703// cmd[12] = 0x00;
1704// cmd[13] = 0x00; //Now the CRC
1705 crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1706 cmd[12] = crc & 0xff;
1707 cmd[13] = crc >> 8;
1708
1709 CodeIso15693AsReader(cmd, sizeof(cmd));
1710}
1711
1712// do not use; has a fix UID
1713static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], uint8_t CmdCode)
1714{
1715 uint8_t cmd[14];
1716
1717 uint16_t crc;
1718 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1719 // followed by teh block data
1720 // one sub-carrier, inventory, 1 slot, fast rate
1721 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1722 // READ BLOCK command code
1723 cmd[1] = CmdCode;
1724 // UID may be optionally specified here
1725 // 64-bit UID
1726 cmd[2] = 0x32;
1727 cmd[3]= 0x4b;
1728 cmd[4] = 0x03;
1729 cmd[5] = 0x01;
1730 cmd[6] = 0x00;
1731 cmd[7] = 0x10;
1732 cmd[8] = 0x05;
1733 cmd[9]= 0xe0; // always e0 (not exactly unique)
1734 // Parameter
1735 cmd[10] = 0x05; // for custom codes this must be manufcturer code
1736 cmd[11] = 0x00;
1737
1738// cmd[12] = 0x00;
1739// cmd[13] = 0x00; //Now the CRC
1740 crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1741 cmd[12] = crc & 0xff;
1742 cmd[13] = crc >> 8;
1743
1744 CodeIso15693AsReader(cmd, sizeof(cmd));
1745}
1746
1747
1748
1749
1750*/
1751
1752
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