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Merge pull request #884 from pwpiwi/fix_iclass_snoop
[proxmark3-svn] / armsrc / iso15693.c
1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
3 // Modified by Greg Jones, Jan 2009
4 // Modified by Adrian Dabrowski "atrox", Mar-Sept 2010,Oct 2011
5 // Modified by piwi, Oct 2018
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support ISO 15693. This includes both the reader software and
12 // the `fake tag' modes.
13 //-----------------------------------------------------------------------------
14
15 // The ISO 15693 describes two transmission modes from reader to tag, and four
16 // transmission modes from tag to reader. As of Oct 2018 this code supports
17 // both reader modes and the high speed variant with one subcarrier from card to reader.
18 // As long as the card fully support ISO 15693 this is no problem, since the
19 // reader chooses both data rates, but some non-standard tags do not.
20 // For card simulation, the code supports both high and low speed modes with one subcarrier.
21 //
22 // VCD (reader) -> VICC (tag)
23 // 1 out of 256:
24 // data rate: 1,66 kbit/s (fc/8192)
25 // used for long range
26 // 1 out of 4:
27 // data rate: 26,48 kbit/s (fc/512)
28 // used for short range, high speed
29 //
30 // VICC (tag) -> VCD (reader)
31 // Modulation:
32 // ASK / one subcarrier (423,75 khz)
33 // FSK / two subcarriers (423,75 khz && 484,28 khz)
34 // Data Rates / Modes:
35 // low ASK: 6,62 kbit/s
36 // low FSK: 6.67 kbit/s
37 // high ASK: 26,48 kbit/s
38 // high FSK: 26,69 kbit/s
39 //-----------------------------------------------------------------------------
40
41
42 // Random Remarks:
43 // *) UID is always used "transmission order" (LSB), which is reverse to display order
44
45 // TODO / BUGS / ISSUES:
46 // *) signal decoding is unable to detect collisions.
47 // *) add anti-collision support for inventory-commands
48 // *) read security status of a block
49 // *) sniffing and simulation do not support two subcarrier modes.
50 // *) remove or refactor code under "deprecated"
51 // *) document all the functions
52
53 #include "iso15693.h"
54
55 #include "proxmark3.h"
56 #include "util.h"
57 #include "apps.h"
58 #include "string.h"
59 #include "iso15693tools.h"
60 #include "protocols.h"
61 #include "cmd.h"
62 #include "BigBuf.h"
63 #include "fpgaloader.h"
64
65 #define arraylen(x) (sizeof(x)/sizeof((x)[0]))
66
67 // Delays in SSP_CLK ticks.
68 // SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
69 #define DELAY_READER_TO_ARM 8
70 #define DELAY_ARM_TO_READER 0
71 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader. All values should be multiples of 16
72 #define DELAY_ARM_TO_TAG 16
73 #define DELAY_TAG_TO_ARM 32
74 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when snooping. All values should be multiples of 16
75 #define DELAY_TAG_TO_ARM_SNOOP 32
76 #define DELAY_READER_TO_ARM_SNOOP 32
77
78 static int DEBUG = 0;
79
80
81 ///////////////////////////////////////////////////////////////////////
82 // ISO 15693 Part 2 - Air Interface
83 // This section basically contains transmission and receiving of bits
84 ///////////////////////////////////////////////////////////////////////
85
86 // buffers
87 #define ISO15693_DMA_BUFFER_SIZE 256 // must be a power of 2
88 #define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
89 #define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
90
91
92 // specific LogTrace function for ISO15693: the duration needs to be scaled because otherwise it won't fit into a uint16_t
93 bool LogTrace_ISO15693(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag) {
94 uint32_t duration = timestamp_end - timestamp_start;
95 duration /= 32;
96 timestamp_end = timestamp_start + duration;
97 return LogTrace(btBytes, iLen, timestamp_start, timestamp_end, parity, readerToTag);
98 }
99
100
101 // ---------------------------
102 // Signal Processing
103 // ---------------------------
104
105 // prepare data using "1 out of 4" code for later transmission
106 // resulting data rate is 26.48 kbit/s (fc/512)
107 // cmd ... data
108 // n ... length of data
109 void CodeIso15693AsReader(uint8_t *cmd, int n) {
110
111 ToSendReset();
112
113 // SOF for 1of4
114 ToSend[++ToSendMax] = 0x84; //10000100
115
116 // data
117 for (int i = 0; i < n; i++) {
118 for (int j = 0; j < 8; j += 2) {
119 int these = (cmd[i] >> j) & 0x03;
120 switch(these) {
121 case 0:
122 ToSend[++ToSendMax] = 0x40; //01000000
123 break;
124 case 1:
125 ToSend[++ToSendMax] = 0x10; //00010000
126 break;
127 case 2:
128 ToSend[++ToSendMax] = 0x04; //00000100
129 break;
130 case 3:
131 ToSend[++ToSendMax] = 0x01; //00000001
132 break;
133 }
134 }
135 }
136
137 // EOF
138 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
139
140 ToSendMax++;
141 }
142
143 // encode data using "1 out of 256" scheme
144 // data rate is 1,66 kbit/s (fc/8192)
145 // is designed for more robust communication over longer distances
146 static void CodeIso15693AsReader256(uint8_t *cmd, int n)
147 {
148 ToSendReset();
149
150 // SOF for 1of256
151 ToSend[++ToSendMax] = 0x81; //10000001
152
153 // data
154 for(int i = 0; i < n; i++) {
155 for (int j = 0; j <= 255; j++) {
156 if (cmd[i] == j) {
157 ToSendStuffBit(0);
158 ToSendStuffBit(1);
159 } else {
160 ToSendStuffBit(0);
161 ToSendStuffBit(0);
162 }
163 }
164 }
165
166 // EOF
167 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
168
169 ToSendMax++;
170 }
171
172
173 // static uint8_t encode4Bits(const uint8_t b) {
174 // uint8_t c = b & 0xF;
175 // // OTA, the least significant bits first
176 // // The columns are
177 // // 1 - Bit value to send
178 // // 2 - Reversed (big-endian)
179 // // 3 - Manchester Encoded
180 // // 4 - Hex values
181
182 // switch(c){
183 // // 1 2 3 4
184 // case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
185 // case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
186 // case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
187 // case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
188 // case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
189 // case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
190 // case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
191 // case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
192 // case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
193 // case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
194 // case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
195 // case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
196 // case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
197 // case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
198 // case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
199 // default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
200
201 // }
202 // }
203
204 static const uint8_t encode_4bits[16] = { 0xaa, 0x6a, 0x9a, 0x5a, 0xa6, 0x66, 0x96, 0x56, 0xa9, 0x69, 0x99, 0x59, 0xa5, 0x65, 0x95, 0x55 };
205
206 void CodeIso15693AsTag(uint8_t *cmd, size_t len) {
207 /*
208 * SOF comprises 3 parts;
209 * * An unmodulated time of 56.64 us
210 * * 24 pulses of 423.75 kHz (fc/32)
211 * * A logic 1, which starts with an unmodulated time of 18.88us
212 * followed by 8 pulses of 423.75kHz (fc/32)
213 *
214 * EOF comprises 3 parts:
215 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
216 * time of 18.88us.
217 * - 24 pulses of fc/32
218 * - An unmodulated time of 56.64 us
219 *
220 * A logic 0 starts with 8 pulses of fc/32
221 * followed by an unmodulated time of 256/fc (~18,88us).
222 *
223 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
224 * 8 pulses of fc/32 (also 18.88us)
225 *
226 * A bit here becomes 8 pulses of fc/32. Therefore:
227 * The SOF can be written as 00011101 = 0x1D
228 * The EOF can be written as 10111000 = 0xb8
229 * A logic 1 is 01
230 * A logic 0 is 10
231 *
232 * */
233
234 ToSendReset();
235
236 // SOF
237 ToSend[++ToSendMax] = 0x1D; // 00011101
238
239 // data
240 for (int i = 0; i < len; i++) {
241 ToSend[++ToSendMax] = encode_4bits[cmd[i] & 0xF];
242 ToSend[++ToSendMax] = encode_4bits[cmd[i] >> 4];
243 }
244
245 // EOF
246 ToSend[++ToSendMax] = 0xB8; // 10111000
247
248 ToSendMax++;
249 }
250
251
252 // Transmit the command (to the tag) that was placed in cmd[].
253 void TransmitTo15693Tag(const uint8_t *cmd, int len, uint32_t *start_time) {
254
255 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_FULL_MOD);
256
257 if (*start_time < DELAY_ARM_TO_TAG) {
258 *start_time = DELAY_ARM_TO_TAG;
259 }
260
261 *start_time = (*start_time - DELAY_ARM_TO_TAG) & 0xfffffff0;
262
263 if (GetCountSspClk() > *start_time) { // we may miss the intended time
264 *start_time = (GetCountSspClk() + 16) & 0xfffffff0; // next possible time
265 }
266
267 while (GetCountSspClk() < *start_time)
268 /* wait */ ;
269
270 LED_B_ON();
271 for (int c = 0; c < len; c++) {
272 uint8_t data = cmd[c];
273 for (int i = 0; i < 8; i++) {
274 uint16_t send_word = (data & 0x80) ? 0xffff : 0x0000;
275 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
276 AT91C_BASE_SSC->SSC_THR = send_word;
277 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
278 AT91C_BASE_SSC->SSC_THR = send_word;
279
280 data <<= 1;
281 }
282 WDT_HIT();
283 }
284 LED_B_OFF();
285
286 *start_time = *start_time + DELAY_ARM_TO_TAG;
287
288 }
289
290
291 //-----------------------------------------------------------------------------
292 // Transmit the tag response (to the reader) that was placed in cmd[].
293 //-----------------------------------------------------------------------------
294 void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t *start_time, uint32_t slot_time, bool slow) {
295 // don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
296 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
297
298 uint32_t modulation_start_time = *start_time - DELAY_ARM_TO_READER + 3 * 8; // no need to transfer the unmodulated start of SOF
299
300 while (GetCountSspClk() > (modulation_start_time & 0xfffffff8) + 3) { // we will miss the intended time
301 if (slot_time) {
302 modulation_start_time += slot_time; // use next available slot
303 } else {
304 modulation_start_time = (modulation_start_time & 0xfffffff8) + 8; // next possible time
305 }
306 }
307
308 while (GetCountSspClk() < (modulation_start_time & 0xfffffff8))
309 /* wait */ ;
310
311 uint8_t shift_delay = modulation_start_time & 0x00000007;
312
313 *start_time = modulation_start_time + DELAY_ARM_TO_READER - 3 * 8;
314
315 LED_C_ON();
316 uint8_t bits_to_shift = 0x00;
317 uint8_t bits_to_send = 0x00;
318 for (size_t c = 0; c < len; c++) {
319 for (int i = (c==0?4:7); i >= 0; i--) {
320 uint8_t cmd_bits = ((cmd[c] >> i) & 0x01) ? 0xff : 0x00;
321 for (int j = 0; j < (slow?4:1); ) {
322 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
323 bits_to_send = bits_to_shift << (8 - shift_delay) | cmd_bits >> shift_delay;
324 AT91C_BASE_SSC->SSC_THR = bits_to_send;
325 bits_to_shift = cmd_bits;
326 j++;
327 }
328 }
329 }
330 WDT_HIT();
331 }
332 // send the remaining bits, padded with 0:
333 bits_to_send = bits_to_shift << (8 - shift_delay);
334 for ( ; ; ) {
335 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
336 AT91C_BASE_SSC->SSC_THR = bits_to_send;
337 break;
338 }
339 }
340 LED_C_OFF();
341 }
342
343
344 //=============================================================================
345 // An ISO 15693 decoder for tag responses (one subcarrier only).
346 // Uses cross correlation to identify each bit and EOF.
347 // This function is called 8 times per bit (every 2 subcarrier cycles).
348 // Subcarrier frequency fs is 424kHz, 1/fs = 2,36us,
349 // i.e. function is called every 4,72us
350 // LED handling:
351 // LED C -> ON once we have received the SOF and are expecting the rest.
352 // LED C -> OFF once we have received EOF or are unsynced
353 //
354 // Returns: true if we received a EOF
355 // false if we are still waiting for some more
356 //=============================================================================
357
358 #define NOISE_THRESHOLD 160 // don't try to correlate noise
359 #define MAX_PREVIOUS_AMPLITUDE (-1 - NOISE_THRESHOLD)
360
361 typedef struct DecodeTag {
362 enum {
363 STATE_TAG_SOF_LOW,
364 STATE_TAG_SOF_RISING_EDGE,
365 STATE_TAG_SOF_HIGH,
366 STATE_TAG_SOF_HIGH_END,
367 STATE_TAG_RECEIVING_DATA,
368 STATE_TAG_EOF,
369 STATE_TAG_EOF_TAIL
370 } state;
371 int bitCount;
372 int posCount;
373 enum {
374 LOGIC0,
375 LOGIC1,
376 SOF_PART1,
377 SOF_PART2
378 } lastBit;
379 uint16_t shiftReg;
380 uint16_t max_len;
381 uint8_t *output;
382 int len;
383 int sum1, sum2;
384 int threshold_sof;
385 int threshold_half;
386 uint16_t previous_amplitude;
387 } DecodeTag_t;
388
389
390 static int inline __attribute__((always_inline)) Handle15693SamplesFromTag(uint16_t amplitude, DecodeTag_t *DecodeTag) {
391 switch (DecodeTag->state) {
392 case STATE_TAG_SOF_LOW:
393 // waiting for a rising edge
394 if (amplitude > NOISE_THRESHOLD + DecodeTag->previous_amplitude) {
395 if (DecodeTag->posCount > 10) {
396 DecodeTag->threshold_sof = amplitude - DecodeTag->previous_amplitude; // to be divided by 2
397 DecodeTag->threshold_half = 0;
398 DecodeTag->state = STATE_TAG_SOF_RISING_EDGE;
399 } else {
400 DecodeTag->posCount = 0;
401 }
402 } else {
403 DecodeTag->posCount++;
404 DecodeTag->previous_amplitude = amplitude;
405 }
406 break;
407
408 case STATE_TAG_SOF_RISING_EDGE:
409 if (amplitude > DecodeTag->threshold_sof + DecodeTag->previous_amplitude) { // edge still rising
410 if (amplitude > DecodeTag->threshold_sof + DecodeTag->threshold_sof) { // steeper edge, take this as time reference
411 DecodeTag->posCount = 1;
412 } else {
413 DecodeTag->posCount = 2;
414 }
415 DecodeTag->threshold_sof = (amplitude - DecodeTag->previous_amplitude) / 2;
416 } else {
417 DecodeTag->posCount = 2;
418 DecodeTag->threshold_sof = DecodeTag->threshold_sof/2;
419 }
420 // DecodeTag->posCount = 2;
421 DecodeTag->state = STATE_TAG_SOF_HIGH;
422 break;
423
424 case STATE_TAG_SOF_HIGH:
425 // waiting for 10 times high. Take average over the last 8
426 if (amplitude > DecodeTag->threshold_sof) {
427 DecodeTag->posCount++;
428 if (DecodeTag->posCount > 2) {
429 DecodeTag->threshold_half += amplitude; // keep track of average high value
430 }
431 if (DecodeTag->posCount == 10) {
432 DecodeTag->threshold_half >>= 2; // (4 times 1/2 average)
433 DecodeTag->state = STATE_TAG_SOF_HIGH_END;
434 }
435 } else { // high phase was too short
436 DecodeTag->posCount = 1;
437 DecodeTag->previous_amplitude = amplitude;
438 DecodeTag->state = STATE_TAG_SOF_LOW;
439 }
440 break;
441
442 case STATE_TAG_SOF_HIGH_END:
443 // check for falling edge
444 if (DecodeTag->posCount == 13 && amplitude < DecodeTag->threshold_sof) {
445 DecodeTag->lastBit = SOF_PART1; // detected 1st part of SOF (12 samples low and 12 samples high)
446 DecodeTag->shiftReg = 0;
447 DecodeTag->bitCount = 0;
448 DecodeTag->len = 0;
449 DecodeTag->sum1 = amplitude;
450 DecodeTag->sum2 = 0;
451 DecodeTag->posCount = 2;
452 DecodeTag->state = STATE_TAG_RECEIVING_DATA;
453 // FpgaDisableTracing(); // DEBUGGING
454 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
455 // amplitude,
456 // DecodeTag->threshold_sof,
457 // DecodeTag->threshold_half/4,
458 // DecodeTag->previous_amplitude); // DEBUGGING
459 LED_C_ON();
460 } else {
461 DecodeTag->posCount++;
462 if (DecodeTag->posCount > 13) { // high phase too long
463 DecodeTag->posCount = 0;
464 DecodeTag->previous_amplitude = amplitude;
465 DecodeTag->state = STATE_TAG_SOF_LOW;
466 LED_C_OFF();
467 }
468 }
469 break;
470
471 case STATE_TAG_RECEIVING_DATA:
472 // FpgaDisableTracing(); // DEBUGGING
473 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
474 // amplitude,
475 // DecodeTag->threshold_sof,
476 // DecodeTag->threshold_half/4,
477 // DecodeTag->previous_amplitude); // DEBUGGING
478 if (DecodeTag->posCount == 1) {
479 DecodeTag->sum1 = 0;
480 DecodeTag->sum2 = 0;
481 }
482 if (DecodeTag->posCount <= 4) {
483 DecodeTag->sum1 += amplitude;
484 } else {
485 DecodeTag->sum2 += amplitude;
486 }
487 if (DecodeTag->posCount == 8) {
488 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in both halves
489 if (DecodeTag->lastBit == LOGIC0) { // this was already part of EOF
490 DecodeTag->state = STATE_TAG_EOF;
491 } else {
492 DecodeTag->posCount = 0;
493 DecodeTag->previous_amplitude = amplitude;
494 DecodeTag->state = STATE_TAG_SOF_LOW;
495 LED_C_OFF();
496 }
497 } else if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in second half
498 // logic 1
499 if (DecodeTag->lastBit == SOF_PART1) { // still part of SOF
500 DecodeTag->lastBit = SOF_PART2; // SOF completed
501 } else {
502 DecodeTag->lastBit = LOGIC1;
503 DecodeTag->shiftReg >>= 1;
504 DecodeTag->shiftReg |= 0x80;
505 DecodeTag->bitCount++;
506 if (DecodeTag->bitCount == 8) {
507 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
508 DecodeTag->len++;
509 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
510 if (DecodeTag->len > DecodeTag->max_len) {
511 // buffer overflow, give up
512 LED_C_OFF();
513 return true;
514 }
515 DecodeTag->bitCount = 0;
516 DecodeTag->shiftReg = 0;
517 }
518 }
519 } else if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
520 // logic 0
521 if (DecodeTag->lastBit == SOF_PART1) { // incomplete SOF
522 DecodeTag->posCount = 0;
523 DecodeTag->previous_amplitude = amplitude;
524 DecodeTag->state = STATE_TAG_SOF_LOW;
525 LED_C_OFF();
526 } else {
527 DecodeTag->lastBit = LOGIC0;
528 DecodeTag->shiftReg >>= 1;
529 DecodeTag->bitCount++;
530 if (DecodeTag->bitCount == 8) {
531 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
532 DecodeTag->len++;
533 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
534 if (DecodeTag->len > DecodeTag->max_len) {
535 // buffer overflow, give up
536 DecodeTag->posCount = 0;
537 DecodeTag->previous_amplitude = amplitude;
538 DecodeTag->state = STATE_TAG_SOF_LOW;
539 LED_C_OFF();
540 }
541 DecodeTag->bitCount = 0;
542 DecodeTag->shiftReg = 0;
543 }
544 }
545 } else { // no modulation
546 if (DecodeTag->lastBit == SOF_PART2) { // only SOF (this is OK for iClass)
547 LED_C_OFF();
548 return true;
549 } else {
550 DecodeTag->posCount = 0;
551 DecodeTag->state = STATE_TAG_SOF_LOW;
552 LED_C_OFF();
553 }
554 }
555 DecodeTag->posCount = 0;
556 }
557 DecodeTag->posCount++;
558 break;
559
560 case STATE_TAG_EOF:
561 if (DecodeTag->posCount == 1) {
562 DecodeTag->sum1 = 0;
563 DecodeTag->sum2 = 0;
564 }
565 if (DecodeTag->posCount <= 4) {
566 DecodeTag->sum1 += amplitude;
567 } else {
568 DecodeTag->sum2 += amplitude;
569 }
570 if (DecodeTag->posCount == 8) {
571 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
572 DecodeTag->posCount = 0;
573 DecodeTag->state = STATE_TAG_EOF_TAIL;
574 } else {
575 DecodeTag->posCount = 0;
576 DecodeTag->previous_amplitude = amplitude;
577 DecodeTag->state = STATE_TAG_SOF_LOW;
578 LED_C_OFF();
579 }
580 }
581 DecodeTag->posCount++;
582 break;
583
584 case STATE_TAG_EOF_TAIL:
585 if (DecodeTag->posCount == 1) {
586 DecodeTag->sum1 = 0;
587 DecodeTag->sum2 = 0;
588 }
589 if (DecodeTag->posCount <= 4) {
590 DecodeTag->sum1 += amplitude;
591 } else {
592 DecodeTag->sum2 += amplitude;
593 }
594 if (DecodeTag->posCount == 8) {
595 if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // no modulation in both halves
596 LED_C_OFF();
597 return true;
598 } else {
599 DecodeTag->posCount = 0;
600 DecodeTag->previous_amplitude = amplitude;
601 DecodeTag->state = STATE_TAG_SOF_LOW;
602 LED_C_OFF();
603 }
604 }
605 DecodeTag->posCount++;
606 break;
607 }
608
609 return false;
610 }
611
612
613 static void DecodeTagInit(DecodeTag_t *DecodeTag, uint8_t *data, uint16_t max_len) {
614 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
615 DecodeTag->posCount = 0;
616 DecodeTag->state = STATE_TAG_SOF_LOW;
617 DecodeTag->output = data;
618 DecodeTag->max_len = max_len;
619 }
620
621
622 static void DecodeTagReset(DecodeTag_t *DecodeTag) {
623 DecodeTag->posCount = 0;
624 DecodeTag->state = STATE_TAG_SOF_LOW;
625 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
626 }
627
628
629 /*
630 * Receive and decode the tag response, also log to tracebuffer
631 */
632 int GetIso15693AnswerFromTag(uint8_t* response, uint16_t max_len, uint16_t timeout, uint32_t *eof_time) {
633
634 int samples = 0;
635 int ret = 0;
636
637 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
638
639 // the Decoder data structure
640 DecodeTag_t DecodeTag = { 0 };
641 DecodeTagInit(&DecodeTag, response, max_len);
642
643 // wait for last transfer to complete
644 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
645
646 // And put the FPGA in the appropriate mode
647 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
648
649 // Setup and start DMA.
650 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
651 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
652 uint32_t dma_start_time = 0;
653 uint16_t *upTo = dmaBuf;
654
655 for(;;) {
656 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
657
658 if (behindBy == 0) continue;
659
660 samples++;
661 if (samples == 1) {
662 // DMA has transferred the very first data
663 dma_start_time = GetCountSspClk() & 0xfffffff0;
664 }
665
666 uint16_t tagdata = *upTo++;
667
668 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
669 upTo = dmaBuf; // start reading the circular buffer from the beginning
670 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
671 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
672 ret = -1;
673 break;
674 }
675 }
676 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
677 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
678 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
679 }
680
681 if (Handle15693SamplesFromTag(tagdata, &DecodeTag)) {
682 *eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM; // end of EOF
683 if (DecodeTag.lastBit == SOF_PART2) {
684 *eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
685 }
686 if (DecodeTag.len > DecodeTag.max_len) {
687 ret = -2; // buffer overflow
688 }
689 break;
690 }
691
692 if (samples > timeout && DecodeTag.state < STATE_TAG_RECEIVING_DATA) {
693 ret = -1; // timeout
694 break;
695 }
696
697 }
698
699 FpgaDisableSscDma();
700
701 if (DEBUG) Dbprintf("samples = %d, ret = %d, Decoder: state = %d, lastBit = %d, len = %d, bitCount = %d, posCount = %d",
702 samples, ret, DecodeTag.state, DecodeTag.lastBit, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
703
704 if (ret < 0) {
705 return ret;
706 }
707
708 uint32_t sof_time = *eof_time
709 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
710 - 32 * 16 // time for SOF transfer
711 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
712
713 if (DEBUG) Dbprintf("timing: sof_time = %d, eof_time = %d", sof_time, *eof_time);
714
715 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, *eof_time*4, NULL, false);
716
717 return DecodeTag.len;
718 }
719
720
721 //=============================================================================
722 // An ISO15693 decoder for reader commands.
723 //
724 // This function is called 4 times per bit (every 2 subcarrier cycles).
725 // Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
726 // LED handling:
727 // LED B -> ON once we have received the SOF and are expecting the rest.
728 // LED B -> OFF once we have received EOF or are in error state or unsynced
729 //
730 // Returns: true if we received a EOF
731 // false if we are still waiting for some more
732 //=============================================================================
733
734 typedef struct DecodeReader {
735 enum {
736 STATE_READER_UNSYNCD,
737 STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF,
738 STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
739 STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
740 STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
741 STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4,
742 STATE_READER_RECEIVE_DATA_1_OUT_OF_4,
743 STATE_READER_RECEIVE_DATA_1_OUT_OF_256,
744 STATE_READER_RECEIVE_JAMMING
745 } state;
746 enum {
747 CODING_1_OUT_OF_4,
748 CODING_1_OUT_OF_256
749 } Coding;
750 uint8_t shiftReg;
751 uint8_t bitCount;
752 int byteCount;
753 int byteCountMax;
754 int posCount;
755 int sum1, sum2;
756 uint8_t *output;
757 uint8_t jam_search_len;
758 uint8_t *jam_search_string;
759 } DecodeReader_t;
760
761
762 static void DecodeReaderInit(DecodeReader_t* DecodeReader, uint8_t *data, uint16_t max_len, uint8_t jam_search_len, uint8_t *jam_search_string) {
763 DecodeReader->output = data;
764 DecodeReader->byteCountMax = max_len;
765 DecodeReader->state = STATE_READER_UNSYNCD;
766 DecodeReader->byteCount = 0;
767 DecodeReader->bitCount = 0;
768 DecodeReader->posCount = 1;
769 DecodeReader->shiftReg = 0;
770 DecodeReader->jam_search_len = jam_search_len;
771 DecodeReader->jam_search_string = jam_search_string;
772 }
773
774
775 static void DecodeReaderReset(DecodeReader_t* DecodeReader) {
776 DecodeReader->state = STATE_READER_UNSYNCD;
777 }
778
779
780 static int inline __attribute__((always_inline)) Handle15693SampleFromReader(bool bit, DecodeReader_t *DecodeReader) {
781 switch (DecodeReader->state) {
782 case STATE_READER_UNSYNCD:
783 // wait for unmodulated carrier
784 if (bit) {
785 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
786 }
787 break;
788
789 case STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF:
790 if (!bit) {
791 // we went low, so this could be the beginning of a SOF
792 DecodeReader->posCount = 1;
793 DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
794 }
795 break;
796
797 case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
798 DecodeReader->posCount++;
799 if (bit) { // detected rising edge
800 if (DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
801 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
802 } else { // SOF
803 DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
804 }
805 } else {
806 if (DecodeReader->posCount > 5) { // stayed low for too long
807 DecodeReaderReset(DecodeReader);
808 } else {
809 // do nothing, keep waiting
810 }
811 }
812 break;
813
814 case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
815 DecodeReader->posCount++;
816 if (!bit) { // detected a falling edge
817 if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
818 DecodeReaderReset(DecodeReader);
819 } else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
820 DecodeReader->Coding = CODING_1_OUT_OF_4;
821 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
822 } else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
823 DecodeReaderReset(DecodeReader);
824 } else { // SOF for 1 out of 256 coding
825 DecodeReader->Coding = CODING_1_OUT_OF_256;
826 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
827 }
828 } else {
829 if (DecodeReader->posCount > 29) { // stayed high for too long
830 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
831 } else {
832 // do nothing, keep waiting
833 }
834 }
835 break;
836
837 case STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF:
838 DecodeReader->posCount++;
839 if (bit) { // detected rising edge
840 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
841 if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
842 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
843 } else {
844 DecodeReader->posCount = 1;
845 DecodeReader->bitCount = 0;
846 DecodeReader->byteCount = 0;
847 DecodeReader->sum1 = 1;
848 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
849 LED_B_ON();
850 }
851 } else { // CODING_1_OUT_OF_4
852 if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
853 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
854 } else {
855 DecodeReader->posCount = 1;
856 DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
857 }
858 }
859 } else {
860 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
861 if (DecodeReader->posCount > 34) { // signal stayed low for too long
862 DecodeReaderReset(DecodeReader);
863 } else {
864 // do nothing, keep waiting
865 }
866 } else { // CODING_1_OUT_OF_4
867 if (DecodeReader->posCount > 26) { // signal stayed low for too long
868 DecodeReaderReset(DecodeReader);
869 } else {
870 // do nothing, keep waiting
871 }
872 }
873 }
874 break;
875
876 case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
877 DecodeReader->posCount++;
878 if (bit) {
879 if (DecodeReader->posCount == 9) {
880 DecodeReader->posCount = 1;
881 DecodeReader->bitCount = 0;
882 DecodeReader->byteCount = 0;
883 DecodeReader->sum1 = 1;
884 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
885 LED_B_ON();
886 } else {
887 // do nothing, keep waiting
888 }
889 } else { // unexpected falling edge
890 DecodeReaderReset(DecodeReader);
891 }
892 break;
893
894 case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
895 DecodeReader->posCount++;
896 if (DecodeReader->posCount == 1) {
897 DecodeReader->sum1 = bit?1:0;
898 } else if (DecodeReader->posCount <= 4) {
899 if (bit) DecodeReader->sum1++;
900 } else if (DecodeReader->posCount == 5) {
901 DecodeReader->sum2 = bit?1:0;
902 } else {
903 if (bit) DecodeReader->sum2++;
904 }
905 if (DecodeReader->posCount == 8) {
906 DecodeReader->posCount = 0;
907 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
908 LED_B_OFF(); // Finished receiving
909 DecodeReaderReset(DecodeReader);
910 if (DecodeReader->byteCount != 0) {
911 return true;
912 }
913 } else if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected a 2bit position
914 DecodeReader->shiftReg >>= 2;
915 DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
916 }
917 if (DecodeReader->bitCount == 15) { // we have a full byte
918 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
919 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
920 // buffer overflow, give up
921 LED_B_OFF();
922 DecodeReaderReset(DecodeReader);
923 }
924 DecodeReader->bitCount = 0;
925 DecodeReader->shiftReg = 0;
926 if (DecodeReader->byteCount == DecodeReader->jam_search_len) {
927 if (!memcmp(DecodeReader->output, DecodeReader->jam_search_string, DecodeReader->jam_search_len)) {
928 LED_D_ON();
929 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_JAM);
930 DecodeReader->state = STATE_READER_RECEIVE_JAMMING;
931 }
932 }
933 } else {
934 DecodeReader->bitCount++;
935 }
936 }
937 break;
938
939 case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
940 DecodeReader->posCount++;
941 if (DecodeReader->posCount == 1) {
942 DecodeReader->sum1 = bit?1:0;
943 } else if (DecodeReader->posCount <= 4) {
944 if (bit) DecodeReader->sum1++;
945 } else if (DecodeReader->posCount == 5) {
946 DecodeReader->sum2 = bit?1:0;
947 } else if (bit) {
948 DecodeReader->sum2++;
949 }
950 if (DecodeReader->posCount == 8) {
951 DecodeReader->posCount = 0;
952 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
953 LED_B_OFF(); // Finished receiving
954 DecodeReaderReset(DecodeReader);
955 if (DecodeReader->byteCount != 0) {
956 return true;
957 }
958 } else if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected the bit position
959 DecodeReader->shiftReg = DecodeReader->bitCount;
960 }
961 if (DecodeReader->bitCount == 255) { // we have a full byte
962 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
963 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
964 // buffer overflow, give up
965 LED_B_OFF();
966 DecodeReaderReset(DecodeReader);
967 }
968 if (DecodeReader->byteCount == DecodeReader->jam_search_len) {
969 if (!memcmp(DecodeReader->output, DecodeReader->jam_search_string, DecodeReader->jam_search_len)) {
970 LED_D_ON();
971 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_JAM);
972 DecodeReader->state = STATE_READER_RECEIVE_JAMMING;
973 }
974 }
975 }
976 DecodeReader->bitCount++;
977 }
978 break;
979
980 case STATE_READER_RECEIVE_JAMMING:
981 DecodeReader->posCount++;
982 if (DecodeReader->Coding == CODING_1_OUT_OF_4) {
983 if (DecodeReader->posCount == 7*16) { // 7 bits jammed
984 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE); // stop jamming
985 // FpgaDisableTracing();
986 LED_D_OFF();
987 } else if (DecodeReader->posCount == 8*16) {
988 DecodeReader->posCount = 0;
989 DecodeReader->output[DecodeReader->byteCount++] = 0x00;
990 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
991 }
992 } else {
993 if (DecodeReader->posCount == 7*256) { // 7 bits jammend
994 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE); // stop jamming
995 LED_D_OFF();
996 } else if (DecodeReader->posCount == 8*256) {
997 DecodeReader->posCount = 0;
998 DecodeReader->output[DecodeReader->byteCount++] = 0x00;
999 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
1000 }
1001 }
1002 break;
1003
1004 default:
1005 LED_B_OFF();
1006 DecodeReaderReset(DecodeReader);
1007 break;
1008 }
1009
1010 return false;
1011 }
1012
1013
1014 //-----------------------------------------------------------------------------
1015 // Receive a command (from the reader to us, where we are the simulated tag),
1016 // and store it in the given buffer, up to the given maximum length. Keeps
1017 // spinning, waiting for a well-framed command, until either we get one
1018 // (returns len) or someone presses the pushbutton on the board (returns -1).
1019 //
1020 // Assume that we're called with the SSC (to the FPGA) and ADC path set
1021 // correctly.
1022 //-----------------------------------------------------------------------------
1023
1024 int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) {
1025 int samples = 0;
1026 bool gotFrame = false;
1027 uint8_t b;
1028
1029 uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
1030
1031 // the decoder data structure
1032 DecodeReader_t DecodeReader = {0};
1033 DecodeReaderInit(&DecodeReader, received, max_len, 0, NULL);
1034
1035 // wait for last transfer to complete
1036 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
1037
1038 LED_D_OFF();
1039 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1040
1041 // clear receive register and wait for next transfer
1042 uint32_t temp = AT91C_BASE_SSC->SSC_RHR;
1043 (void) temp;
1044 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
1045
1046 uint32_t dma_start_time = GetCountSspClk() & 0xfffffff8;
1047
1048 // Setup and start DMA.
1049 FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1050 uint8_t *upTo = dmaBuf;
1051
1052 for (;;) {
1053 uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1054
1055 if (behindBy == 0) continue;
1056
1057 b = *upTo++;
1058 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1059 upTo = dmaBuf; // start reading the circular buffer from the beginning
1060 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1061 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
1062 break;
1063 }
1064 }
1065 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1066 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1067 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1068 }
1069
1070 for (int i = 7; i >= 0; i--) {
1071 if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
1072 *eof_time = dma_start_time + samples - DELAY_READER_TO_ARM; // end of EOF
1073 gotFrame = true;
1074 break;
1075 }
1076 samples++;
1077 }
1078
1079 if (gotFrame) {
1080 break;
1081 }
1082
1083 if (BUTTON_PRESS()) {
1084 DecodeReader.byteCount = -1;
1085 break;
1086 }
1087
1088 WDT_HIT();
1089 }
1090
1091 FpgaDisableSscDma();
1092
1093 if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
1094 samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
1095
1096 if (DecodeReader.byteCount > 0) {
1097 uint32_t sof_time = *eof_time
1098 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128:2048) // time for byte transfers
1099 - 32 // time for SOF transfer
1100 - 16; // time for EOF transfer
1101 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*32, *eof_time*32, NULL, true);
1102 }
1103
1104 return DecodeReader.byteCount;
1105 }
1106
1107
1108 // Encode (into the ToSend buffers) an identify request, which is the first
1109 // thing that you must send to a tag to get a response.
1110 static void BuildIdentifyRequest(void)
1111 {
1112 uint8_t cmd[5];
1113
1114 uint16_t crc;
1115 // one sub-carrier, inventory, 1 slot, fast rate
1116 // AFI is at bit 5 (1<<4) when doing an INVENTORY
1117 cmd[0] = (1 << 2) | (1 << 5) | (1 << 1);
1118 // inventory command code
1119 cmd[1] = 0x01;
1120 // no mask
1121 cmd[2] = 0x00;
1122 //Now the CRC
1123 crc = Iso15693Crc(cmd, 3);
1124 cmd[3] = crc & 0xff;
1125 cmd[4] = crc >> 8;
1126
1127 CodeIso15693AsReader(cmd, sizeof(cmd));
1128 }
1129
1130
1131 //-----------------------------------------------------------------------------
1132 // Start to read an ISO 15693 tag. We send an identify request, then wait
1133 // for the response. The response is not demodulated, just left in the buffer
1134 // so that it can be downloaded to a PC and processed there.
1135 //-----------------------------------------------------------------------------
1136 void AcquireRawAdcSamplesIso15693(void)
1137 {
1138 LED_A_ON();
1139
1140 uint8_t *dest = BigBuf_get_addr();
1141
1142 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1143 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1144 LED_D_ON();
1145 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1146 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1147
1148 BuildIdentifyRequest();
1149
1150 // Give the tags time to energize
1151 SpinDelay(100);
1152
1153 // Now send the command
1154 uint32_t start_time = 0;
1155 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1156
1157 // wait for last transfer to complete
1158 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY)) ;
1159
1160 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
1161
1162 for(int c = 0; c < 4000; ) {
1163 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1164 uint16_t r = AT91C_BASE_SSC->SSC_RHR;
1165 dest[c++] = r >> 5;
1166 }
1167 }
1168
1169 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1170 LEDsoff();
1171 }
1172
1173
1174 void SnoopIso15693(uint8_t jam_search_len, uint8_t *jam_search_string) {
1175
1176 LED_A_ON();
1177
1178 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1179
1180 clear_trace();
1181 set_tracing(true);
1182
1183 // The DMA buffer, used to stream samples from the FPGA
1184 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
1185
1186 // Count of samples received so far, so that we can include timing
1187 // information in the trace buffer.
1188 int samples = 0;
1189
1190 DecodeTag_t DecodeTag = {0};
1191 uint8_t response[ISO15693_MAX_RESPONSE_LENGTH];
1192 DecodeTagInit(&DecodeTag, response, sizeof(response));
1193
1194 DecodeReader_t DecodeReader = {0};
1195 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1196 DecodeReaderInit(&DecodeReader, cmd, sizeof(cmd), jam_search_len, jam_search_string);
1197
1198 // Print some debug information about the buffer sizes
1199 if (DEBUG) {
1200 Dbprintf("Snooping buffers initialized:");
1201 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1202 Dbprintf(" Reader -> tag: %i bytes", ISO15693_MAX_COMMAND_LENGTH);
1203 Dbprintf(" tag -> Reader: %i bytes", ISO15693_MAX_RESPONSE_LENGTH);
1204 Dbprintf(" DMA: %i bytes", ISO15693_DMA_BUFFER_SIZE * sizeof(uint16_t));
1205 }
1206 Dbprintf("Snoop started. Press PM3 Button to stop.");
1207
1208 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE);
1209 LED_D_OFF();
1210 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1211 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1212 StartCountSspClk();
1213 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1214
1215 bool TagIsActive = false;
1216 bool ReaderIsActive = false;
1217 bool ExpectTagAnswer = false;
1218 uint32_t dma_start_time = 0;
1219 uint16_t *upTo = dmaBuf;
1220
1221 uint16_t max_behindBy = 0;
1222
1223 // And now we loop, receiving samples.
1224 for(;;) {
1225 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1226 if (behindBy > max_behindBy) {
1227 max_behindBy = behindBy;
1228 }
1229
1230 if (behindBy == 0) continue;
1231
1232 samples++;
1233 if (samples == 1) {
1234 // DMA has transferred the very first data
1235 dma_start_time = GetCountSspClk() & 0xfffffff0;
1236 }
1237
1238 uint16_t snoopdata = *upTo++;
1239
1240 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1241 upTo = dmaBuf; // start reading the circular buffer from the beginning
1242 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1243 // FpgaDisableTracing();
1244 Dbprintf("About to blow circular buffer - aborted! behindBy=%d, samples=%d", behindBy, samples);
1245 break;
1246 }
1247 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1248 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1249 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1250 WDT_HIT();
1251 if (BUTTON_PRESS()) {
1252 DbpString("Snoop stopped.");
1253 break;
1254 }
1255 }
1256 }
1257
1258 if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
1259 if (Handle15693SampleFromReader(snoopdata & 0x02, &DecodeReader)) {
1260 // FpgaDisableSscDma();
1261 uint32_t eof_time = dma_start_time + samples*16 + 8 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1262 if (DecodeReader.byteCount > 0) {
1263 uint32_t sof_time = eof_time
1264 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1265 - 32*16 // time for SOF transfer
1266 - 16*16; // time for EOF transfer
1267 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1268 }
1269 /* And ready to receive another command. */
1270 DecodeReaderReset(&DecodeReader);
1271 /* And also reset the demod code, which might have been */
1272 /* false-triggered by the commands from the reader. */
1273 DecodeTagReset(&DecodeTag);
1274 ReaderIsActive = false;
1275 ExpectTagAnswer = true;
1276 // upTo = dmaBuf;
1277 // samples = 0;
1278 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1279 // continue;
1280 } else if (Handle15693SampleFromReader(snoopdata & 0x01, &DecodeReader)) {
1281 // FpgaDisableSscDma();
1282 uint32_t eof_time = dma_start_time + samples*16 + 16 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1283 if (DecodeReader.byteCount > 0) {
1284 uint32_t sof_time = eof_time
1285 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1286 - 32*16 // time for SOF transfer
1287 - 16*16; // time for EOF transfer
1288 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1289 }
1290 /* And ready to receive another command. */
1291 DecodeReaderReset(&DecodeReader);
1292 /* And also reset the demod code, which might have been */
1293 /* false-triggered by the commands from the reader. */
1294 DecodeTagReset(&DecodeTag);
1295 ReaderIsActive = false;
1296 ExpectTagAnswer = true;
1297 // upTo = dmaBuf;
1298 // samples = 0;
1299 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1300 // continue;
1301 } else {
1302 ReaderIsActive = (DecodeReader.state >= STATE_READER_RECEIVE_DATA_1_OUT_OF_4);
1303 }
1304 }
1305
1306 if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet
1307 if (Handle15693SamplesFromTag(snoopdata >> 2, &DecodeTag)) {
1308 // FpgaDisableSscDma();
1309 uint32_t eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM_SNOOP; // end of EOF
1310 if (DecodeTag.lastBit == SOF_PART2) {
1311 eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
1312 }
1313 uint32_t sof_time = eof_time
1314 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
1315 - 32 * 16 // time for SOF transfer
1316 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
1317 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, eof_time*4, NULL, false);
1318 // And ready to receive another response.
1319 DecodeTagReset(&DecodeTag);
1320 DecodeReaderReset(&DecodeReader);
1321 ExpectTagAnswer = false;
1322 TagIsActive = false;
1323 // upTo = dmaBuf;
1324 // samples = 0;
1325 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1326 // continue;
1327 } else {
1328 TagIsActive = (DecodeTag.state >= STATE_TAG_RECEIVING_DATA);
1329 }
1330 }
1331
1332 }
1333
1334 FpgaDisableSscDma();
1335
1336 DbpString("Snoop statistics:");
1337 Dbprintf(" ExpectTagAnswer: %d, TagIsActive: %d, ReaderIsActive: %d", ExpectTagAnswer, TagIsActive, ReaderIsActive);
1338 Dbprintf(" DecodeTag State: %d", DecodeTag.state);
1339 Dbprintf(" DecodeTag byteCnt: %d", DecodeTag.len);
1340 Dbprintf(" DecodeTag posCount: %d", DecodeTag.posCount);
1341 Dbprintf(" DecodeReader State: %d", DecodeReader.state);
1342 Dbprintf(" DecodeReader byteCnt: %d", DecodeReader.byteCount);
1343 Dbprintf(" DecodeReader posCount: %d", DecodeReader.posCount);
1344 Dbprintf(" Trace length: %d", BigBuf_get_traceLen());
1345 Dbprintf(" Max behindBy: %d", max_behindBy);
1346 }
1347
1348
1349 // Initialize the proxmark as iso15k reader
1350 void Iso15693InitReader() {
1351 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1352
1353 // Start from off (no field generated)
1354 LED_D_OFF();
1355 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1356 SpinDelay(10);
1357
1358 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1359 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1360
1361 // Give the tags time to energize
1362 LED_D_ON();
1363 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1364 SpinDelay(250);
1365 }
1366
1367 ///////////////////////////////////////////////////////////////////////
1368 // ISO 15693 Part 3 - Air Interface
1369 // This section basically contains transmission and receiving of bits
1370 ///////////////////////////////////////////////////////////////////////
1371
1372
1373 // uid is in transmission order (which is reverse of display order)
1374 static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber )
1375 {
1376 uint8_t cmd[13];
1377
1378 uint16_t crc;
1379 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1380 // followed by the block data
1381 cmd[0] = ISO15693_REQ_OPTION | ISO15693_REQ_ADDRESS | ISO15693_REQ_DATARATE_HIGH;
1382 // READ BLOCK command code
1383 cmd[1] = ISO15693_READBLOCK;
1384 // UID may be optionally specified here
1385 // 64-bit UID
1386 cmd[2] = uid[0];
1387 cmd[3] = uid[1];
1388 cmd[4] = uid[2];
1389 cmd[5] = uid[3];
1390 cmd[6] = uid[4];
1391 cmd[7] = uid[5];
1392 cmd[8] = uid[6];
1393 cmd[9] = uid[7]; // 0xe0; // always e0 (not exactly unique)
1394 // Block number to read
1395 cmd[10] = blockNumber;
1396 //Now the CRC
1397 crc = Iso15693Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
1398 cmd[11] = crc & 0xff;
1399 cmd[12] = crc >> 8;
1400
1401 CodeIso15693AsReader(cmd, sizeof(cmd));
1402 }
1403
1404
1405 // Now the VICC>VCD responses when we are simulating a tag
1406 static void BuildInventoryResponse(uint8_t *uid)
1407 {
1408 uint8_t cmd[12];
1409
1410 uint16_t crc;
1411
1412 cmd[0] = 0; // No error, no protocol format extension
1413 cmd[1] = 0; // DSFID (data storage format identifier). 0x00 = not supported
1414 // 64-bit UID
1415 cmd[2] = uid[7]; //0x32;
1416 cmd[3] = uid[6]; //0x4b;
1417 cmd[4] = uid[5]; //0x03;
1418 cmd[5] = uid[4]; //0x01;
1419 cmd[6] = uid[3]; //0x00;
1420 cmd[7] = uid[2]; //0x10;
1421 cmd[8] = uid[1]; //0x05;
1422 cmd[9] = uid[0]; //0xe0;
1423 //Now the CRC
1424 crc = Iso15693Crc(cmd, 10);
1425 cmd[10] = crc & 0xff;
1426 cmd[11] = crc >> 8;
1427
1428 CodeIso15693AsTag(cmd, sizeof(cmd));
1429 }
1430
1431 // Universal Method for sending to and recv bytes from a tag
1432 // init ... should we initialize the reader?
1433 // speed ... 0 low speed, 1 hi speed
1434 // *recv will contain the tag's answer
1435 // return: length of received data, or -1 for timeout
1436 int SendDataTag(uint8_t *send, int sendlen, bool init, int speed, uint8_t *recv, uint16_t max_recv_len, uint32_t start_time, uint32_t *eof_time) {
1437
1438 if (init) {
1439 Iso15693InitReader();
1440 StartCountSspClk();
1441 }
1442
1443 int answerLen = 0;
1444
1445 if (!speed) {
1446 // low speed (1 out of 256)
1447 CodeIso15693AsReader256(send, sendlen);
1448 } else {
1449 // high speed (1 out of 4)
1450 CodeIso15693AsReader(send, sendlen);
1451 }
1452
1453 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1454
1455 // Now wait for a response
1456 if (recv != NULL) {
1457 answerLen = GetIso15693AnswerFromTag(recv, max_recv_len, ISO15693_READER_TIMEOUT, eof_time);
1458 }
1459
1460 return answerLen;
1461 }
1462
1463
1464 // --------------------------------------------------------------------
1465 // Debug Functions
1466 // --------------------------------------------------------------------
1467
1468 // Decodes a message from a tag and displays its metadata and content
1469 #define DBD15STATLEN 48
1470 void DbdecodeIso15693Answer(int len, uint8_t *d) {
1471 char status[DBD15STATLEN+1]={0};
1472 uint16_t crc;
1473
1474 if (len > 3) {
1475 if (d[0] & ISO15693_RES_EXT)
1476 strncat(status,"ProtExt ", DBD15STATLEN);
1477 if (d[0] & ISO15693_RES_ERROR) {
1478 // error
1479 strncat(status,"Error ", DBD15STATLEN);
1480 switch (d[1]) {
1481 case 0x01:
1482 strncat(status,"01:notSupp", DBD15STATLEN);
1483 break;
1484 case 0x02:
1485 strncat(status,"02:notRecog", DBD15STATLEN);
1486 break;
1487 case 0x03:
1488 strncat(status,"03:optNotSupp", DBD15STATLEN);
1489 break;
1490 case 0x0f:
1491 strncat(status,"0f:noInfo", DBD15STATLEN);
1492 break;
1493 case 0x10:
1494 strncat(status,"10:doesn'tExist", DBD15STATLEN);
1495 break;
1496 case 0x11:
1497 strncat(status,"11:lockAgain", DBD15STATLEN);
1498 break;
1499 case 0x12:
1500 strncat(status,"12:locked", DBD15STATLEN);
1501 break;
1502 case 0x13:
1503 strncat(status,"13:progErr", DBD15STATLEN);
1504 break;
1505 case 0x14:
1506 strncat(status,"14:lockErr", DBD15STATLEN);
1507 break;
1508 default:
1509 strncat(status,"unknownErr", DBD15STATLEN);
1510 }
1511 strncat(status," ", DBD15STATLEN);
1512 } else {
1513 strncat(status,"NoErr ", DBD15STATLEN);
1514 }
1515
1516 crc=Iso15693Crc(d,len-2);
1517 if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
1518 strncat(status,"CrcOK",DBD15STATLEN);
1519 else
1520 strncat(status,"CrcFail!",DBD15STATLEN);
1521
1522 Dbprintf("%s",status);
1523 }
1524 }
1525
1526
1527
1528 ///////////////////////////////////////////////////////////////////////
1529 // Functions called via USB/Client
1530 ///////////////////////////////////////////////////////////////////////
1531
1532 void SetDebugIso15693(uint32_t debug) {
1533 DEBUG=debug;
1534 Dbprintf("Iso15693 Debug is now %s",DEBUG?"on":"off");
1535 return;
1536 }
1537
1538
1539 //---------------------------------------------------------------------------------------
1540 // Simulate an ISO15693 reader, perform anti-collision and then attempt to read a sector.
1541 // all demodulation performed in arm rather than host. - greg
1542 //---------------------------------------------------------------------------------------
1543 void ReaderIso15693(uint32_t parameter) {
1544
1545 LED_A_ON();
1546
1547 set_tracing(true);
1548
1549 int answerLen = 0;
1550 uint8_t TagUID[8] = {0x00};
1551
1552 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1553
1554 uint8_t answer[ISO15693_MAX_RESPONSE_LENGTH];
1555
1556 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1557 // Setup SSC
1558 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1559
1560 // Start from off (no field generated)
1561 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1562 SpinDelay(200);
1563
1564 // Give the tags time to energize
1565 LED_D_ON();
1566 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1567 SpinDelay(200);
1568 StartCountSspClk();
1569
1570
1571 // FIRST WE RUN AN INVENTORY TO GET THE TAG UID
1572 // THIS MEANS WE CAN PRE-BUILD REQUESTS TO SAVE CPU TIME
1573
1574 // Now send the IDENTIFY command
1575 BuildIdentifyRequest();
1576 uint32_t start_time = 0;
1577 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1578
1579 // Now wait for a response
1580 uint32_t eof_time;
1581 answerLen = GetIso15693AnswerFromTag(answer, sizeof(answer), DELAY_ISO15693_VCD_TO_VICC_READER * 2, &eof_time) ;
1582 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1583
1584 if (answerLen >=12) // we should do a better check than this
1585 {
1586 TagUID[0] = answer[2];
1587 TagUID[1] = answer[3];
1588 TagUID[2] = answer[4];
1589 TagUID[3] = answer[5];
1590 TagUID[4] = answer[6];
1591 TagUID[5] = answer[7];
1592 TagUID[6] = answer[8]; // IC Manufacturer code
1593 TagUID[7] = answer[9]; // always E0
1594
1595 }
1596
1597 Dbprintf("%d octets read from IDENTIFY request:", answerLen);
1598 DbdecodeIso15693Answer(answerLen, answer);
1599 Dbhexdump(answerLen, answer, false);
1600
1601 // UID is reverse
1602 if (answerLen >= 12)
1603 Dbprintf("UID = %02hX%02hX%02hX%02hX%02hX%02hX%02hX%02hX",
1604 TagUID[7],TagUID[6],TagUID[5],TagUID[4],
1605 TagUID[3],TagUID[2],TagUID[1],TagUID[0]);
1606
1607
1608 // Dbprintf("%d octets read from SELECT request:", answerLen2);
1609 // DbdecodeIso15693Answer(answerLen2,answer2);
1610 // Dbhexdump(answerLen2,answer2,true);
1611
1612 // Dbprintf("%d octets read from XXX request:", answerLen3);
1613 // DbdecodeIso15693Answer(answerLen3,answer3);
1614 // Dbhexdump(answerLen3,answer3,true);
1615
1616 // read all pages
1617 if (answerLen >= 12 && DEBUG) {
1618 for (int i = 0; i < 32; i++) { // sanity check, assume max 32 pages
1619 BuildReadBlockRequest(TagUID, i);
1620 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1621 int answerLen = GetIso15693AnswerFromTag(answer, sizeof(answer), DELAY_ISO15693_VCD_TO_VICC_READER * 2, &eof_time);
1622 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1623 if (answerLen > 0) {
1624 Dbprintf("READ SINGLE BLOCK %d returned %d octets:", i, answerLen);
1625 DbdecodeIso15693Answer(answerLen, answer);
1626 Dbhexdump(answerLen, answer, false);
1627 if ( *((uint32_t*) answer) == 0x07160101 ) break; // exit on NoPageErr
1628 }
1629 }
1630 }
1631
1632 // for the time being, switch field off to protect rdv4.0
1633 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1634 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1635 LED_D_OFF();
1636
1637 LED_A_OFF();
1638 }
1639
1640
1641 // Simulate an ISO15693 TAG.
1642 // For Inventory command: print command and send Inventory Response with given UID
1643 // TODO: interpret other reader commands and send appropriate response
1644 void SimTagIso15693(uint32_t parameter, uint8_t *uid) {
1645
1646 LED_A_ON();
1647
1648 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1649 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1650 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1651 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1652
1653 StartCountSspClk();
1654
1655 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1656
1657 // Build a suitable response to the reader INVENTORY command
1658 BuildInventoryResponse(uid);
1659
1660 // Listen to reader
1661 while (!BUTTON_PRESS()) {
1662 uint32_t eof_time = 0, start_time = 0;
1663 int cmd_len = GetIso15693CommandFromReader(cmd, sizeof(cmd), &eof_time);
1664
1665 if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
1666 bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
1667 start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM;
1668 TransmitTo15693Reader(ToSend, ToSendMax, &start_time, 0, slow);
1669 }
1670
1671 Dbprintf("%d bytes read from reader:", cmd_len);
1672 Dbhexdump(cmd_len, cmd, false);
1673 }
1674
1675 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1676 LED_D_OFF();
1677 LED_A_OFF();
1678 }
1679
1680
1681 // Since there is no standardized way of reading the AFI out of a tag, we will brute force it
1682 // (some manufactures offer a way to read the AFI, though)
1683 void BruteforceIso15693Afi(uint32_t speed)
1684 {
1685 LED_A_ON();
1686
1687 uint8_t data[6];
1688 uint8_t recv[ISO15693_MAX_RESPONSE_LENGTH];
1689 int datalen = 0, recvlen = 0;
1690 uint32_t eof_time;
1691
1692 // first without AFI
1693 // Tags should respond without AFI and with AFI=0 even when AFI is active
1694
1695 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
1696 data[1] = ISO15693_INVENTORY;
1697 data[2] = 0; // mask length
1698 datalen = Iso15693AddCrc(data,3);
1699 uint32_t start_time = GetCountSspClk();
1700 recvlen = SendDataTag(data, datalen, true, speed, recv, sizeof(recv), 0, &eof_time);
1701 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1702 WDT_HIT();
1703 if (recvlen>=12) {
1704 Dbprintf("NoAFI UID=%s", Iso15693sprintUID(NULL, &recv[2]));
1705 }
1706
1707 // now with AFI
1708
1709 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_AFI | ISO15693_REQINV_SLOT1;
1710 data[1] = ISO15693_INVENTORY;
1711 data[2] = 0; // AFI
1712 data[3] = 0; // mask length
1713
1714 for (int i = 0; i < 256; i++) {
1715 data[2] = i & 0xFF;
1716 datalen = Iso15693AddCrc(data,4);
1717 recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time, &eof_time);
1718 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1719 WDT_HIT();
1720 if (recvlen >= 12) {
1721 Dbprintf("AFI=%i UID=%s", i, Iso15693sprintUID(NULL, &recv[2]));
1722 }
1723 }
1724 Dbprintf("AFI Bruteforcing done.");
1725
1726 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1727 LED_D_OFF();
1728 LED_A_OFF();
1729
1730 }
1731
1732 // Allows to directly send commands to the tag via the client
1733 void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]) {
1734
1735 LED_A_ON();
1736
1737 int recvlen = 0;
1738 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1739 uint32_t eof_time;
1740
1741 if (DEBUG) {
1742 Dbprintf("SEND:");
1743 Dbhexdump(datalen, data, false);
1744 }
1745
1746 recvlen = SendDataTag(data, datalen, true, speed, (recv?recvbuf:NULL), sizeof(recvbuf), 0, &eof_time);
1747
1748 // for the time being, switch field off to protect rdv4.0
1749 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1750 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1751 LED_D_OFF();
1752
1753 if (recv) {
1754 if (DEBUG) {
1755 Dbprintf("RECV:");
1756 if (recvlen > 0) {
1757 Dbhexdump(recvlen, recvbuf, false);
1758 DbdecodeIso15693Answer(recvlen, recvbuf);
1759 }
1760 }
1761 if (recvlen > ISO15693_MAX_RESPONSE_LENGTH) {
1762 recvlen = ISO15693_MAX_RESPONSE_LENGTH;
1763 }
1764 cmd_send(CMD_ACK, recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
1765 }
1766
1767 LED_A_OFF();
1768 }
1769
1770 //-----------------------------------------------------------------------------
1771 // Work with "magic Chinese" card.
1772 //
1773 //-----------------------------------------------------------------------------
1774
1775 // Set the UID to the tag (based on Iceman work).
1776 void SetTag15693Uid(uint8_t *uid) {
1777
1778 LED_A_ON();
1779
1780 uint8_t cmd[4][9] = {
1781 {0x02, 0x21, 0x3e, 0x00, 0x00, 0x00, 0x00},
1782 {0x02, 0x21, 0x3f, 0x69, 0x96, 0x00, 0x00},
1783 {0x02, 0x21, 0x38},
1784 {0x02, 0x21, 0x39}
1785 };
1786
1787 uint16_t crc;
1788
1789 int recvlen = 0;
1790 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1791 uint32_t eof_time;
1792
1793 // Command 3 : 022138u8u7u6u5 (where uX = uid byte X)
1794 cmd[2][3] = uid[7];
1795 cmd[2][4] = uid[6];
1796 cmd[2][5] = uid[5];
1797 cmd[2][6] = uid[4];
1798
1799 // Command 4 : 022139u4u3u2u1 (where uX = uid byte X)
1800 cmd[3][3] = uid[3];
1801 cmd[3][4] = uid[2];
1802 cmd[3][5] = uid[1];
1803 cmd[3][6] = uid[0];
1804
1805 for (int i = 0; i < 4; i++) {
1806 // Add the CRC
1807 crc = Iso15693Crc(cmd[i], 7);
1808 cmd[i][7] = crc & 0xff;
1809 cmd[i][8] = crc >> 8;
1810
1811 if (DEBUG) {
1812 Dbprintf("SEND:");
1813 Dbhexdump(sizeof(cmd[i]), cmd[i], false);
1814 }
1815
1816 recvlen = SendDataTag(cmd[i], sizeof(cmd[i]), true, 1, recvbuf, sizeof(recvbuf), 0, &eof_time);
1817
1818 if (DEBUG) {
1819 Dbprintf("RECV:");
1820 if (recvlen > 0) {
1821 Dbhexdump(recvlen, recvbuf, false);
1822 DbdecodeIso15693Answer(recvlen, recvbuf);
1823 }
1824 }
1825
1826 cmd_send(CMD_ACK, recvlen>ISO15693_MAX_RESPONSE_LENGTH?ISO15693_MAX_RESPONSE_LENGTH:recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
1827 }
1828
1829 LED_A_OFF();
1830 }
1831
1832
1833
1834 // --------------------------------------------------------------------
1835 // -- Misc & deprecated functions
1836 // --------------------------------------------------------------------
1837
1838 /*
1839
1840 // do not use; has a fix UID
1841 static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
1842 {
1843 uint8_t cmd[12];
1844
1845 uint16_t crc;
1846 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1847 // followed by the block data
1848 // one sub-carrier, inventory, 1 slot, fast rate
1849 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1850 // System Information command code
1851 cmd[1] = 0x2B;
1852 // UID may be optionally specified here
1853 // 64-bit UID
1854 cmd[2] = 0x32;
1855 cmd[3]= 0x4b;
1856 cmd[4] = 0x03;
1857 cmd[5] = 0x01;
1858 cmd[6] = 0x00;
1859 cmd[7] = 0x10;
1860 cmd[8] = 0x05;
1861 cmd[9]= 0xe0; // always e0 (not exactly unique)
1862 //Now the CRC
1863 crc = Iso15693Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
1864 cmd[10] = crc & 0xff;
1865 cmd[11] = crc >> 8;
1866
1867 CodeIso15693AsReader(cmd, sizeof(cmd));
1868 }
1869
1870
1871 // do not use; has a fix UID
1872 static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
1873 {
1874 uint8_t cmd[14];
1875
1876 uint16_t crc;
1877 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1878 // followed by the block data
1879 // one sub-carrier, inventory, 1 slot, fast rate
1880 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1881 // READ Multi BLOCK command code
1882 cmd[1] = 0x23;
1883 // UID may be optionally specified here
1884 // 64-bit UID
1885 cmd[2] = 0x32;
1886 cmd[3]= 0x4b;
1887 cmd[4] = 0x03;
1888 cmd[5] = 0x01;
1889 cmd[6] = 0x00;
1890 cmd[7] = 0x10;
1891 cmd[8] = 0x05;
1892 cmd[9]= 0xe0; // always e0 (not exactly unique)
1893 // First Block number to read
1894 cmd[10] = 0x00;
1895 // Number of Blocks to read
1896 cmd[11] = 0x2f; // read quite a few
1897 //Now the CRC
1898 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1899 cmd[12] = crc & 0xff;
1900 cmd[13] = crc >> 8;
1901
1902 CodeIso15693AsReader(cmd, sizeof(cmd));
1903 }
1904
1905 // do not use; has a fix UID
1906 static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t CmdCode)
1907 {
1908 uint8_t cmd[14];
1909
1910 uint16_t crc;
1911 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1912 // followed by the block data
1913 // one sub-carrier, inventory, 1 slot, fast rate
1914 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1915 // READ BLOCK command code
1916 cmd[1] = CmdCode;
1917 // UID may be optionally specified here
1918 // 64-bit UID
1919 cmd[2] = 0x32;
1920 cmd[3]= 0x4b;
1921 cmd[4] = 0x03;
1922 cmd[5] = 0x01;
1923 cmd[6] = 0x00;
1924 cmd[7] = 0x10;
1925 cmd[8] = 0x05;
1926 cmd[9]= 0xe0; // always e0 (not exactly unique)
1927 // Parameter
1928 cmd[10] = 0x00;
1929 cmd[11] = 0x0a;
1930
1931 // cmd[12] = 0x00;
1932 // cmd[13] = 0x00; //Now the CRC
1933 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1934 cmd[12] = crc & 0xff;
1935 cmd[13] = crc >> 8;
1936
1937 CodeIso15693AsReader(cmd, sizeof(cmd));
1938 }
1939
1940 // do not use; has a fix UID
1941 static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], uint8_t CmdCode)
1942 {
1943 uint8_t cmd[14];
1944
1945 uint16_t crc;
1946 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1947 // followed by the block data
1948 // one sub-carrier, inventory, 1 slot, fast rate
1949 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1950 // READ BLOCK command code
1951 cmd[1] = CmdCode;
1952 // UID may be optionally specified here
1953 // 64-bit UID
1954 cmd[2] = 0x32;
1955 cmd[3]= 0x4b;
1956 cmd[4] = 0x03;
1957 cmd[5] = 0x01;
1958 cmd[6] = 0x00;
1959 cmd[7] = 0x10;
1960 cmd[8] = 0x05;
1961 cmd[9]= 0xe0; // always e0 (not exactly unique)
1962 // Parameter
1963 cmd[10] = 0x05; // for custom codes this must be manufacturer code
1964 cmd[11] = 0x00;
1965
1966 // cmd[12] = 0x00;
1967 // cmd[13] = 0x00; //Now the CRC
1968 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1969 cmd[12] = crc & 0xff;
1970 cmd[13] = crc >> 8;
1971
1972 CodeIso15693AsReader(cmd, sizeof(cmd));
1973 }
1974
1975
1976
1977
1978 */
1979
1980
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