]> git.zerfleddert.de Git - proxmark3-svn/blob - armsrc/iso15693.c
projects / proxmark3-svn / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge pull request #926 from pwpiwi/fix_iso15693_fpga
[proxmark3-svn] / armsrc / iso15693.c
1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
3 // Modified by Greg Jones, Jan 2009
4 // Modified by Adrian Dabrowski "atrox", Mar-Sept 2010,Oct 2011
5 // Modified by piwi, Oct 2018
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support ISO 15693. This includes both the reader software and
12 // the `fake tag' modes.
13 //-----------------------------------------------------------------------------
14
15 // The ISO 15693 describes two transmission modes from reader to tag, and four
16 // transmission modes from tag to reader. As of Oct 2018 this code supports
17 // both reader modes and the high speed variant with one subcarrier from card to reader.
18 // As long as the card fully support ISO 15693 this is no problem, since the
19 // reader chooses both data rates, but some non-standard tags do not.
20 // For card simulation, the code supports both high and low speed modes with one subcarrier.
21 //
22 // VCD (reader) -> VICC (tag)
23 // 1 out of 256:
24 // data rate: 1,66 kbit/s (fc/8192)
25 // used for long range
26 // 1 out of 4:
27 // data rate: 26,48 kbit/s (fc/512)
28 // used for short range, high speed
29 //
30 // VICC (tag) -> VCD (reader)
31 // Modulation:
32 // ASK / one subcarrier (423,75 khz)
33 // FSK / two subcarriers (423,75 khz && 484,28 khz)
34 // Data Rates / Modes:
35 // low ASK: 6,62 kbit/s
36 // low FSK: 6.67 kbit/s
37 // high ASK: 26,48 kbit/s
38 // high FSK: 26,69 kbit/s
39 //-----------------------------------------------------------------------------
40
41
42 // Random Remarks:
43 // *) UID is always used "transmission order" (LSB), which is reverse to display order
44
45 // TODO / BUGS / ISSUES:
46 // *) signal decoding is unable to detect collisions.
47 // *) add anti-collision support for inventory-commands
48 // *) read security status of a block
49 // *) sniffing and simulation do not support two subcarrier modes.
50 // *) remove or refactor code under "deprecated"
51 // *) document all the functions
52
53 #include "iso15693.h"
54
55 #include "proxmark3.h"
56 #include "util.h"
57 #include "apps.h"
58 #include "string.h"
59 #include "iso15693tools.h"
60 #include "protocols.h"
61 #include "usb_cdc.h"
62 #include "BigBuf.h"
63 #include "fpgaloader.h"
64
65 #define arraylen(x) (sizeof(x)/sizeof((x)[0]))
66
67 // Delays in SSP_CLK ticks.
68 // SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
69 #define DELAY_READER_TO_ARM 8
70 #define DELAY_ARM_TO_READER 0
71 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader. All values should be multiples of 16
72 #define DELAY_ARM_TO_TAG 16
73 #define DELAY_TAG_TO_ARM 32
74 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when snooping. All values should be multiples of 16
75 #define DELAY_TAG_TO_ARM_SNOOP 32
76 #define DELAY_READER_TO_ARM_SNOOP 32
77
78 // times in samples @ 212kHz when acting as reader
79 //#define ISO15693_READER_TIMEOUT 80 // 80/212kHz = 378us, nominal t1_max=313,9us
80 #define ISO15693_READER_TIMEOUT 330 // 330/212kHz = 1558us, should be even enough for iClass tags responding to ACTALL
81 #define ISO15693_READER_TIMEOUT_WRITE 4700 // 4700/212kHz = 22ms, nominal 20ms
82
83
84 static int DEBUG = 0;
85
86
87 ///////////////////////////////////////////////////////////////////////
88 // ISO 15693 Part 2 - Air Interface
89 // This section basically contains transmission and receiving of bits
90 ///////////////////////////////////////////////////////////////////////
91
92 // buffers
93 #define ISO15693_DMA_BUFFER_SIZE 256 // must be a power of 2
94 #define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
95 #define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
96
97
98 // specific LogTrace function for ISO15693: the duration needs to be scaled because otherwise it won't fit into a uint16_t
99 bool LogTrace_ISO15693(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag) {
100 uint32_t duration = timestamp_end - timestamp_start;
101 duration /= 32;
102 timestamp_end = timestamp_start + duration;
103 return LogTrace(btBytes, iLen, timestamp_start, timestamp_end, parity, readerToTag);
104 }
105
106
107 // ---------------------------
108 // Signal Processing
109 // ---------------------------
110
111 // prepare data using "1 out of 4" code for later transmission
112 // resulting data rate is 26.48 kbit/s (fc/512)
113 // cmd ... data
114 // n ... length of data
115 void CodeIso15693AsReader(uint8_t *cmd, int n) {
116
117 ToSendReset();
118
119 // SOF for 1of4
120 ToSend[++ToSendMax] = 0x84; //10000100
121
122 // data
123 for (int i = 0; i < n; i++) {
124 for (int j = 0; j < 8; j += 2) {
125 int these = (cmd[i] >> j) & 0x03;
126 switch(these) {
127 case 0:
128 ToSend[++ToSendMax] = 0x40; //01000000
129 break;
130 case 1:
131 ToSend[++ToSendMax] = 0x10; //00010000
132 break;
133 case 2:
134 ToSend[++ToSendMax] = 0x04; //00000100
135 break;
136 case 3:
137 ToSend[++ToSendMax] = 0x01; //00000001
138 break;
139 }
140 }
141 }
142
143 // EOF
144 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
145
146 ToSendMax++;
147 }
148
149
150 // Encode EOF only
151 static void CodeIso15693AsReaderEOF() {
152 ToSendReset();
153 ToSend[++ToSendMax] = 0x20;
154 ToSendMax++;
155 }
156
157
158 // encode data using "1 out of 256" scheme
159 // data rate is 1,66 kbit/s (fc/8192)
160 // is designed for more robust communication over longer distances
161 static void CodeIso15693AsReader256(uint8_t *cmd, int n)
162 {
163 ToSendReset();
164
165 // SOF for 1of256
166 ToSend[++ToSendMax] = 0x81; //10000001
167
168 // data
169 for(int i = 0; i < n; i++) {
170 for (int j = 0; j <= 255; j++) {
171 if (cmd[i] == j) {
172 ToSendStuffBit(0);
173 ToSendStuffBit(1);
174 } else {
175 ToSendStuffBit(0);
176 ToSendStuffBit(0);
177 }
178 }
179 }
180
181 // EOF
182 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
183
184 ToSendMax++;
185 }
186
187
188 // static uint8_t encode4Bits(const uint8_t b) {
189 // uint8_t c = b & 0xF;
190 // // OTA, the least significant bits first
191 // // The columns are
192 // // 1 - Bit value to send
193 // // 2 - Reversed (big-endian)
194 // // 3 - Manchester Encoded
195 // // 4 - Hex values
196
197 // switch(c){
198 // // 1 2 3 4
199 // case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
200 // case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
201 // case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
202 // case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
203 // case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
204 // case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
205 // case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
206 // case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
207 // case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
208 // case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
209 // case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
210 // case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
211 // case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
212 // case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
213 // case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
214 // default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
215
216 // }
217 // }
218
219 static const uint8_t encode_4bits[16] = { 0xaa, 0x6a, 0x9a, 0x5a, 0xa6, 0x66, 0x96, 0x56, 0xa9, 0x69, 0x99, 0x59, 0xa5, 0x65, 0x95, 0x55 };
220
221 void CodeIso15693AsTag(uint8_t *cmd, size_t len) {
222 /*
223 * SOF comprises 3 parts;
224 * * An unmodulated time of 56.64 us
225 * * 24 pulses of 423.75 kHz (fc/32)
226 * * A logic 1, which starts with an unmodulated time of 18.88us
227 * followed by 8 pulses of 423.75kHz (fc/32)
228 *
229 * EOF comprises 3 parts:
230 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
231 * time of 18.88us.
232 * - 24 pulses of fc/32
233 * - An unmodulated time of 56.64 us
234 *
235 * A logic 0 starts with 8 pulses of fc/32
236 * followed by an unmodulated time of 256/fc (~18,88us).
237 *
238 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
239 * 8 pulses of fc/32 (also 18.88us)
240 *
241 * A bit here becomes 8 pulses of fc/32. Therefore:
242 * The SOF can be written as 00011101 = 0x1D
243 * The EOF can be written as 10111000 = 0xb8
244 * A logic 1 is 01
245 * A logic 0 is 10
246 *
247 * */
248
249 ToSendReset();
250
251 // SOF
252 ToSend[++ToSendMax] = 0x1D; // 00011101
253
254 // data
255 for (int i = 0; i < len; i++) {
256 ToSend[++ToSendMax] = encode_4bits[cmd[i] & 0xF];
257 ToSend[++ToSendMax] = encode_4bits[cmd[i] >> 4];
258 }
259
260 // EOF
261 ToSend[++ToSendMax] = 0xB8; // 10111000
262
263 ToSendMax++;
264 }
265
266
267 // Transmit the command (to the tag) that was placed in cmd[].
268 void TransmitTo15693Tag(const uint8_t *cmd, int len, uint32_t *start_time) {
269
270 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_FULL_MOD);
271
272 if (*start_time < DELAY_ARM_TO_TAG) {
273 *start_time = DELAY_ARM_TO_TAG;
274 }
275
276 *start_time = (*start_time - DELAY_ARM_TO_TAG) & 0xfffffff0;
277
278 if (GetCountSspClk() > *start_time) { // we may miss the intended time
279 *start_time = (GetCountSspClk() + 16) & 0xfffffff0; // next possible time
280 }
281
282 while (GetCountSspClk() < *start_time)
283 /* wait */ ;
284
285 LED_B_ON();
286 for (int c = 0; c < len; c++) {
287 uint8_t data = cmd[c];
288 for (int i = 0; i < 8; i++) {
289 uint16_t send_word = (data & 0x80) ? 0xffff : 0x0000;
290 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
291 AT91C_BASE_SSC->SSC_THR = send_word;
292 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
293 AT91C_BASE_SSC->SSC_THR = send_word;
294 data <<= 1;
295 }
296 WDT_HIT();
297 }
298 LED_B_OFF();
299
300 *start_time = *start_time + DELAY_ARM_TO_TAG;
301 }
302
303
304 //-----------------------------------------------------------------------------
305 // Transmit the tag response (to the reader) that was placed in cmd[].
306 //-----------------------------------------------------------------------------
307 void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t *start_time, uint32_t slot_time, bool slow) {
308 // don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
309 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
310
311 uint32_t modulation_start_time = *start_time - DELAY_ARM_TO_READER + 3 * 8; // no need to transfer the unmodulated start of SOF
312
313 while (GetCountSspClk() > (modulation_start_time & 0xfffffff8) + 3) { // we will miss the intended time
314 if (slot_time) {
315 modulation_start_time += slot_time; // use next available slot
316 } else {
317 modulation_start_time = (modulation_start_time & 0xfffffff8) + 8; // next possible time
318 }
319 }
320
321 while (GetCountSspClk() < (modulation_start_time & 0xfffffff8))
322 /* wait */ ;
323
324 uint8_t shift_delay = modulation_start_time & 0x00000007;
325
326 *start_time = modulation_start_time + DELAY_ARM_TO_READER - 3 * 8;
327
328 LED_C_ON();
329 uint8_t bits_to_shift = 0x00;
330 uint8_t bits_to_send = 0x00;
331 for (size_t c = 0; c < len; c++) {
332 for (int i = (c==0?4:7); i >= 0; i--) {
333 uint8_t cmd_bits = ((cmd[c] >> i) & 0x01) ? 0xff : 0x00;
334 for (int j = 0; j < (slow?4:1); ) {
335 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
336 bits_to_send = bits_to_shift << (8 - shift_delay) | cmd_bits >> shift_delay;
337 AT91C_BASE_SSC->SSC_THR = bits_to_send;
338 bits_to_shift = cmd_bits;
339 j++;
340 }
341 }
342 }
343 WDT_HIT();
344 }
345 // send the remaining bits, padded with 0:
346 bits_to_send = bits_to_shift << (8 - shift_delay);
347 for ( ; ; ) {
348 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
349 AT91C_BASE_SSC->SSC_THR = bits_to_send;
350 break;
351 }
352 }
353 LED_C_OFF();
354 }
355
356
357 //=============================================================================
358 // An ISO 15693 decoder for tag responses (one subcarrier only).
359 // Uses cross correlation to identify each bit and EOF.
360 // This function is called 8 times per bit (every 2 subcarrier cycles).
361 // Subcarrier frequency fs is 424kHz, 1/fs = 2,36us,
362 // i.e. function is called every 4,72us
363 // LED handling:
364 // LED C -> ON once we have received the SOF and are expecting the rest.
365 // LED C -> OFF once we have received EOF or are unsynced
366 //
367 // Returns: true if we received a EOF
368 // false if we are still waiting for some more
369 //=============================================================================
370
371 #define NOISE_THRESHOLD 80 // don't try to correlate noise
372 #define MAX_PREVIOUS_AMPLITUDE (-1 - NOISE_THRESHOLD)
373
374 typedef struct DecodeTag {
375 enum {
376 STATE_TAG_SOF_LOW,
377 STATE_TAG_SOF_RISING_EDGE,
378 STATE_TAG_SOF_HIGH,
379 STATE_TAG_SOF_HIGH_END,
380 STATE_TAG_RECEIVING_DATA,
381 STATE_TAG_EOF,
382 STATE_TAG_EOF_TAIL
383 } state;
384 int bitCount;
385 int posCount;
386 enum {
387 LOGIC0,
388 LOGIC1,
389 SOF_PART1,
390 SOF_PART2
391 } lastBit;
392 uint16_t shiftReg;
393 uint16_t max_len;
394 uint8_t *output;
395 int len;
396 int sum1, sum2;
397 int threshold_sof;
398 int threshold_half;
399 uint16_t previous_amplitude;
400 } DecodeTag_t;
401
402
403 static int inline __attribute__((always_inline)) Handle15693SamplesFromTag(uint16_t amplitude, DecodeTag_t *DecodeTag) {
404 switch (DecodeTag->state) {
405 case STATE_TAG_SOF_LOW:
406 // waiting for a rising edge
407 if (amplitude > NOISE_THRESHOLD + DecodeTag->previous_amplitude) {
408 if (DecodeTag->posCount > 10) {
409 DecodeTag->threshold_sof = amplitude - DecodeTag->previous_amplitude; // to be divided by 2
410 DecodeTag->threshold_half = 0;
411 DecodeTag->state = STATE_TAG_SOF_RISING_EDGE;
412 } else {
413 DecodeTag->posCount = 0;
414 }
415 } else {
416 DecodeTag->posCount++;
417 DecodeTag->previous_amplitude = amplitude;
418 }
419 break;
420
421 case STATE_TAG_SOF_RISING_EDGE:
422 if (amplitude > DecodeTag->threshold_sof + DecodeTag->previous_amplitude) { // edge still rising
423 if (amplitude > DecodeTag->threshold_sof + DecodeTag->threshold_sof) { // steeper edge, take this as time reference
424 DecodeTag->posCount = 1;
425 } else {
426 DecodeTag->posCount = 2;
427 }
428 DecodeTag->threshold_sof = (amplitude - DecodeTag->previous_amplitude) / 2;
429 } else {
430 DecodeTag->posCount = 2;
431 DecodeTag->threshold_sof = DecodeTag->threshold_sof/2;
432 }
433 // DecodeTag->posCount = 2;
434 DecodeTag->state = STATE_TAG_SOF_HIGH;
435 break;
436
437 case STATE_TAG_SOF_HIGH:
438 // waiting for 10 times high. Take average over the last 8
439 if (amplitude > DecodeTag->threshold_sof) {
440 DecodeTag->posCount++;
441 if (DecodeTag->posCount > 2) {
442 DecodeTag->threshold_half += amplitude; // keep track of average high value
443 }
444 if (DecodeTag->posCount == 10) {
445 DecodeTag->threshold_half >>= 2; // (4 times 1/2 average)
446 DecodeTag->state = STATE_TAG_SOF_HIGH_END;
447 }
448 } else { // high phase was too short
449 DecodeTag->posCount = 1;
450 DecodeTag->previous_amplitude = amplitude;
451 DecodeTag->state = STATE_TAG_SOF_LOW;
452 }
453 break;
454
455 case STATE_TAG_SOF_HIGH_END:
456 // check for falling edge
457 if (DecodeTag->posCount == 13 && amplitude < DecodeTag->threshold_sof) {
458 DecodeTag->lastBit = SOF_PART1; // detected 1st part of SOF (12 samples low and 12 samples high)
459 DecodeTag->shiftReg = 0;
460 DecodeTag->bitCount = 0;
461 DecodeTag->len = 0;
462 DecodeTag->sum1 = amplitude;
463 DecodeTag->sum2 = 0;
464 DecodeTag->posCount = 2;
465 DecodeTag->state = STATE_TAG_RECEIVING_DATA;
466 // FpgaDisableTracing(); // DEBUGGING
467 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
468 // amplitude,
469 // DecodeTag->threshold_sof,
470 // DecodeTag->threshold_half/4,
471 // DecodeTag->previous_amplitude); // DEBUGGING
472 LED_C_ON();
473 } else {
474 DecodeTag->posCount++;
475 if (DecodeTag->posCount > 13) { // high phase too long
476 DecodeTag->posCount = 0;
477 DecodeTag->previous_amplitude = amplitude;
478 DecodeTag->state = STATE_TAG_SOF_LOW;
479 LED_C_OFF();
480 }
481 }
482 break;
483
484 case STATE_TAG_RECEIVING_DATA:
485 // FpgaDisableTracing(); // DEBUGGING
486 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
487 // amplitude,
488 // DecodeTag->threshold_sof,
489 // DecodeTag->threshold_half/4,
490 // DecodeTag->previous_amplitude); // DEBUGGING
491 if (DecodeTag->posCount == 1) {
492 DecodeTag->sum1 = 0;
493 DecodeTag->sum2 = 0;
494 }
495 if (DecodeTag->posCount <= 4) {
496 DecodeTag->sum1 += amplitude;
497 } else {
498 DecodeTag->sum2 += amplitude;
499 }
500 if (DecodeTag->posCount == 8) {
501 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in both halves
502 if (DecodeTag->lastBit == LOGIC0) { // this was already part of EOF
503 DecodeTag->state = STATE_TAG_EOF;
504 } else {
505 DecodeTag->posCount = 0;
506 DecodeTag->previous_amplitude = amplitude;
507 DecodeTag->state = STATE_TAG_SOF_LOW;
508 LED_C_OFF();
509 }
510 } else if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in second half
511 // logic 1
512 if (DecodeTag->lastBit == SOF_PART1) { // still part of SOF
513 DecodeTag->lastBit = SOF_PART2; // SOF completed
514 } else {
515 DecodeTag->lastBit = LOGIC1;
516 DecodeTag->shiftReg >>= 1;
517 DecodeTag->shiftReg |= 0x80;
518 DecodeTag->bitCount++;
519 if (DecodeTag->bitCount == 8) {
520 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
521 DecodeTag->len++;
522 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
523 if (DecodeTag->len > DecodeTag->max_len) {
524 // buffer overflow, give up
525 LED_C_OFF();
526 return true;
527 }
528 DecodeTag->bitCount = 0;
529 DecodeTag->shiftReg = 0;
530 }
531 }
532 } else if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
533 // logic 0
534 if (DecodeTag->lastBit == SOF_PART1) { // incomplete SOF
535 DecodeTag->posCount = 0;
536 DecodeTag->previous_amplitude = amplitude;
537 DecodeTag->state = STATE_TAG_SOF_LOW;
538 LED_C_OFF();
539 } else {
540 DecodeTag->lastBit = LOGIC0;
541 DecodeTag->shiftReg >>= 1;
542 DecodeTag->bitCount++;
543 if (DecodeTag->bitCount == 8) {
544 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
545 DecodeTag->len++;
546 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
547 if (DecodeTag->len > DecodeTag->max_len) {
548 // buffer overflow, give up
549 DecodeTag->posCount = 0;
550 DecodeTag->previous_amplitude = amplitude;
551 DecodeTag->state = STATE_TAG_SOF_LOW;
552 LED_C_OFF();
553 }
554 DecodeTag->bitCount = 0;
555 DecodeTag->shiftReg = 0;
556 }
557 }
558 } else { // no modulation
559 if (DecodeTag->lastBit == SOF_PART2) { // only SOF (this is OK for iClass)
560 LED_C_OFF();
561 return true;
562 } else {
563 DecodeTag->posCount = 0;
564 DecodeTag->state = STATE_TAG_SOF_LOW;
565 LED_C_OFF();
566 }
567 }
568 DecodeTag->posCount = 0;
569 }
570 DecodeTag->posCount++;
571 break;
572
573 case STATE_TAG_EOF:
574 if (DecodeTag->posCount == 1) {
575 DecodeTag->sum1 = 0;
576 DecodeTag->sum2 = 0;
577 }
578 if (DecodeTag->posCount <= 4) {
579 DecodeTag->sum1 += amplitude;
580 } else {
581 DecodeTag->sum2 += amplitude;
582 }
583 if (DecodeTag->posCount == 8) {
584 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
585 DecodeTag->posCount = 0;
586 DecodeTag->state = STATE_TAG_EOF_TAIL;
587 } else {
588 DecodeTag->posCount = 0;
589 DecodeTag->previous_amplitude = amplitude;
590 DecodeTag->state = STATE_TAG_SOF_LOW;
591 LED_C_OFF();
592 }
593 }
594 DecodeTag->posCount++;
595 break;
596
597 case STATE_TAG_EOF_TAIL:
598 if (DecodeTag->posCount == 1) {
599 DecodeTag->sum1 = 0;
600 DecodeTag->sum2 = 0;
601 }
602 if (DecodeTag->posCount <= 4) {
603 DecodeTag->sum1 += amplitude;
604 } else {
605 DecodeTag->sum2 += amplitude;
606 }
607 if (DecodeTag->posCount == 8) {
608 if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // no modulation in both halves
609 LED_C_OFF();
610 return true;
611 } else {
612 DecodeTag->posCount = 0;
613 DecodeTag->previous_amplitude = amplitude;
614 DecodeTag->state = STATE_TAG_SOF_LOW;
615 LED_C_OFF();
616 }
617 }
618 DecodeTag->posCount++;
619 break;
620 }
621
622 return false;
623 }
624
625
626 static void DecodeTagInit(DecodeTag_t *DecodeTag, uint8_t *data, uint16_t max_len) {
627 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
628 DecodeTag->posCount = 0;
629 DecodeTag->state = STATE_TAG_SOF_LOW;
630 DecodeTag->output = data;
631 DecodeTag->max_len = max_len;
632 }
633
634
635 static void DecodeTagReset(DecodeTag_t *DecodeTag) {
636 DecodeTag->posCount = 0;
637 DecodeTag->state = STATE_TAG_SOF_LOW;
638 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
639 }
640
641
642 /*
643 * Receive and decode the tag response, also log to tracebuffer
644 */
645 int GetIso15693AnswerFromTag(uint8_t* response, uint16_t max_len, uint16_t timeout, uint32_t *eof_time) {
646
647 int samples = 0;
648 int ret = 0;
649
650 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
651
652 // the Decoder data structure
653 DecodeTag_t DecodeTag = { 0 };
654 DecodeTagInit(&DecodeTag, response, max_len);
655
656 // wait for last transfer to complete
657 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
658
659 // And put the FPGA in the appropriate mode
660 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
661
662 // Setup and start DMA.
663 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
664 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
665 uint32_t dma_start_time = 0;
666 uint16_t *upTo = dmaBuf;
667
668 for(;;) {
669 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
670
671 if (behindBy == 0) continue;
672
673 samples++;
674 if (samples == 1) {
675 // DMA has transferred the very first data
676 dma_start_time = GetCountSspClk() & 0xfffffff0;
677 }
678
679 uint16_t tagdata = *upTo++;
680
681 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
682 upTo = dmaBuf; // start reading the circular buffer from the beginning
683 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
684 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
685 ret = -1;
686 break;
687 }
688 }
689 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
690 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
691 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
692 }
693
694 if (Handle15693SamplesFromTag(tagdata, &DecodeTag)) {
695 *eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM; // end of EOF
696 if (DecodeTag.lastBit == SOF_PART2) {
697 *eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
698 }
699 if (DecodeTag.len > DecodeTag.max_len) {
700 ret = -2; // buffer overflow
701 }
702 break;
703 }
704
705 if (samples > timeout && DecodeTag.state < STATE_TAG_RECEIVING_DATA) {
706 ret = -1; // timeout
707 break;
708 }
709
710 }
711
712 FpgaDisableSscDma();
713
714 if (DEBUG) Dbprintf("samples = %d, ret = %d, Decoder: state = %d, lastBit = %d, len = %d, bitCount = %d, posCount = %d",
715 samples, ret, DecodeTag.state, DecodeTag.lastBit, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
716
717 if (ret < 0) {
718 return ret;
719 }
720
721 uint32_t sof_time = *eof_time
722 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
723 - 32 * 16 // time for SOF transfer
724 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
725
726 if (DEBUG) Dbprintf("timing: sof_time = %d, eof_time = %d", sof_time, *eof_time);
727
728 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, *eof_time*4, NULL, false);
729
730 return DecodeTag.len;
731 }
732
733
734 //=============================================================================
735 // An ISO15693 decoder for reader commands.
736 //
737 // This function is called 4 times per bit (every 2 subcarrier cycles).
738 // Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
739 // LED handling:
740 // LED B -> ON once we have received the SOF and are expecting the rest.
741 // LED B -> OFF once we have received EOF or are in error state or unsynced
742 //
743 // Returns: true if we received a EOF
744 // false if we are still waiting for some more
745 //=============================================================================
746
747 typedef struct DecodeReader {
748 enum {
749 STATE_READER_UNSYNCD,
750 STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF,
751 STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
752 STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
753 STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
754 STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4,
755 STATE_READER_RECEIVE_DATA_1_OUT_OF_4,
756 STATE_READER_RECEIVE_DATA_1_OUT_OF_256,
757 STATE_READER_RECEIVE_JAMMING
758 } state;
759 enum {
760 CODING_1_OUT_OF_4,
761 CODING_1_OUT_OF_256
762 } Coding;
763 uint8_t shiftReg;
764 uint8_t bitCount;
765 int byteCount;
766 int byteCountMax;
767 int posCount;
768 int sum1, sum2;
769 uint8_t *output;
770 uint8_t jam_search_len;
771 uint8_t *jam_search_string;
772 } DecodeReader_t;
773
774
775 static void DecodeReaderInit(DecodeReader_t* DecodeReader, uint8_t *data, uint16_t max_len, uint8_t jam_search_len, uint8_t *jam_search_string) {
776 DecodeReader->output = data;
777 DecodeReader->byteCountMax = max_len;
778 DecodeReader->state = STATE_READER_UNSYNCD;
779 DecodeReader->byteCount = 0;
780 DecodeReader->bitCount = 0;
781 DecodeReader->posCount = 1;
782 DecodeReader->shiftReg = 0;
783 DecodeReader->jam_search_len = jam_search_len;
784 DecodeReader->jam_search_string = jam_search_string;
785 }
786
787
788 static void DecodeReaderReset(DecodeReader_t* DecodeReader) {
789 DecodeReader->state = STATE_READER_UNSYNCD;
790 }
791
792
793 static int inline __attribute__((always_inline)) Handle15693SampleFromReader(bool bit, DecodeReader_t *DecodeReader) {
794 switch (DecodeReader->state) {
795 case STATE_READER_UNSYNCD:
796 // wait for unmodulated carrier
797 if (bit) {
798 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
799 }
800 break;
801
802 case STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF:
803 if (!bit) {
804 // we went low, so this could be the beginning of a SOF
805 DecodeReader->posCount = 1;
806 DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
807 }
808 break;
809
810 case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
811 DecodeReader->posCount++;
812 if (bit) { // detected rising edge
813 if (DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
814 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
815 } else { // SOF
816 DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
817 }
818 } else {
819 if (DecodeReader->posCount > 5) { // stayed low for too long
820 DecodeReaderReset(DecodeReader);
821 } else {
822 // do nothing, keep waiting
823 }
824 }
825 break;
826
827 case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
828 DecodeReader->posCount++;
829 if (!bit) { // detected a falling edge
830 if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
831 DecodeReaderReset(DecodeReader);
832 } else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
833 DecodeReader->Coding = CODING_1_OUT_OF_4;
834 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
835 } else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
836 DecodeReaderReset(DecodeReader);
837 } else { // SOF for 1 out of 256 coding
838 DecodeReader->Coding = CODING_1_OUT_OF_256;
839 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
840 }
841 } else {
842 if (DecodeReader->posCount > 29) { // stayed high for too long
843 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
844 } else {
845 // do nothing, keep waiting
846 }
847 }
848 break;
849
850 case STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF:
851 DecodeReader->posCount++;
852 if (bit) { // detected rising edge
853 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
854 if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
855 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
856 } else {
857 DecodeReader->posCount = 1;
858 DecodeReader->bitCount = 0;
859 DecodeReader->byteCount = 0;
860 DecodeReader->sum1 = 1;
861 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
862 LED_B_ON();
863 }
864 } else { // CODING_1_OUT_OF_4
865 if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
866 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
867 } else {
868 DecodeReader->posCount = 1;
869 DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
870 }
871 }
872 } else {
873 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
874 if (DecodeReader->posCount > 34) { // signal stayed low for too long
875 DecodeReaderReset(DecodeReader);
876 } else {
877 // do nothing, keep waiting
878 }
879 } else { // CODING_1_OUT_OF_4
880 if (DecodeReader->posCount > 26) { // signal stayed low for too long
881 DecodeReaderReset(DecodeReader);
882 } else {
883 // do nothing, keep waiting
884 }
885 }
886 }
887 break;
888
889 case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
890 DecodeReader->posCount++;
891 if (bit) {
892 if (DecodeReader->posCount == 9) {
893 DecodeReader->posCount = 1;
894 DecodeReader->bitCount = 0;
895 DecodeReader->byteCount = 0;
896 DecodeReader->sum1 = 1;
897 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
898 LED_B_ON();
899 } else {
900 // do nothing, keep waiting
901 }
902 } else { // unexpected falling edge
903 DecodeReaderReset(DecodeReader);
904 }
905 break;
906
907 case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
908 DecodeReader->posCount++;
909 if (DecodeReader->posCount == 1) {
910 DecodeReader->sum1 = bit?1:0;
911 } else if (DecodeReader->posCount <= 4) {
912 if (bit) DecodeReader->sum1++;
913 } else if (DecodeReader->posCount == 5) {
914 DecodeReader->sum2 = bit?1:0;
915 } else {
916 if (bit) DecodeReader->sum2++;
917 }
918 if (DecodeReader->posCount == 8) {
919 DecodeReader->posCount = 0;
920 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
921 LED_B_OFF(); // Finished receiving
922 DecodeReaderReset(DecodeReader);
923 if (DecodeReader->byteCount != 0) {
924 return true;
925 }
926 } else if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected a 2bit position
927 DecodeReader->shiftReg >>= 2;
928 DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
929 }
930 if (DecodeReader->bitCount == 15) { // we have a full byte
931 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
932 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
933 // buffer overflow, give up
934 LED_B_OFF();
935 DecodeReaderReset(DecodeReader);
936 }
937 DecodeReader->bitCount = 0;
938 DecodeReader->shiftReg = 0;
939 if (DecodeReader->byteCount == DecodeReader->jam_search_len) {
940 if (!memcmp(DecodeReader->output, DecodeReader->jam_search_string, DecodeReader->jam_search_len)) {
941 LED_D_ON();
942 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_JAM);
943 DecodeReader->state = STATE_READER_RECEIVE_JAMMING;
944 }
945 }
946 } else {
947 DecodeReader->bitCount++;
948 }
949 }
950 break;
951
952 case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
953 DecodeReader->posCount++;
954 if (DecodeReader->posCount == 1) {
955 DecodeReader->sum1 = bit?1:0;
956 } else if (DecodeReader->posCount <= 4) {
957 if (bit) DecodeReader->sum1++;
958 } else if (DecodeReader->posCount == 5) {
959 DecodeReader->sum2 = bit?1:0;
960 } else if (bit) {
961 DecodeReader->sum2++;
962 }
963 if (DecodeReader->posCount == 8) {
964 DecodeReader->posCount = 0;
965 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
966 LED_B_OFF(); // Finished receiving
967 DecodeReaderReset(DecodeReader);
968 if (DecodeReader->byteCount != 0) {
969 return true;
970 }
971 } else if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected the bit position
972 DecodeReader->shiftReg = DecodeReader->bitCount;
973 }
974 if (DecodeReader->bitCount == 255) { // we have a full byte
975 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
976 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
977 // buffer overflow, give up
978 LED_B_OFF();
979 DecodeReaderReset(DecodeReader);
980 }
981 if (DecodeReader->byteCount == DecodeReader->jam_search_len) {
982 if (!memcmp(DecodeReader->output, DecodeReader->jam_search_string, DecodeReader->jam_search_len)) {
983 LED_D_ON();
984 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_JAM);
985 DecodeReader->state = STATE_READER_RECEIVE_JAMMING;
986 }
987 }
988 }
989 DecodeReader->bitCount++;
990 }
991 break;
992
993 case STATE_READER_RECEIVE_JAMMING:
994 DecodeReader->posCount++;
995 if (DecodeReader->Coding == CODING_1_OUT_OF_4) {
996 if (DecodeReader->posCount == 7*16) { // 7 bits jammed
997 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE); // stop jamming
998 // FpgaDisableTracing();
999 LED_D_OFF();
1000 } else if (DecodeReader->posCount == 8*16) {
1001 DecodeReader->posCount = 0;
1002 DecodeReader->output[DecodeReader->byteCount++] = 0x00;
1003 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
1004 }
1005 } else {
1006 if (DecodeReader->posCount == 7*256) { // 7 bits jammend
1007 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE); // stop jamming
1008 LED_D_OFF();
1009 } else if (DecodeReader->posCount == 8*256) {
1010 DecodeReader->posCount = 0;
1011 DecodeReader->output[DecodeReader->byteCount++] = 0x00;
1012 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
1013 }
1014 }
1015 break;
1016
1017 default:
1018 LED_B_OFF();
1019 DecodeReaderReset(DecodeReader);
1020 break;
1021 }
1022
1023 return false;
1024 }
1025
1026
1027 //-----------------------------------------------------------------------------
1028 // Receive a command (from the reader to us, where we are the simulated tag),
1029 // and store it in the given buffer, up to the given maximum length. Keeps
1030 // spinning, waiting for a well-framed command, until either we get one
1031 // (returns len) or someone presses the pushbutton on the board (returns -1).
1032 //
1033 // Assume that we're called with the SSC (to the FPGA) and ADC path set
1034 // correctly.
1035 //-----------------------------------------------------------------------------
1036
1037 int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) {
1038 int samples = 0;
1039 bool gotFrame = false;
1040 uint8_t b;
1041
1042 uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
1043
1044 // the decoder data structure
1045 DecodeReader_t DecodeReader = {0};
1046 DecodeReaderInit(&DecodeReader, received, max_len, 0, NULL);
1047
1048 // wait for last transfer to complete
1049 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
1050
1051 LED_D_OFF();
1052 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1053
1054 // clear receive register and wait for next transfer
1055 uint32_t temp = AT91C_BASE_SSC->SSC_RHR;
1056 (void) temp;
1057 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
1058
1059 uint32_t dma_start_time = GetCountSspClk() & 0xfffffff8;
1060
1061 // Setup and start DMA.
1062 FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1063 uint8_t *upTo = dmaBuf;
1064
1065 for (;;) {
1066 uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1067
1068 if (behindBy == 0) continue;
1069
1070 b = *upTo++;
1071 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1072 upTo = dmaBuf; // start reading the circular buffer from the beginning
1073 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1074 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
1075 break;
1076 }
1077 }
1078 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1079 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1080 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1081 }
1082
1083 for (int i = 7; i >= 0; i--) {
1084 if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
1085 *eof_time = dma_start_time + samples - DELAY_READER_TO_ARM; // end of EOF
1086 gotFrame = true;
1087 break;
1088 }
1089 samples++;
1090 }
1091
1092 if (gotFrame) {
1093 break;
1094 }
1095
1096 if (BUTTON_PRESS()) {
1097 DecodeReader.byteCount = -1;
1098 break;
1099 }
1100
1101 WDT_HIT();
1102 }
1103
1104 FpgaDisableSscDma();
1105
1106 if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
1107 samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
1108
1109 if (DecodeReader.byteCount > 0) {
1110 uint32_t sof_time = *eof_time
1111 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128:2048) // time for byte transfers
1112 - 32 // time for SOF transfer
1113 - 16; // time for EOF transfer
1114 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*32, *eof_time*32, NULL, true);
1115 }
1116
1117 return DecodeReader.byteCount;
1118 }
1119
1120
1121 // Construct an identify (Inventory) request, which is the first
1122 // thing that you must send to a tag to get a response.
1123 static void BuildIdentifyRequest(uint8_t *cmd) {
1124 uint16_t crc;
1125 // one sub-carrier, inventory, 1 slot, fast rate
1126 cmd[0] = ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1 | ISO15693_REQ_DATARATE_HIGH;
1127 // inventory command code
1128 cmd[1] = 0x01;
1129 // no mask
1130 cmd[2] = 0x00;
1131 //Now the CRC
1132 crc = Iso15693Crc(cmd, 3);
1133 cmd[3] = crc & 0xff;
1134 cmd[4] = crc >> 8;
1135 }
1136
1137
1138 //-----------------------------------------------------------------------------
1139 // Start to read an ISO 15693 tag. We send an identify request, then wait
1140 // for the response. The response is not demodulated, just left in the buffer
1141 // so that it can be downloaded to a PC and processed there.
1142 //-----------------------------------------------------------------------------
1143 void AcquireRawAdcSamplesIso15693(void) {
1144 LED_A_ON();
1145
1146 uint8_t *dest = BigBuf_get_addr();
1147
1148 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1149 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1150 LED_D_ON();
1151 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1152 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1153
1154 uint8_t cmd[5];
1155 BuildIdentifyRequest(cmd);
1156 CodeIso15693AsReader(cmd, sizeof(cmd));
1157
1158 // Give the tags time to energize
1159 SpinDelay(100);
1160
1161 // Now send the command
1162 uint32_t start_time = 0;
1163 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1164
1165 // wait for last transfer to complete
1166 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY)) ;
1167
1168 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
1169
1170 for(int c = 0; c < 4000; ) {
1171 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1172 uint16_t r = AT91C_BASE_SSC->SSC_RHR;
1173 dest[c++] = r >> 5;
1174 }
1175 }
1176
1177 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1178 LEDsoff();
1179 }
1180
1181
1182 void SnoopIso15693(uint8_t jam_search_len, uint8_t *jam_search_string) {
1183
1184 LED_A_ON();
1185
1186 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1187
1188 clear_trace();
1189 set_tracing(true);
1190
1191 // The DMA buffer, used to stream samples from the FPGA
1192 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
1193
1194 // Count of samples received so far, so that we can include timing
1195 // information in the trace buffer.
1196 int samples = 0;
1197
1198 DecodeTag_t DecodeTag = {0};
1199 uint8_t response[ISO15693_MAX_RESPONSE_LENGTH];
1200 DecodeTagInit(&DecodeTag, response, sizeof(response));
1201
1202 DecodeReader_t DecodeReader = {0};
1203 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1204 DecodeReaderInit(&DecodeReader, cmd, sizeof(cmd), jam_search_len, jam_search_string);
1205
1206 // Print some debug information about the buffer sizes
1207 if (DEBUG) {
1208 Dbprintf("Snooping buffers initialized:");
1209 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1210 Dbprintf(" Reader -> tag: %i bytes", ISO15693_MAX_COMMAND_LENGTH);
1211 Dbprintf(" tag -> Reader: %i bytes", ISO15693_MAX_RESPONSE_LENGTH);
1212 Dbprintf(" DMA: %i bytes", ISO15693_DMA_BUFFER_SIZE * sizeof(uint16_t));
1213 }
1214 Dbprintf("Snoop started. Press PM3 Button to stop.");
1215
1216 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE);
1217 LED_D_OFF();
1218 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1219 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1220 StartCountSspClk();
1221 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1222
1223 bool TagIsActive = false;
1224 bool ReaderIsActive = false;
1225 bool ExpectTagAnswer = false;
1226 uint32_t dma_start_time = 0;
1227 uint16_t *upTo = dmaBuf;
1228
1229 uint16_t max_behindBy = 0;
1230
1231 // And now we loop, receiving samples.
1232 for(;;) {
1233 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1234 if (behindBy > max_behindBy) {
1235 max_behindBy = behindBy;
1236 }
1237
1238 if (behindBy == 0) continue;
1239
1240 samples++;
1241 if (samples == 1) {
1242 // DMA has transferred the very first data
1243 dma_start_time = GetCountSspClk() & 0xfffffff0;
1244 }
1245
1246 uint16_t snoopdata = *upTo++;
1247
1248 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1249 upTo = dmaBuf; // start reading the circular buffer from the beginning
1250 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1251 // FpgaDisableTracing();
1252 Dbprintf("About to blow circular buffer - aborted! behindBy=%d, samples=%d", behindBy, samples);
1253 break;
1254 }
1255 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1256 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1257 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1258 WDT_HIT();
1259 if (BUTTON_PRESS()) {
1260 DbpString("Snoop stopped.");
1261 break;
1262 }
1263 }
1264 }
1265
1266 if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
1267 if (Handle15693SampleFromReader(snoopdata & 0x02, &DecodeReader)) {
1268 // FpgaDisableSscDma();
1269 uint32_t eof_time = dma_start_time + samples*16 + 8 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1270 if (DecodeReader.byteCount > 0) {
1271 uint32_t sof_time = eof_time
1272 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1273 - 32*16 // time for SOF transfer
1274 - 16*16; // time for EOF transfer
1275 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1276 }
1277 /* And ready to receive another command. */
1278 DecodeReaderReset(&DecodeReader);
1279 /* And also reset the demod code, which might have been */
1280 /* false-triggered by the commands from the reader. */
1281 DecodeTagReset(&DecodeTag);
1282 ReaderIsActive = false;
1283 ExpectTagAnswer = true;
1284 // upTo = dmaBuf;
1285 // samples = 0;
1286 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1287 // continue;
1288 } else if (Handle15693SampleFromReader(snoopdata & 0x01, &DecodeReader)) {
1289 // FpgaDisableSscDma();
1290 uint32_t eof_time = dma_start_time + samples*16 + 16 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1291 if (DecodeReader.byteCount > 0) {
1292 uint32_t sof_time = eof_time
1293 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1294 - 32*16 // time for SOF transfer
1295 - 16*16; // time for EOF transfer
1296 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1297 }
1298 /* And ready to receive another command. */
1299 DecodeReaderReset(&DecodeReader);
1300 /* And also reset the demod code, which might have been */
1301 /* false-triggered by the commands from the reader. */
1302 DecodeTagReset(&DecodeTag);
1303 ReaderIsActive = false;
1304 ExpectTagAnswer = true;
1305 // upTo = dmaBuf;
1306 // samples = 0;
1307 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1308 // continue;
1309 } else {
1310 ReaderIsActive = (DecodeReader.state >= STATE_READER_RECEIVE_DATA_1_OUT_OF_4);
1311 }
1312 }
1313
1314 if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet
1315 if (Handle15693SamplesFromTag(snoopdata >> 2, &DecodeTag)) {
1316 // FpgaDisableSscDma();
1317 uint32_t eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM_SNOOP; // end of EOF
1318 if (DecodeTag.lastBit == SOF_PART2) {
1319 eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
1320 }
1321 uint32_t sof_time = eof_time
1322 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
1323 - 32 * 16 // time for SOF transfer
1324 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
1325 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, eof_time*4, NULL, false);
1326 // And ready to receive another response.
1327 DecodeTagReset(&DecodeTag);
1328 DecodeReaderReset(&DecodeReader);
1329 ExpectTagAnswer = false;
1330 TagIsActive = false;
1331 // upTo = dmaBuf;
1332 // samples = 0;
1333 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1334 // continue;
1335 } else {
1336 TagIsActive = (DecodeTag.state >= STATE_TAG_RECEIVING_DATA);
1337 }
1338 }
1339
1340 }
1341
1342 FpgaDisableSscDma();
1343
1344 DbpString("Snoop statistics:");
1345 Dbprintf(" ExpectTagAnswer: %d, TagIsActive: %d, ReaderIsActive: %d", ExpectTagAnswer, TagIsActive, ReaderIsActive);
1346 Dbprintf(" DecodeTag State: %d", DecodeTag.state);
1347 Dbprintf(" DecodeTag byteCnt: %d", DecodeTag.len);
1348 Dbprintf(" DecodeTag posCount: %d", DecodeTag.posCount);
1349 Dbprintf(" DecodeReader State: %d", DecodeReader.state);
1350 Dbprintf(" DecodeReader byteCnt: %d", DecodeReader.byteCount);
1351 Dbprintf(" DecodeReader posCount: %d", DecodeReader.posCount);
1352 Dbprintf(" Trace length: %d", BigBuf_get_traceLen());
1353 Dbprintf(" Max behindBy: %d", max_behindBy);
1354 }
1355
1356
1357 // Initialize the proxmark as iso15k reader
1358 void Iso15693InitReader(void) {
1359 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1360
1361 // switch field off and wait until tag resets
1362 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1363 LED_D_OFF();
1364 SpinDelay(10);
1365
1366 // switch field on
1367 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1368 LED_D_ON();
1369
1370 // initialize SSC and select proper AD input
1371 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1372 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1373
1374 // give tags some time to energize
1375 SpinDelay(250);
1376 }
1377
1378 ///////////////////////////////////////////////////////////////////////
1379 // ISO 15693 Part 3 - Air Interface
1380 // This section basically contains transmission and receiving of bits
1381 ///////////////////////////////////////////////////////////////////////
1382
1383
1384 // uid is in transmission order (which is reverse of display order)
1385 static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber, uint8_t *cmd) {
1386 uint16_t crc;
1387 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1388 // followed by the block data
1389 cmd[0] = ISO15693_REQ_OPTION | ISO15693_REQ_ADDRESS | ISO15693_REQ_DATARATE_HIGH;
1390 // READ BLOCK command code
1391 cmd[1] = ISO15693_READBLOCK;
1392 // UID may be optionally specified here
1393 // 64-bit UID
1394 cmd[2] = uid[0];
1395 cmd[3] = uid[1];
1396 cmd[4] = uid[2];
1397 cmd[5] = uid[3];
1398 cmd[6] = uid[4];
1399 cmd[7] = uid[5];
1400 cmd[8] = uid[6];
1401 cmd[9] = uid[7]; // 0xe0; // always e0 (not exactly unique)
1402 // Block number to read
1403 cmd[10] = blockNumber;
1404 //Now the CRC
1405 crc = Iso15693Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
1406 cmd[11] = crc & 0xff;
1407 cmd[12] = crc >> 8;
1408
1409 }
1410
1411
1412 // Now the VICC>VCD responses when we are simulating a tag
1413 static void BuildInventoryResponse(uint8_t *uid) {
1414 uint8_t cmd[12];
1415
1416 uint16_t crc;
1417
1418 cmd[0] = 0; // No error, no protocol format extension
1419 cmd[1] = 0; // DSFID (data storage format identifier). 0x00 = not supported
1420 // 64-bit UID
1421 cmd[2] = uid[7]; //0x32;
1422 cmd[3] = uid[6]; //0x4b;
1423 cmd[4] = uid[5]; //0x03;
1424 cmd[5] = uid[4]; //0x01;
1425 cmd[6] = uid[3]; //0x00;
1426 cmd[7] = uid[2]; //0x10;
1427 cmd[8] = uid[1]; //0x05;
1428 cmd[9] = uid[0]; //0xe0;
1429 //Now the CRC
1430 crc = Iso15693Crc(cmd, 10);
1431 cmd[10] = crc & 0xff;
1432 cmd[11] = crc >> 8;
1433
1434 CodeIso15693AsTag(cmd, sizeof(cmd));
1435 }
1436
1437 // Universal Method for sending to and recv bytes from a tag
1438 // init ... should we initialize the reader?
1439 // speed ... 0 low speed, 1 hi speed
1440 // *recv will contain the tag's answer
1441 // return: length of received data, or -1 for timeout
1442 int SendDataTag(uint8_t *send, int sendlen, bool init, bool speed_fast, uint8_t *recv, uint16_t max_recv_len, uint32_t start_time, uint16_t timeout, uint32_t *eof_time) {
1443
1444 if (init) {
1445 Iso15693InitReader();
1446 StartCountSspClk();
1447 }
1448
1449 int answerLen = 0;
1450
1451 if (speed_fast) {
1452 // high speed (1 out of 4)
1453 CodeIso15693AsReader(send, sendlen);
1454 } else {
1455 // low speed (1 out of 256)
1456 CodeIso15693AsReader256(send, sendlen);
1457 }
1458
1459 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1460 uint32_t end_time = start_time + 32*(8*ToSendMax-4); // substract the 4 padding bits after EOF
1461 LogTrace_ISO15693(send, sendlen, start_time*4, end_time*4, NULL, true);
1462
1463 // Now wait for a response
1464 if (recv != NULL) {
1465 answerLen = GetIso15693AnswerFromTag(recv, max_recv_len, timeout, eof_time);
1466 }
1467
1468 return answerLen;
1469 }
1470
1471
1472 int SendDataTagEOF(uint8_t *recv, uint16_t max_recv_len, uint32_t start_time, uint16_t timeout, uint32_t *eof_time) {
1473
1474 int answerLen = 0;
1475
1476 CodeIso15693AsReaderEOF();
1477
1478 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1479 uint32_t end_time = start_time + 32*(8*ToSendMax-4); // substract the 4 padding bits after EOF
1480 LogTrace_ISO15693(NULL, 0, start_time*4, end_time*4, NULL, true);
1481
1482 // Now wait for a response
1483 if (recv != NULL) {
1484 answerLen = GetIso15693AnswerFromTag(recv, max_recv_len, timeout, eof_time);
1485 }
1486
1487 return answerLen;
1488 }
1489
1490
1491 // --------------------------------------------------------------------
1492 // Debug Functions
1493 // --------------------------------------------------------------------
1494
1495 // Decodes a message from a tag and displays its metadata and content
1496 #define DBD15STATLEN 48
1497 void DbdecodeIso15693Answer(int len, uint8_t *d) {
1498 char status[DBD15STATLEN+1]={0};
1499 uint16_t crc;
1500
1501 if (len > 3) {
1502 if (d[0] & ISO15693_RES_EXT)
1503 strncat(status,"ProtExt ", DBD15STATLEN);
1504 if (d[0] & ISO15693_RES_ERROR) {
1505 // error
1506 strncat(status,"Error ", DBD15STATLEN);
1507 switch (d[1]) {
1508 case 0x01:
1509 strncat(status,"01:notSupp", DBD15STATLEN);
1510 break;
1511 case 0x02:
1512 strncat(status,"02:notRecog", DBD15STATLEN);
1513 break;
1514 case 0x03:
1515 strncat(status,"03:optNotSupp", DBD15STATLEN);
1516 break;
1517 case 0x0f:
1518 strncat(status,"0f:noInfo", DBD15STATLEN);
1519 break;
1520 case 0x10:
1521 strncat(status,"10:doesn'tExist", DBD15STATLEN);
1522 break;
1523 case 0x11:
1524 strncat(status,"11:lockAgain", DBD15STATLEN);
1525 break;
1526 case 0x12:
1527 strncat(status,"12:locked", DBD15STATLEN);
1528 break;
1529 case 0x13:
1530 strncat(status,"13:progErr", DBD15STATLEN);
1531 break;
1532 case 0x14:
1533 strncat(status,"14:lockErr", DBD15STATLEN);
1534 break;
1535 default:
1536 strncat(status,"unknownErr", DBD15STATLEN);
1537 }
1538 strncat(status," ", DBD15STATLEN);
1539 } else {
1540 strncat(status,"NoErr ", DBD15STATLEN);
1541 }
1542
1543 crc=Iso15693Crc(d,len-2);
1544 if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
1545 strncat(status,"CrcOK",DBD15STATLEN);
1546 else
1547 strncat(status,"CrcFail!",DBD15STATLEN);
1548
1549 Dbprintf("%s",status);
1550 }
1551 }
1552
1553
1554
1555 ///////////////////////////////////////////////////////////////////////
1556 // Functions called via USB/Client
1557 ///////////////////////////////////////////////////////////////////////
1558
1559 void SetDebugIso15693(uint32_t debug) {
1560 DEBUG=debug;
1561 Dbprintf("Iso15693 Debug is now %s",DEBUG?"on":"off");
1562 return;
1563 }
1564
1565
1566 //---------------------------------------------------------------------------------------
1567 // Simulate an ISO15693 reader, perform anti-collision and then attempt to read a sector.
1568 // all demodulation performed in arm rather than host. - greg
1569 //---------------------------------------------------------------------------------------
1570 void ReaderIso15693(uint32_t parameter) {
1571
1572 LED_A_ON();
1573
1574 set_tracing(true);
1575
1576 uint8_t TagUID[8] = {0x00};
1577 uint8_t answer[ISO15693_MAX_RESPONSE_LENGTH];
1578
1579 // FIRST WE RUN AN INVENTORY TO GET THE TAG UID
1580 // THIS MEANS WE CAN PRE-BUILD REQUESTS TO SAVE CPU TIME
1581
1582 // Now send the IDENTIFY command
1583 uint8_t cmd[5];
1584 BuildIdentifyRequest(cmd);
1585 uint32_t start_time = 0;
1586 uint32_t eof_time;
1587 int answerLen = SendDataTag(cmd, sizeof(cmd), true, true, answer, sizeof(answer), start_time, ISO15693_READER_TIMEOUT, &eof_time);
1588 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1589
1590 if (answerLen >= 12) { // we should do a better check than this
1591 TagUID[0] = answer[2];
1592 TagUID[1] = answer[3];
1593 TagUID[2] = answer[4];
1594 TagUID[3] = answer[5];
1595 TagUID[4] = answer[6];
1596 TagUID[5] = answer[7];
1597 TagUID[6] = answer[8]; // IC Manufacturer code
1598 TagUID[7] = answer[9]; // always E0
1599 }
1600
1601 Dbprintf("%d octets read from IDENTIFY request:", answerLen);
1602 DbdecodeIso15693Answer(answerLen, answer);
1603 Dbhexdump(answerLen, answer, false);
1604
1605 // UID is reverse
1606 if (answerLen >= 12)
1607 Dbprintf("UID = %02hX%02hX%02hX%02hX%02hX%02hX%02hX%02hX",
1608 TagUID[7],TagUID[6],TagUID[5],TagUID[4],
1609 TagUID[3],TagUID[2],TagUID[1],TagUID[0]);
1610
1611 // read all pages
1612 if (answerLen >= 12 && DEBUG) {
1613 for (int i = 0; i < 32; i++) { // sanity check, assume max 32 pages
1614 uint8_t cmd[13];
1615 BuildReadBlockRequest(TagUID, i, cmd);
1616 answerLen = SendDataTag(cmd, sizeof(cmd), false, true, answer, sizeof(answer), start_time, ISO15693_READER_TIMEOUT, &eof_time);
1617 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1618 if (answerLen > 0) {
1619 Dbprintf("READ SINGLE BLOCK %d returned %d octets:", i, answerLen);
1620 DbdecodeIso15693Answer(answerLen, answer);
1621 Dbhexdump(answerLen, answer, false);
1622 if ( *((uint32_t*) answer) == 0x07160101 ) break; // exit on NoPageErr
1623 }
1624 }
1625 }
1626
1627 // for the time being, switch field off to protect RDV4
1628 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1629 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1630 LED_D_OFF();
1631
1632 LED_A_OFF();
1633 }
1634
1635
1636 // Initialize the proxmark as iso15k tag
1637 void Iso15693InitTag(void) {
1638 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1639 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1640 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1641 LED_D_OFF();
1642 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1643 StartCountSspClk();
1644 }
1645
1646
1647 // Simulate an ISO15693 TAG.
1648 // For Inventory command: print command and send Inventory Response with given UID
1649 // TODO: interpret other reader commands and send appropriate response
1650 void SimTagIso15693(uint32_t parameter, uint8_t *uid) {
1651
1652 LED_A_ON();
1653
1654 Iso15693InitTag();
1655
1656 // Build a suitable response to the reader INVENTORY command
1657 BuildInventoryResponse(uid);
1658
1659 // Listen to reader
1660 while (!BUTTON_PRESS()) {
1661 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1662 uint32_t eof_time = 0, start_time = 0;
1663 int cmd_len = GetIso15693CommandFromReader(cmd, sizeof(cmd), &eof_time);
1664
1665 if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
1666 bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
1667 start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM;
1668 TransmitTo15693Reader(ToSend, ToSendMax, &start_time, 0, slow);
1669 }
1670
1671 Dbprintf("%d bytes read from reader:", cmd_len);
1672 Dbhexdump(cmd_len, cmd, false);
1673 }
1674
1675 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1676 LED_D_OFF();
1677 LED_A_OFF();
1678 }
1679
1680
1681 // Since there is no standardized way of reading the AFI out of a tag, we will brute force it
1682 // (some manufactures offer a way to read the AFI, though)
1683 void BruteforceIso15693Afi(uint32_t speed) {
1684 LED_A_ON();
1685
1686 uint8_t data[6];
1687 uint8_t recv[ISO15693_MAX_RESPONSE_LENGTH];
1688 int datalen = 0, recvlen = 0;
1689 uint32_t eof_time;
1690
1691 // first without AFI
1692 // Tags should respond without AFI and with AFI=0 even when AFI is active
1693
1694 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
1695 data[1] = ISO15693_INVENTORY;
1696 data[2] = 0; // mask length
1697 datalen = Iso15693AddCrc(data,3);
1698 uint32_t start_time = GetCountSspClk();
1699 recvlen = SendDataTag(data, datalen, true, speed, recv, sizeof(recv), 0, ISO15693_READER_TIMEOUT, &eof_time);
1700 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1701 WDT_HIT();
1702 if (recvlen>=12) {
1703 Dbprintf("NoAFI UID=%s", Iso15693sprintUID(NULL, &recv[2]));
1704 }
1705
1706 // now with AFI
1707
1708 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_AFI | ISO15693_REQINV_SLOT1;
1709 data[1] = ISO15693_INVENTORY;
1710 data[2] = 0; // AFI
1711 data[3] = 0; // mask length
1712
1713 for (int i = 0; i < 256; i++) {
1714 data[2] = i & 0xFF;
1715 datalen = Iso15693AddCrc(data,4);
1716 recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time, ISO15693_READER_TIMEOUT, &eof_time);
1717 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1718 WDT_HIT();
1719 if (recvlen >= 12) {
1720 Dbprintf("AFI=%i UID=%s", i, Iso15693sprintUID(NULL, &recv[2]));
1721 }
1722 }
1723 Dbprintf("AFI Bruteforcing done.");
1724
1725 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1726 LED_D_OFF();
1727 LED_A_OFF();
1728
1729 }
1730
1731 // Allows to directly send commands to the tag via the client
1732 void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]) {
1733
1734 LED_A_ON();
1735
1736 int recvlen = 0;
1737 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1738 uint32_t eof_time;
1739
1740 uint16_t timeout;
1741 bool request_answer = false;
1742
1743 switch (data[1]) {
1744 case ISO15693_WRITEBLOCK:
1745 case ISO15693_LOCKBLOCK:
1746 case ISO15693_WRITE_MULTI_BLOCK:
1747 case ISO15693_WRITE_AFI:
1748 case ISO15693_LOCK_AFI:
1749 case ISO15693_WRITE_DSFID:
1750 case ISO15693_LOCK_DSFID:
1751 timeout = ISO15693_READER_TIMEOUT_WRITE;
1752 request_answer = data[0] & ISO15693_REQ_OPTION;
1753 break;
1754 default:
1755 timeout = ISO15693_READER_TIMEOUT;
1756 }
1757
1758 if (DEBUG) {
1759 Dbprintf("SEND:");
1760 Dbhexdump(datalen, data, false);
1761 }
1762
1763 recvlen = SendDataTag(data, datalen, true, speed, (recv?recvbuf:NULL), sizeof(recvbuf), 0, timeout, &eof_time);
1764
1765 if (request_answer) { // send a single EOF to get the tag response
1766 recvlen = SendDataTagEOF((recv?recvbuf:NULL), sizeof(recvbuf), 0, ISO15693_READER_TIMEOUT, &eof_time);
1767 }
1768
1769 // for the time being, switch field off to protect rdv4.0
1770 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1771 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1772 LED_D_OFF();
1773
1774 if (recv) {
1775 if (DEBUG) {
1776 Dbprintf("RECV:");
1777 if (recvlen > 0) {
1778 Dbhexdump(recvlen, recvbuf, false);
1779 DbdecodeIso15693Answer(recvlen, recvbuf);
1780 }
1781 }
1782 if (recvlen > ISO15693_MAX_RESPONSE_LENGTH) {
1783 recvlen = ISO15693_MAX_RESPONSE_LENGTH;
1784 }
1785 cmd_send(CMD_ACK, recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
1786 }
1787
1788 LED_A_OFF();
1789 }
1790
1791 //-----------------------------------------------------------------------------
1792 // Work with "magic Chinese" card.
1793 //
1794 //-----------------------------------------------------------------------------
1795
1796 // Set the UID on Magic ISO15693 tag (based on Iceman's LUA-script).
1797 void SetTag15693Uid(uint8_t *uid) {
1798
1799 LED_A_ON();
1800
1801 uint8_t cmd[4][9] = {
1802 {ISO15693_REQ_DATARATE_HIGH, ISO15693_WRITEBLOCK, 0x3e, 0x00, 0x00, 0x00, 0x00},
1803 {ISO15693_REQ_DATARATE_HIGH, ISO15693_WRITEBLOCK, 0x3f, 0x69, 0x96, 0x00, 0x00},
1804 {ISO15693_REQ_DATARATE_HIGH, ISO15693_WRITEBLOCK, 0x38},
1805 {ISO15693_REQ_DATARATE_HIGH, ISO15693_WRITEBLOCK, 0x39}
1806 };
1807
1808 uint16_t crc;
1809
1810 int recvlen = 0;
1811 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1812 uint32_t eof_time;
1813
1814 // Command 3 : 022138u8u7u6u5 (where uX = uid byte X)
1815 cmd[2][3] = uid[7];
1816 cmd[2][4] = uid[6];
1817 cmd[2][5] = uid[5];
1818 cmd[2][6] = uid[4];
1819
1820 // Command 4 : 022139u4u3u2u1 (where uX = uid byte X)
1821 cmd[3][3] = uid[3];
1822 cmd[3][4] = uid[2];
1823 cmd[3][5] = uid[1];
1824 cmd[3][6] = uid[0];
1825
1826 uint32_t start_time = 0;
1827
1828 for (int i = 0; i < 4; i++) {
1829 // Add the CRC
1830 crc = Iso15693Crc(cmd[i], 7);
1831 cmd[i][7] = crc & 0xff;
1832 cmd[i][8] = crc >> 8;
1833
1834 recvlen = SendDataTag(cmd[i], sizeof(cmd[i]), i==0?true:false, true, recvbuf, sizeof(recvbuf), start_time, ISO15693_READER_TIMEOUT_WRITE, &eof_time);
1835 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1836 if (DEBUG) {
1837 Dbprintf("SEND:");
1838 Dbhexdump(sizeof(cmd[i]), cmd[i], false);
1839 Dbprintf("RECV:");
1840 if (recvlen > 0) {
1841 Dbhexdump(recvlen, recvbuf, false);
1842 DbdecodeIso15693Answer(recvlen, recvbuf);
1843 }
1844 }
1845 // Note: need to know if we expect an answer from one of the magic commands
1846 // if (recvlen < 0) {
1847 // break;
1848 // }
1849 }
1850
1851 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1852 LED_D_OFF();
1853
1854 cmd_send(CMD_ACK, recvlen, 0, 0, recvbuf, recvlen);
1855 LED_A_OFF();
1856 }
1857
1858
1859
1860 // --------------------------------------------------------------------
1861 // -- Misc & deprecated functions
1862 // --------------------------------------------------------------------
1863
1864 /*
1865
1866 // do not use; has a fix UID
1867 static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
1868 {
1869 uint8_t cmd[12];
1870
1871 uint16_t crc;
1872 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1873 // followed by the block data
1874 // one sub-carrier, inventory, 1 slot, fast rate
1875 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1876 // System Information command code
1877 cmd[1] = 0x2B;
1878 // UID may be optionally specified here
1879 // 64-bit UID
1880 cmd[2] = 0x32;
1881 cmd[3]= 0x4b;
1882 cmd[4] = 0x03;
1883 cmd[5] = 0x01;
1884 cmd[6] = 0x00;
1885 cmd[7] = 0x10;
1886 cmd[8] = 0x05;
1887 cmd[9]= 0xe0; // always e0 (not exactly unique)
1888 //Now the CRC
1889 crc = Iso15693Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
1890 cmd[10] = crc & 0xff;
1891 cmd[11] = crc >> 8;
1892
1893 CodeIso15693AsReader(cmd, sizeof(cmd));
1894 }
1895
1896
1897 // do not use; has a fix UID
1898 static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
1899 {
1900 uint8_t cmd[14];
1901
1902 uint16_t crc;
1903 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1904 // followed by the block data
1905 // one sub-carrier, inventory, 1 slot, fast rate
1906 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1907 // READ Multi BLOCK command code
1908 cmd[1] = 0x23;
1909 // UID may be optionally specified here
1910 // 64-bit UID
1911 cmd[2] = 0x32;
1912 cmd[3]= 0x4b;
1913 cmd[4] = 0x03;
1914 cmd[5] = 0x01;
1915 cmd[6] = 0x00;
1916 cmd[7] = 0x10;
1917 cmd[8] = 0x05;
1918 cmd[9]= 0xe0; // always e0 (not exactly unique)
1919 // First Block number to read
1920 cmd[10] = 0x00;
1921 // Number of Blocks to read
1922 cmd[11] = 0x2f; // read quite a few
1923 //Now the CRC
1924 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1925 cmd[12] = crc & 0xff;
1926 cmd[13] = crc >> 8;
1927
1928 CodeIso15693AsReader(cmd, sizeof(cmd));
1929 }
1930
1931 // do not use; has a fix UID
1932 static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t CmdCode)
1933 {
1934 uint8_t cmd[14];
1935
1936 uint16_t crc;
1937 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1938 // followed by the block data
1939 // one sub-carrier, inventory, 1 slot, fast rate
1940 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1941 // READ BLOCK command code
1942 cmd[1] = CmdCode;
1943 // UID may be optionally specified here
1944 // 64-bit UID
1945 cmd[2] = 0x32;
1946 cmd[3]= 0x4b;
1947 cmd[4] = 0x03;
1948 cmd[5] = 0x01;
1949 cmd[6] = 0x00;
1950 cmd[7] = 0x10;
1951 cmd[8] = 0x05;
1952 cmd[9]= 0xe0; // always e0 (not exactly unique)
1953 // Parameter
1954 cmd[10] = 0x00;
1955 cmd[11] = 0x0a;
1956
1957 // cmd[12] = 0x00;
1958 // cmd[13] = 0x00; //Now the CRC
1959 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1960 cmd[12] = crc & 0xff;
1961 cmd[13] = crc >> 8;
1962
1963 CodeIso15693AsReader(cmd, sizeof(cmd));
1964 }
1965
1966 // do not use; has a fix UID
1967 static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], uint8_t CmdCode)
1968 {
1969 uint8_t cmd[14];
1970
1971 uint16_t crc;
1972 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1973 // followed by the block data
1974 // one sub-carrier, inventory, 1 slot, fast rate
1975 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1976 // READ BLOCK command code
1977 cmd[1] = CmdCode;
1978 // UID may be optionally specified here
1979 // 64-bit UID
1980 cmd[2] = 0x32;
1981 cmd[3]= 0x4b;
1982 cmd[4] = 0x03;
1983 cmd[5] = 0x01;
1984 cmd[6] = 0x00;
1985 cmd[7] = 0x10;
1986 cmd[8] = 0x05;
1987 cmd[9]= 0xe0; // always e0 (not exactly unique)
1988 // Parameter
1989 cmd[10] = 0x05; // for custom codes this must be manufacturer code
1990 cmd[11] = 0x00;
1991
1992 // cmd[12] = 0x00;
1993 // cmd[13] = 0x00; //Now the CRC
1994 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1995 cmd[12] = crc & 0xff;
1996 cmd[13] = crc >> 8;
1997
1998 CodeIso15693AsReader(cmd, sizeof(cmd));
1999 }
2000
2001
2002
2003
2004 */
2005
2006
Proxmark3 GIT tracking
Impressum, Datenschutz