CHG: minor correction to the em410xsim help text.

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 2a5573d1cf156a6125c872bc16f19072fa5b8020..6eb89912606930f46e156075e7b19af5b818dcdf 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -38,15 +38,15 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
 
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
 

-       /* Make sure the tag is reset */
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       SpinDelay(2500);
+    /* Make sure the tag is reset */
+    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+    FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+    SpinDelay(2500);

 
        LFSetupFPGAForADC(sc.divisor, 1);
 
 
        LFSetupFPGAForADC(sc.divisor, 1);
 

-       // And a little more time for the tag to fully power up
-       SpinDelay(2000);
+    // And a little more time for the tag to fully power up
+    SpinDelay(2000);

 
     // now modulate the reader field
     while(*command != '\0' && *command != ' ') {
 
     // now modulate the reader field
     while(*command != '\0' && *command != ' ') {


@@ -73,8 +73,6 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
        DoAcquisition_config(false);
 }
 
        DoAcquisition_config(false);
 }
 

-
-

 /* blank r/w tag data stream
 ...0000000000000000 01111111
 1010101010101010101010101010101010101010101010101010101010101010
 /* blank r/w tag data stream
 ...0000000000000000 01111111
 1010101010101010101010101010101010101010101010101010101010101010


@@ -382,7 +380,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
     DbpString("Now use tiread to check");
 }
 
     DbpString("Now use tiread to check");
 }
 

-void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
+void SimulateTagLowFrequency(uint16_t period, uint32_t gap, uint8_t ledcontrol)

 {
     int i;
     uint8_t *tab = BigBuf_get_addr();
 {
     int i;
     uint8_t *tab = BigBuf_get_addr();


@@ -657,11 +655,11 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 
     if (encoding==2){  //biphase
         uint8_t phase=0;
 
     if (encoding==2){  //biphase
         uint8_t phase=0;

-        for (i=0; i<size; i++){
+    for (i=0; i<size; i++){

             biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
             biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);

-        }
+    }

         if (BitStream[0]==BitStream[size-1]){ //run a second set inverted to keep phase in check
         if (BitStream[0]==BitStream[size-1]){ //run a second set inverted to keep phase in check

-            for (i=0; i<size; i++){
+        for (i=0; i<size; i++){

                 biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
             }
         }
                 biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
             }
         }


@@ -672,7 +670,7 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
         if (encoding==0 && BitStream[0]==BitStream[size-1]){ //run a second set inverted (for biphase phase)
             for (i=0; i<size; i++){
                 askSimBit(BitStream[i]^invert^1, &n, clk, encoding);
         if (encoding==0 && BitStream[0]==BitStream[size-1]){ //run a second set inverted (for biphase phase)
             for (i=0; i<size; i++){
                 askSimBit(BitStream[i]^invert^1, &n, clk, encoding);

-            }    
+        }    

         }    
     }
     
         }    
     }
     


@@ -768,7 +766,7 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);

-               // FSK demodulator
+        // FSK demodulator

         size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
                idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
         
         size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
                idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
         


@@ -845,7 +843,7 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
 {
     uint8_t *dest = BigBuf_get_addr();
 
 {
     uint8_t *dest = BigBuf_get_addr();
 

-    size_t size=0, idx=0;
+       size_t size=0, idx=0;

     int clk=0, invert=0, errCnt=0, maxErr=20;
     uint32_t hi=0;
     uint64_t lo=0;
     int clk=0, invert=0, errCnt=0, maxErr=20;
     uint32_t hi=0;
     uint64_t lo=0;


@@ -857,11 +855,11 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
 
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
 

-        DoAcquisition_default(-1,true);
+               DoAcquisition_default(-1,true);

         size  = BigBuf_max_traceLen();
         //Dbprintf("DEBUG: Buffer got");
         size  = BigBuf_max_traceLen();
         //Dbprintf("DEBUG: Buffer got");

-        //askdemod and manchester decode
-        errCnt = askmandemod(dest, &size, &clk, &invert, maxErr);
+               //askdemod and manchester decode
+               errCnt = askmandemod(dest, &size, &clk, &invert, maxErr);

         //Dbprintf("DEBUG: ASK Got");
         WDT_HIT();
 
         //Dbprintf("DEBUG: ASK Got");
         WDT_HIT();
 


@@ -878,13 +876,13 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
                         (uint32_t)((lo>>16LL) & 0xFF),
                         (uint32_t)(lo & 0xFFFFFF));
                 } else {
                         (uint32_t)((lo>>16LL) & 0xFF),
                         (uint32_t)(lo & 0xFFFFFF));
                 } else {

-                    Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)",
-                        (uint32_t)(lo>>32),
-                        (uint32_t)lo,
-                        (uint32_t)(lo&0xFFFF),
-                        (uint32_t)((lo>>16LL) & 0xFF),
-                        (uint32_t)(lo & 0xFFFFFF));
-                }
+                               Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)",
+                                   (uint32_t)(lo>>32),
+                                   (uint32_t)lo,
+                                   (uint32_t)(lo&0xFFFF),
+                                   (uint32_t)((lo>>16LL) & 0xFF),
+                                   (uint32_t)(lo & 0xFFFFFF));
+            }

             }
             if (findone){
                 if (ledcontrol)        LED_A_OFF();
             }
             if (findone){
                 if (ledcontrol)        LED_A_OFF();


@@ -914,6 +912,8 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
     uint8_t version=0;
     uint8_t facilitycode=0;
     uint16_t number=0;
     uint8_t version=0;
     uint8_t facilitycode=0;
     uint16_t number=0;

+       uint8_t crc = 0;
+       uint16_t calccrc = 0;

     // Configure to go in 125Khz listen mode
     LFSetupFPGAForADC(95, true);
 
     // Configure to go in 125Khz listen mode
     LFSetupFPGAForADC(95, true);
 


@@ -921,7 +921,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
                DoAcquisition_default(-1,true);
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
                DoAcquisition_default(-1,true);

-               //fskdemod and get start index
+        //fskdemod and get start index

         WDT_HIT();
         idx = IOdemodFSK(dest, BigBuf_max_traceLen());
         if (idx>0){
         WDT_HIT();
         idx = IOdemodFSK(dest, BigBuf_max_traceLen());
         if (idx>0){


@@ -932,8 +932,17 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
             //|           |           |           |           |           |           |
             //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
             //-----------------------------------------------------------------------------
             //|           |           |           |           |           |           |
             //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
             //-----------------------------------------------------------------------------

-            //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 ???????? 11
+            //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 checksum 11

             //
             //

+                       //Checksum:  
+                       //00000000 0 11110000 1 11100000 1 00000001 1 00000011 1 10110110 1 01110101 11
+                       //preamble      F0         E0         01         03         B6         75
+                       // How to calc checksum,
+                       // http://www.proxmark.org/forum/viewtopic.php?id=364&p=6
+                       //   F0 + E0 + 01 + 03 + B6 = 28A
+                       //   28A & FF = 8A
+                       //   FF - 8A = 75
+                       // Checksum: 0x75

             //XSF(version)facility:codeone+codetwo
             //Handle the data
             if(findone){ //only print binary if we are doing one
             //XSF(version)facility:codeone+codetwo
             //Handle the data
             if(findone){ //only print binary if we are doing one


@@ -951,7 +960,15 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
             facilitycode = bytebits_to_byte(dest+idx+18,8) ;
             number = (bytebits_to_byte(dest+idx+36,8)<<8)|(bytebits_to_byte(dest+idx+45,8)); //36,9
 
             facilitycode = bytebits_to_byte(dest+idx+18,8) ;
             number = (bytebits_to_byte(dest+idx+36,8)<<8)|(bytebits_to_byte(dest+idx+45,8)); //36,9
 

-            Dbprintf("XSF(%02d)%02x:%05d (%08x%08x)",version,facilitycode,number,code,code2);
+                       crc = bytebits_to_byte(dest+idx+54,8);
+                       for (uint8_t i=1; i<6; ++i)
+                               calccrc += bytebits_to_byte(dest+idx+9*i,8);
+                       calccrc &= 0xff;
+                       calccrc = 0xff - calccrc;
+                       
+                       char *crcStr = (crc == calccrc) ? "ok":"!crc";
+
+            Dbprintf("IO Prox XSF(%02d)%02x:%05d (%08x%08x)  [%02x %s]",version,facilitycode,number,code,code2, crc, crcStr);

             // if we're only looking for one tag
             if (findone){
                 if (ledcontrol)        LED_A_OFF();
             // if we're only looking for one tag
             if (findone){
                 if (ledcontrol)        LED_A_OFF();


@@ -1030,10 +1047,26 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
  */
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
  */

-#define START_GAP 250
-#define WRITE_GAP 160
-#define WRITE_0   144 // 192
-#define WRITE_1   400 // 432 for T55x7; 448 for E5550
+#define START_GAP 50*8 // 10 - 50fc 250
+#define WRITE_GAP 20*8 //  8 - 30fc
+#define WRITE_0   24*8 // 16 - 31fc 24fc 192
+#define WRITE_1   54*8 // 48 - 63fc 54fc 432 for T55x7; 448 for E5550
+
+//  VALUES TAKEN FROM EM4x function: SendForward
+//  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
+//  WRITE_GAP = 128;       (16*8)
+//  WRITE_1   = 256 32*8;  (32*8) 
+
+//  These timings work for 4469/4269/4305 (with the 55*8 above)
+//  WRITE_0 = 23*8 , 9*8  SpinDelayUs(23*8); 
+
+// Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
+// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
+// Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
+// T0 = TIMER_CLOCK1 / 125000 = 192
+// 1 Cycle = 8 microseconds(us)
+
+#define T55xx_SAMPLES_SIZE             12000 // 32 x 32 x 10  (32 bit times numofblock (7), times clock skip..)

 
 // Write one bit to card
 void T55xxWriteBit(int bit)
 
 // Write one bit to card
 void T55xxWriteBit(int bit)


@@ -1041,7 +1074,7 @@ void T55xxWriteBit(int bit)
     FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
     FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
     FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
     FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
     FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
     FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

-    if (bit == 0)
+       if (!bit)

         SpinDelayUs(WRITE_0);
     else
         SpinDelayUs(WRITE_1);
         SpinDelayUs(WRITE_0);
     else
         SpinDelayUs(WRITE_1);


@@ -1052,16 +1085,11 @@ void T55xxWriteBit(int bit)
 // Write one card block in page 0, no lock
 void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
 // Write one card block in page 0, no lock
 void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {

-    //unsigned int i;  //enio adjustment 12/10/14
-    uint32_t i;
+    uint32_t i = 0;

 
 

-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+    // Set up FPGA, 125kHz
+    // Wait for config.. (192+8190xPOW)x8 == 67ms
+    LFSetupFPGAForADC(0, true);

 
     // Now start writting
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 
     // Now start writting
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);


@@ -1094,30 +1122,28 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 }
 
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 }
 

+void TurnReadLFOn(){
+    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+    // Give it a bit of time for the resonant antenna to settle.
+    SpinDelayUs(8*150);
+}
+
+

 // Read one card block in page 0
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
 // Read one card block in page 0
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {

+    uint32_t i = 0;

     uint8_t *dest = BigBuf_get_addr();
     uint8_t *dest = BigBuf_get_addr();

-    //int m=0, i=0; //enio adjustment 12/10/14
-    uint32_t m=0, i=0;
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    m = BigBuf_max_traceLen();
-    // Clear destination buffer before sending the command
-    memset(dest, 128, m);
-    // Connect the A/D to the peak-detected low-frequency path.
-    SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();
+    uint16_t bufferlength = BigBuf_max_traceLen();
+    if ( bufferlength > T55xx_SAMPLES_SIZE )
+        bufferlength = T55xx_SAMPLES_SIZE;

 
 

-    LED_D_ON();
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+    // Clear destination buffer before sending the command
+    memset(dest, 0x80, bufferlength);

 
 

-    // Now start writting
+    // Set up FPGA, 125kHz
+    // Wait for config.. (192+8190xPOW)x8 == 67ms
+    LFSetupFPGAForADC(0, true);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 


@@ -1136,53 +1162,40 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
         T55xxWriteBit(Block & i);
 
     // Turn field on to read the response
         T55xxWriteBit(Block & i);
 
     // Turn field on to read the response

-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
+    TurnReadLFOn();

     // Now do the acquisition
     i = 0;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;
     // Now do the acquisition
     i = 0;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;

+            LED_D_ON();

         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;

-            // we don't care about actual value, only if it's more or less than a
-            // threshold essentially we capture zero crossings for later analysis
-            //                 if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;

             i++;
             i++;

-            if (i >= m) break;
+            LED_D_OFF();
+            if (i >= bufferlength) break;

         }
     }
 
         }
     }
 

+    cmd_send(CMD_ACK,0,0,0,0,0);    

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();

-    DbpString("DONE!");

 }
 
 // Read card traceability data (page 1)
 void T55xxReadTrace(void){
 }
 
 // Read card traceability data (page 1)
 void T55xxReadTrace(void){

+    
+    uint32_t i = 0;

     uint8_t *dest = BigBuf_get_addr();
     uint8_t *dest = BigBuf_get_addr();

-    int m=0, i=0;
+    uint16_t bufferlength = BigBuf_max_traceLen();
+    if ( bufferlength > T55xx_SAMPLES_SIZE )
+        bufferlength= T55xx_SAMPLES_SIZE;

 
 

-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    m = BigBuf_max_traceLen();

     // Clear destination buffer before sending the command
     // Clear destination buffer before sending the command

-    memset(dest, 128, m);
-    // Connect the A/D to the peak-detected low-frequency path.
-    SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();
-
-    LED_D_ON();
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+    memset(dest, 0x80, bufferlength);

 
 

-    // Now start writting
+    LFSetupFPGAForADC(0, true);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 


@@ -1191,25 +1204,35 @@ void T55xxReadTrace(void){
     T55xxWriteBit(1); //Page 1
 
     // Turn field on to read the response
     T55xxWriteBit(1); //Page 1
 
     // Turn field on to read the response

-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+    TurnReadLFOn();

 
     // Now do the acquisition
 
     // Now do the acquisition

-    i = 0;

     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;

+            LED_D_ON();

         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
             i++;
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
             i++;

-            if (i >= m) break;
-        }
-    }
+            LED_D_OFF();

 
 

+            if (i >= bufferlength) break;
+               }
+       }
+  
+       cmd_send(CMD_ACK,0,0,0,0,0);
+    cmd_send(CMD_ACK,0,0,0,0,0);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();

-    DbpString("DONE!");
+}
+
+void TurnReadLFOn(){
+       //FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+       // Give it a bit of time for the resonant antenna to settle.
+       //SpinDelay(30);
+       SpinDelayUs(8*150);

 }
 
 /*-------------- Cloning routines -----------*/
 }
 
 /*-------------- Cloning routines -----------*/


@@ -1514,10 +1537,16 @@ void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int
 #define max(x,y) ( x<y ? y:x)
 
 int DemodPCF7931(uint8_t **outBlocks) {
 #define max(x,y) ( x<y ? y:x)
 
 int DemodPCF7931(uint8_t **outBlocks) {

-    uint8_t BitStream[256];
-    uint8_t Blocks[8][16];
-    uint8_t *GraphBuffer = BigBuf_get_addr();
-    int GraphTraceLen = BigBuf_max_traceLen();
+
+    uint8_t bits[256] = {0x00};
+       uint8_t blocks[8][16];
+    uint8_t *dest = BigBuf_get_addr();
+    
+       int GraphTraceLen = BigBuf_max_traceLen();
+       if (  GraphTraceLen > 18000 )
+               GraphTraceLen = 18000;
+       
+       

     int i, j, lastval, bitidx, half_switch;
     int clock = 64;
     int tolerance = clock / 8;
     int i, j, lastval, bitidx, half_switch;
     int clock = 64;
     int tolerance = clock / 8;


@@ -1528,8 +1557,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
     uint8_t dir;
 
        LFSetupFPGAForADC(95, true);
     uint8_t dir;
 
        LFSetupFPGAForADC(95, true);

-       DoAcquisition_default(0, 0);
-
+       DoAcquisition_default(0, true);

 
     lmin = 64;
     lmax = 192;
 
     lmin = 64;
     lmax = 192;


@@ -1537,9 +1565,9 @@ int DemodPCF7931(uint8_t **outBlocks) {
     i = 2;
 
     /* Find first local max/min */
     i = 2;
 
     /* Find first local max/min */

-    if(GraphBuffer[1] > GraphBuffer[0]) {
+    if(dest[1] > dest[0]) {

         while(i < GraphTraceLen) {
         while(i < GraphTraceLen) {

-            if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)
+            if( !(dest[i] > dest[i-1]) && dest[i] > lmax)

                 break;
             i++;
         }
                 break;
             i++;
         }


@@ -1547,7 +1575,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
     }
     else {
         while(i < GraphTraceLen) {
     }
     else {
         while(i < GraphTraceLen) {

-            if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)
+            if( !(dest[i] < dest[i-1]) && dest[i] < lmin)

                 break;
             i++;
         }
                 break;
             i++;
         }


@@ -1561,7 +1589,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
 
     for (bitidx = 0; i < GraphTraceLen; i++)
     {
 
     for (bitidx = 0; i < GraphTraceLen; i++)
     {

-        if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
+        if ( (dest[i-1] > dest[i] && dir == 1 && dest[i] > lmax) || (dest[i-1] < dest[i] && dir == 0 && dest[i] < lmin))

         {
             lc = i - lastval;
             lastval = i;
         {
             lc = i - lastval;
             lastval = i;


@@ -1590,14 +1618,14 @@ int DemodPCF7931(uint8_t **outBlocks) {
                     block_done = 1;
                 }
                 else if(half_switch == 1) {
                     block_done = 1;
                 }
                 else if(half_switch == 1) {

-                    BitStream[bitidx++] = 0;
+                    bits[bitidx++] = 0;

                     half_switch = 0;
                 }
                 else
                     half_switch++;
             } else if (abs(lc-clock) < tolerance) {
                 // 64TO
                     half_switch = 0;
                 }
                 else
                     half_switch++;
             } else if (abs(lc-clock) < tolerance) {
                 // 64TO

-                BitStream[bitidx++] = 1;
+                bits[bitidx++] = 1;

             } else {
                 // Error
                 warnings++;
             } else {
                 // Error
                 warnings++;


@@ -1611,14 +1639,15 @@ int DemodPCF7931(uint8_t **outBlocks) {
             if(block_done == 1) {
                 if(bitidx == 128) {
                     for(j=0; j<16; j++) {
             if(block_done == 1) {
                 if(bitidx == 128) {
                     for(j=0; j<16; j++) {

-                        Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
-                                64*BitStream[j*8+6]+
-                                32*BitStream[j*8+5]+
-                                16*BitStream[j*8+4]+
-                                8*BitStream[j*8+3]+
-                                4*BitStream[j*8+2]+
-                                2*BitStream[j*8+1]+
-                                BitStream[j*8];
+                        blocks[num_blocks][j] = 128*bits[j*8+7]+
+                                64*bits[j*8+6]+
+                                32*bits[j*8+5]+
+                                16*bits[j*8+4]+
+                                8*bits[j*8+3]+
+                                4*bits[j*8+2]+
+                                2*bits[j*8+1]+
+                                bits[j*8];
+                                               

                     }
                     num_blocks++;
                 }
                     }
                     num_blocks++;
                 }


@@ -1627,17 +1656,14 @@ int DemodPCF7931(uint8_t **outBlocks) {
                 half_switch = 0;
             }
             if(i < GraphTraceLen)
                 half_switch = 0;
             }
             if(i < GraphTraceLen)

-            {
-                if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
-                else dir = 1;
-            }
+                dir =(dest[i-1] > dest[i]) ? 0 : 1;

         }
         if(bitidx==255)
             bitidx=0;
         warnings = 0;
         if(num_blocks == 4) break;
     }
         }
         if(bitidx==255)
             bitidx=0;
         warnings = 0;
         if(num_blocks == 4) break;
     }

-    memcpy(outBlocks, Blocks, 16*num_blocks);
+    memcpy(outBlocks, blocks, 16*num_blocks);

     return num_blocks;
 }
 
     return num_blocks;
 }
 


@@ -1935,9 +1961,14 @@ void EM4xLogin(uint32_t Password) {
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 

+       uint8_t *dest =  BigBuf_get_addr();
+       uint16_t bufferlength = BigBuf_max_traceLen();
+       uint32_t i = 0;
+
+       // Clear destination buffer before sending the command  0x80 = average.
+       memset(dest, 0x80, bufferlength);
+       

     uint8_t fwd_bit_count;
     uint8_t fwd_bit_count;

-    uint8_t *dest = BigBuf_get_addr();
-    int m=0, i=0;

 
     //If password mode do login
     if (PwdMode == 1) EM4xLogin(Pwd);
 
     //If password mode do login
     if (PwdMode == 1) EM4xLogin(Pwd);


@@ -1946,9 +1977,6 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
     fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
     fwd_bit_count += Prepare_Addr( Address );
 
     fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
     fwd_bit_count += Prepare_Addr( Address );
 

-    m = BigBuf_max_traceLen();
-    // Clear destination buffer before sending the command
-    memset(dest, 128, m);

     // Connect the A/D to the peak-detected low-frequency path.
     SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
     // Now set up the SSC to get the ADC samples that are now streaming at us.
     // Connect the A/D to the peak-detected low-frequency path.
     SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
     // Now set up the SSC to get the ADC samples that are now streaming at us.


@@ -1964,10 +1992,12 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;

-            i++;
-            if (i >= m) break;
-        }
-    }
+                       ++i;
+                       if (i >= bufferlength) break;
+               }
+       }
+  
+       cmd_send(CMD_ACK,0,0,0,0,0);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
 }
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
 }