]> git.zerfleddert.de Git - proxmark3-svn/blobdiff - armsrc/iclass.c
Legic TagSim: increased reader timeout (#771)
[proxmark3-svn] / armsrc / iclass.c
index c587f8ea98b9708862b80c6430a4e67b4caa6ef5..d27fc1c6f70ff533fe94b70e0590aae541a8100f 100644 (file)
@@ -676,7 +676,7 @@ void RAMFUNC SnoopIClass(void)
     Demod.state = DEMOD_UNSYNCD;
 
     // Setup for the DMA.
-    FpgaSetupSsc();
+    FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
     upTo = dmaBuf;
     lastRxCounter = DMA_BUFFER_SIZE;
     FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
@@ -751,12 +751,9 @@ void RAMFUNC SnoopIClass(void)
 
                        //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,true)) break;
                        //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, true)) break;
-                       if(tracing)     {
-                               uint8_t parity[MAX_PARITY_SIZE];
-                               GetParity(Uart.output, Uart.byteCnt, parity);
-                               LogTrace(Uart.output,Uart.byteCnt, time_start, time_stop, parity, true);
-                       }
-
+                       uint8_t parity[MAX_PARITY_SIZE];
+                       GetParity(Uart.output, Uart.byteCnt, parity);
+                       LogTrace(Uart.output,Uart.byteCnt, time_start, time_stop, parity, true);
 
                        /* And ready to receive another command. */
                    Uart.state = STATE_UNSYNCD;
@@ -779,11 +776,9 @@ void RAMFUNC SnoopIClass(void)
                        rsamples = samples - Demod.samples;
                    LED_B_ON();
 
-                       if(tracing)     {
-                               uint8_t parity[MAX_PARITY_SIZE];
-                               GetParity(Demod.output, Demod.len, parity);
-                               LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, false);
-                       }
+                       uint8_t parity[MAX_PARITY_SIZE];
+                       GetParity(Demod.output, Demod.len, parity);
+                       LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, false);
 
                    // And ready to receive another response.
                    memset(&Demod, 0, sizeof(Demod));
@@ -1163,7 +1158,7 @@ int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
        StartCountSspClk();
        // We need to listen to the high-frequency, peak-detected path.
        SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
-       FpgaSetupSsc();
+       FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
 
        // To control where we are in the protocol
        int cmdsRecvd = 0;
@@ -1322,20 +1317,17 @@ int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
                        t2r_time = GetCountSspClk();
                }
 
-               if (tracing) {
-                       uint8_t parity[MAX_PARITY_SIZE];
-                       GetParity(receivedCmd, len, parity);
-                       LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, (r2t_time-time_0) << 4, parity, true);
-
-                       if (trace_data != NULL) {
-                               GetParity(trace_data, trace_data_size, parity);
-                               LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, false);
-                       }
-                       if(!tracing) {
-                               DbpString("Trace full");
-                               //break;
-                       }
+               uint8_t parity[MAX_PARITY_SIZE];
+               GetParity(receivedCmd, len, parity);
+               LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, (r2t_time-time_0) << 4, parity, true);
 
+               if (trace_data != NULL) {
+                       GetParity(trace_data, trace_data_size, parity);
+                       LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, false);
+               }
+               if(!get_tracing()) {
+                       DbpString("Trace full");
+                       //break;
                }
        }
 
@@ -1360,7 +1352,7 @@ static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
        FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
 
        AT91C_BASE_SSC->SSC_THR = 0x00;
-       FpgaSetupSsc();
+       FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
        while(!BUTTON_PRESS()) {
                if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
                        b = AT91C_BASE_SSC->SSC_RHR; (void) b;
@@ -1398,7 +1390,7 @@ static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int
   int c;
   FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
   AT91C_BASE_SSC->SSC_THR = 0x00;
-  FpgaSetupSsc();
+  FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
 
    if (wait)
    {
@@ -1509,11 +1501,9 @@ void ReaderTransmitIClass(uint8_t* frame, int len)
                LED_A_ON();
 
        // Store reader command in buffer
-       if (tracing) {
-               uint8_t par[MAX_PARITY_SIZE];
-               GetParity(frame, len, par);
-               LogTrace(frame, len, rsamples, rsamples, par, true);
-       }
+       uint8_t par[MAX_PARITY_SIZE];
+       GetParity(frame, len, par);
+       LogTrace(frame, len, rsamples, rsamples, par, true);
 }
 
 //-----------------------------------------------------------------------------
@@ -1569,11 +1559,9 @@ int ReaderReceiveIClass(uint8_t* receivedAnswer)
   int samples = 0;
   if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return false;
   rsamples += samples;
-  if (tracing) {
-       uint8_t parity[MAX_PARITY_SIZE];
-       GetParity(receivedAnswer, Demod.len, parity);
-       LogTrace(receivedAnswer,Demod.len,rsamples,rsamples,parity,false);
-  }
+  uint8_t parity[MAX_PARITY_SIZE];
+  GetParity(receivedAnswer, Demod.len, parity);
+  LogTrace(receivedAnswer,Demod.len,rsamples,rsamples,parity,false);
   if(samples == 0) return false;
   return Demod.len;
 }
@@ -1586,7 +1574,7 @@ void setupIclassReader()
          clear_trace();
 
     // Setup SSC
-    FpgaSetupSsc();
+    FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
     // Start from off (no field generated)
     // Signal field is off with the appropriate LED
     LED_D_OFF();
@@ -1715,7 +1703,7 @@ void ReaderIClass(uint8_t arg0) {
                // if only looking for one card try 2 times if we missed it the first time
                if (try_once && tryCnt > 2) break; 
                tryCnt++;
-               if(!tracing) {
+               if(!get_tracing()) {
                        DbpString("Trace full");
                        break;
                }
@@ -1828,7 +1816,7 @@ void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
        
                WDT_HIT();
 
-               if(!tracing) {
+               if(!get_tracing()) {
                        DbpString("Trace full");
                        break;
                }
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