]> git.zerfleddert.de Git - proxmark3-svn/blobdiff - tools/at91sam7s256-wiggler.cfg
Fixed up last gcc 4.1 and 4.4 warnings, added OpenOCD wiggler config
[proxmark3-svn] / tools / at91sam7s256-wiggler.cfg
diff --git a/tools/at91sam7s256-wiggler.cfg b/tools/at91sam7s256-wiggler.cfg
new file mode 100644 (file)
index 0000000..83156fe
--- /dev/null
@@ -0,0 +1,39 @@
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+interface parport\r
+parport_port 0x378\r
+parport_cable wiggler\r
+jtag_speed 0\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+reset_config srst_only srst_pulls_trst\r
+\r
+jtag newtap sam7x256 cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f\r
+#jtag newtap xilinx tap -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id 0x1c1a093\r
+\r
+target create sam7x256.cpu arm7tdmi -endian little -chain-position sam7x256.cpu -variant arm7tdmi\r
+sam7x256.cpu configure -event reset-init {\r
+       # disable watchdog\r
+       mww 0xfffffd44 0x00008000\r
+       # enable user reset\r
+       mww 0xfffffd08 0xa5000001\r
+       # CKGR_MOR : enable the main oscillator\r
+       mww 0xfffffc20 0x00000601\r
+       sleep 10\r
+       # CKGR_PLLR:  16 MHz * (5+1) /1 = 96Mhz\r
+       mww 0xfffffc2c 0x00051c01\r
+       sleep 10\r
+       # PMC_MCKR : MCK = PLL / 2 = 48 MHz\r
+       mww 0xfffffc30 0x00000007\r
+       sleep 10\r
+       # MC_FMR: flash mode (FWS=1,FMCN=60)\r
+       mww 0xffffff60 0x003c0100\r
+       sleep 100\r
+}\r
+\r
+gdb_memory_map enable\r
+\r
+sam7x256.cpu configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x10000 -work-area-backup 0\r
+flash bank at91sam7 0 0 0 0 0\r
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