FIX: move and rename the CRC8Maxim method into crc.c

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 468f58302862c1cdf6d9559f988d3176ed41ac47..70c6e33b93b3e46c0f15766abee4ed2f4577a8bc 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -37,15 +37,15 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
 
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
 

-       /* Make sure the tag is reset */
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       SpinDelay(2500);
+    /* Make sure the tag is reset */
+    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+    FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+    SpinDelay(2500);

 
        LFSetupFPGAForADC(sc.divisor, 1);
 
 
        LFSetupFPGAForADC(sc.divisor, 1);
 

-       // And a little more time for the tag to fully power up
-       SpinDelay(2000);
+    // And a little more time for the tag to fully power up
+    SpinDelay(2000);

 
     // now modulate the reader field
     while(*command != '\0' && *command != ' ') {
 
     // now modulate the reader field
     while(*command != '\0' && *command != ' ') {


@@ -72,8 +72,6 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
        DoAcquisition_config(false);
 }
 
        DoAcquisition_config(false);
 }
 

-
-

 /* blank r/w tag data stream
 ...0000000000000000 01111111
 1010101010101010101010101010101010101010101010101010101010101010
 /* blank r/w tag data stream
 ...0000000000000000 01111111
 1010101010101010101010101010101010101010101010101010101010101010


@@ -381,7 +379,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
     DbpString("Now use tiread to check");
 }
 
     DbpString("Now use tiread to check");
 }
 

-void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
+void SimulateTagLowFrequency(uint16_t period, uint32_t gap, uint8_t ledcontrol)

 {
     int i;
     uint8_t *tab = BigBuf_get_addr();
 {
     int i;
     uint8_t *tab = BigBuf_get_addr();


@@ -739,7 +737,7 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);

-               // FSK demodulator
+        // FSK demodulator

         size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
                idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
         
         size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
                idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
         


@@ -828,7 +826,7 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);

-               size  = BigBuf_max_traceLen();
+        size  = BigBuf_max_traceLen();

         //Dbprintf("DEBUG: Buffer got");
                //askdemod and manchester decode
                errCnt = askmandemod(dest, &size, &clk, &invert, maxErr);
         //Dbprintf("DEBUG: Buffer got");
                //askdemod and manchester decode
                errCnt = askmandemod(dest, &size, &clk, &invert, maxErr);


@@ -881,7 +879,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
                DoAcquisition_default(-1,true);
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
                DoAcquisition_default(-1,true);

-               //fskdemod and get start index
+        //fskdemod and get start index

         WDT_HIT();
         idx = IOdemodFSK(dest, BigBuf_max_traceLen());
         if (idx>0){
         WDT_HIT();
         idx = IOdemodFSK(dest, BigBuf_max_traceLen());
         if (idx>0){


@@ -990,10 +988,20 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
  */
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
  */

-#define START_GAP 250
-#define WRITE_GAP 160
-#define WRITE_0   144 // 192
-#define WRITE_1   400 // 432 for T55x7; 448 for E5550
+#define START_GAP 30*8 // 10 - 50fc 250
+#define WRITE_GAP 20*8 //  8 - 30fc
+#define WRITE_0   24*8 // 16 - 31fc 24fc 192
+#define WRITE_1   54*8 // 48 - 63fc 54fc 432 for T55x7; 448 for E5550
+
+//  VALUES TAKEN FROM EM4x function: SendForward
+//  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
+//  WRITE_GAP = 128;       (16*8)
+//  WRITE_1   = 256 32*8;  (32*8) 
+
+//  These timings work for 4469/4269/4305 (with the 55*8 above)
+//  WRITE_0 = 23*8 , 9*8  SpinDelayUs(23*8); 
+
+#define T55xx_SAMPLES_SIZE             12000 // 32 x 32 x 10  (32 bit times numofblock (7), times clock skip..)

 
 // Write one bit to card
 void T55xxWriteBit(int bit)
 
 // Write one bit to card
 void T55xxWriteBit(int bit)


@@ -1001,7 +1009,7 @@ void T55xxWriteBit(int bit)
     FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
     FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
     FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
     FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
     FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
     FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

-    if (bit == 0)
+       if (!bit)

         SpinDelayUs(WRITE_0);
     else
         SpinDelayUs(WRITE_1);
         SpinDelayUs(WRITE_0);
     else
         SpinDelayUs(WRITE_1);


@@ -1012,16 +1020,11 @@ void T55xxWriteBit(int bit)
 // Write one card block in page 0, no lock
 void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
 // Write one card block in page 0, no lock
 void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {

-    //unsigned int i;  //enio adjustment 12/10/14
-    uint32_t i;
-
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+       uint32_t i = 0;

 
 

-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+       // Set up FPGA, 125kHz
+       // Wait for config.. (192+8190xPOW)x8 == 67ms
+       LFSetupFPGAForADC(0, true);

 
     // Now start writting
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 
     // Now start writting
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);


@@ -1057,27 +1060,17 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
 // Read one card block in page 0
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
 // Read one card block in page 0
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {

+    uint32_t i = 0;

     uint8_t *dest = BigBuf_get_addr();
     uint8_t *dest = BigBuf_get_addr();

-    //int m=0, i=0; //enio adjustment 12/10/14
-    uint32_t m=0, i=0;
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    m = BigBuf_max_traceLen();
-    // Clear destination buffer before sending the command
-    memset(dest, 128, m);
-    // Connect the A/D to the peak-detected low-frequency path.
-    SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();
-
-    LED_D_ON();
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
-
-    // Now start writting
+    uint16_t bufferlength = BigBuf_max_traceLen();
+       if ( bufferlength > T55xx_SAMPLES_SIZE )
+               bufferlength = T55xx_SAMPLES_SIZE;
+
+       memset(dest, 0x80, bufferlength);
+       
+       // Set up FPGA, 125kHz
+       // Wait for config.. (192+8190xPOW)x8 == 67ms
+       LFSetupFPGAForADC(0, true);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 


@@ -1096,53 +1089,40 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
         T55xxWriteBit(Block & i);
 
     // Turn field on to read the response
         T55xxWriteBit(Block & i);
 
     // Turn field on to read the response

-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+       TurnReadLFOn();

 
     // Now do the acquisition
     i = 0;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;
 
     // Now do the acquisition
     i = 0;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;

+                       LED_D_ON();

         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;

-            // we don't care about actual value, only if it's more or less than a
-            // threshold essentially we capture zero crossings for later analysis
-            //                 if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
-            i++;
-            if (i >= m) break;
+                       ++i;
+                       LED_D_OFF();
+                       if (i >= bufferlength) break;

         }
     }
 
         }
     }
 

+       cmd_send(CMD_ACK,0,0,0,0,0);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();

-    DbpString("DONE!");

 }
 
 // Read card traceability data (page 1)
 void T55xxReadTrace(void){
 }
 
 // Read card traceability data (page 1)
 void T55xxReadTrace(void){

-    uint8_t *dest = BigBuf_get_addr();
-    int m=0, i=0;
-
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    m = BigBuf_max_traceLen();
-    // Clear destination buffer before sending the command
-    memset(dest, 128, m);
-    // Connect the A/D to the peak-detected low-frequency path.
-    SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();
-
-    LED_D_ON();
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

 
 

-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+       uint32_t i = 0;
+    uint8_t *dest = BigBuf_get_addr();
+    uint16_t bufferlength = BigBuf_max_traceLen();
+       if ( bufferlength > T55xx_SAMPLES_SIZE )
+               bufferlength = T55xx_SAMPLES_SIZE;

 
 

-    // Now start writting
+       memset(dest, 0x80, bufferlength);  
+  
+       LFSetupFPGAForADC(0, true);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 


@@ -1151,25 +1131,34 @@ void T55xxReadTrace(void){
     T55xxWriteBit(1); //Page 1
 
     // Turn field on to read the response
     T55xxWriteBit(1); //Page 1
 
     // Turn field on to read the response

-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+       TurnReadLFOn();

 
     // Now do the acquisition
 
     // Now do the acquisition

-    i = 0;

     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;

+                       LED_D_ON();

         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;

-            i++;
-            if (i >= m) break;
-        }
-    }
-
+                       ++i;
+                       LED_D_OFF();
+               
+                       if (i >= bufferlength) break;
+               }
+       }
+  
+       cmd_send(CMD_ACK,0,0,0,0,0);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();

-    DbpString("DONE!");
+}
+
+void TurnReadLFOn(){
+       //FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+       // Give it a bit of time for the resonant antenna to settle.
+       //SpinDelay(30);
+       SpinDelayUs(9*150);

 }
 
 /*-------------- Cloning routines -----------*/
 }
 
 /*-------------- Cloning routines -----------*/


@@ -1474,9 +1463,10 @@ void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int
 #define max(x,y) ( x<y ? y:x)
 
 int DemodPCF7931(uint8_t **outBlocks) {
 #define max(x,y) ( x<y ? y:x)
 
 int DemodPCF7931(uint8_t **outBlocks) {

-    uint8_t BitStream[256];
-    uint8_t Blocks[8][16];
-    uint8_t *GraphBuffer = BigBuf_get_addr();
+
+    uint8_t BitStream[256] = {0x00};
+       uint8_t Blocks[8][16];
+    uint8_t *dest = BigBuf_get_addr();

     int GraphTraceLen = BigBuf_max_traceLen();
     int i, j, lastval, bitidx, half_switch;
     int clock = 64;
     int GraphTraceLen = BigBuf_max_traceLen();
     int i, j, lastval, bitidx, half_switch;
     int clock = 64;


@@ -1488,8 +1478,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
     uint8_t dir;
 
        LFSetupFPGAForADC(95, true);
     uint8_t dir;
 
        LFSetupFPGAForADC(95, true);

-       DoAcquisition_default(0, 0);
-
+       DoAcquisition_default(0, true);

 
     lmin = 64;
     lmax = 192;
 
     lmin = 64;
     lmax = 192;


@@ -1497,9 +1486,9 @@ int DemodPCF7931(uint8_t **outBlocks) {
     i = 2;
 
     /* Find first local max/min */
     i = 2;
 
     /* Find first local max/min */

-    if(GraphBuffer[1] > GraphBuffer[0]) {
+    if(dest[1] > dest[0]) {

         while(i < GraphTraceLen) {
         while(i < GraphTraceLen) {

-            if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)
+            if( !(dest[i] > dest[i-1]) && dest[i] > lmax)

                 break;
             i++;
         }
                 break;
             i++;
         }


@@ -1507,7 +1496,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
     }
     else {
         while(i < GraphTraceLen) {
     }
     else {
         while(i < GraphTraceLen) {

-            if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)
+            if( !(dest[i] < dest[i-1]) && dest[i] < lmin)

                 break;
             i++;
         }
                 break;
             i++;
         }


@@ -1521,7 +1510,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
 
     for (bitidx = 0; i < GraphTraceLen; i++)
     {
 
     for (bitidx = 0; i < GraphTraceLen; i++)
     {

-        if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
+        if ( (dest[i-1] > dest[i] && dir == 1 && dest[i] > lmax) || (dest[i-1] < dest[i] && dir == 0 && dest[i] < lmin))

         {
             lc = i - lastval;
             lastval = i;
         {
             lc = i - lastval;
             lastval = i;


@@ -1588,7 +1577,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
             }
             if(i < GraphTraceLen)
             {
             }
             if(i < GraphTraceLen)
             {

-                if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
+                if (dest[i-1] > dest[i]) dir=0;

                 else dir = 1;
             }
         }
                 else dir = 1;
             }
         }


@@ -1895,9 +1884,14 @@ void EM4xLogin(uint32_t Password) {
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 

+       uint8_t *dest =  BigBuf_get_addr();
+       uint16_t bufferlength = BigBuf_max_traceLen();
+       uint32_t i = 0;
+
+       // Clear destination buffer before sending the command  0x80 = average.
+       memset(dest, 0x80, bufferlength);
+       

     uint8_t fwd_bit_count;
     uint8_t fwd_bit_count;

-    uint8_t *dest = BigBuf_get_addr();
-    int m=0, i=0;

 
     //If password mode do login
     if (PwdMode == 1) EM4xLogin(Pwd);
 
     //If password mode do login
     if (PwdMode == 1) EM4xLogin(Pwd);


@@ -1906,9 +1900,6 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
     fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
     fwd_bit_count += Prepare_Addr( Address );
 
     fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
     fwd_bit_count += Prepare_Addr( Address );
 

-    m = BigBuf_max_traceLen();
-    // Clear destination buffer before sending the command
-    memset(dest, 128, m);

     // Connect the A/D to the peak-detected low-frequency path.
     SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
     // Now set up the SSC to get the ADC samples that are now streaming at us.
     // Connect the A/D to the peak-detected low-frequency path.
     SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
     // Now set up the SSC to get the ADC samples that are now streaming at us.


@@ -1924,10 +1915,12 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;

-            i++;
-            if (i >= m) break;
-        }
-    }
+                       ++i;
+                       if (i >= bufferlength) break;
+               }
+       }
+  
+       cmd_send(CMD_ACK,0,0,0,0,0);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
 }
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
 }