Fix some printf/scanf format strings

[proxmark3-svn] / armsrc / fpgaloader.h

diff --git a/armsrc/fpgaloader.h b/armsrc/fpgaloader.h
index 42f9ccc6ba3f9d447424ffc142d38a10cb111835..57e9c28a54a652c1670ce6d6267ff434b8a344ce 100644 (file)
--- a/armsrc/fpgaloader.h
+++ b/armsrc/fpgaloader.h
@@ -19,7 +19,7 @@
 void FpgaSendCommand(uint16_t cmd, uint16_t v);
 void FpgaWriteConfWord(uint16_t v);
 void FpgaDownloadAndGo(int bitstream_version);
 void FpgaSendCommand(uint16_t cmd, uint16_t v);
 void FpgaWriteConfWord(uint16_t v);
 void FpgaDownloadAndGo(int bitstream_version);

-void FpgaSetupSsc(uint8_t mode);
+void FpgaSetupSsc(uint16_t mode);

 void SetupSpi(int mode);
 bool FpgaSetupSscDma(uint8_t *buf, uint16_t sample_count);
 void Fpga_print_status();
 void SetupSpi(int mode);
 bool FpgaSetupSscDma(uint8_t *buf, uint16_t sample_count);
 void Fpga_print_status();


@@ -35,35 +35,37 @@ void SetAdcMuxFor(uint32_t whichGpio);
 #define FPGA_BITSTREAM_HF 2
 
 // Definitions for the FPGA commands.
 #define FPGA_BITSTREAM_HF 2
 
 // Definitions for the FPGA commands.

+#define FPGA_CMD_MASK                               0xF000

 // BOTH
 // BOTH

-#define FPGA_CMD_SET_CONFREG                        (1<<12)
+#define FPGA_CMD_SET_CONFREG                       (1<<12)

 // LF
 // LF

-#define FPGA_CMD_SET_DIVISOR                        (2<<12)
-#define FPGA_CMD_SET_USER_BYTE1                     (3<<12)
+#define FPGA_CMD_SET_DIVISOR                       (2<<12)
+#define FPGA_CMD_SET_EDGE_DETECT_THRESHOLD         (3<<12)

 // HF
 // HF

-#define FPGA_CMD_TRACE_ENABLE                       (2<<12)
+#define FPGA_CMD_TRACE_ENABLE                      (2<<12)

 
 // Definitions for the FPGA configuration word.
 
 // Definitions for the FPGA configuration word.

+#define FPGA_MAJOR_MODE_MASK                        0x01C0

 // LF
 // LF

-#define FPGA_MAJOR_MODE_LF_ADC                      (0<<5)
-#define FPGA_MAJOR_MODE_LF_EDGE_DETECT              (1<<5)
-#define FPGA_MAJOR_MODE_LF_PASSTHRU                 (2<<5)
+#define FPGA_MAJOR_MODE_LF_ADC                      (0<<6)
+#define FPGA_MAJOR_MODE_LF_EDGE_DETECT              (1<<6)
+#define FPGA_MAJOR_MODE_LF_PASSTHRU                 (2<<6)

 // HF
 // HF

-#define FPGA_MAJOR_MODE_HF_READER                   (0<<5)
-#define FPGA_MAJOR_MODE_HF_SIMULATOR                (1<<5)
-#define FPGA_MAJOR_MODE_HF_ISO14443A                (2<<5)
-#define FPGA_MAJOR_MODE_HF_SNOOP                    (3<<5)
-#define FPGA_MAJOR_MODE_HF_GET_TRACE                (4<<5)
+#define FPGA_MAJOR_MODE_HF_READER                   (0<<6)
+#define FPGA_MAJOR_MODE_HF_SIMULATOR                (1<<6)
+#define FPGA_MAJOR_MODE_HF_ISO14443A                (2<<6)
+#define FPGA_MAJOR_MODE_HF_SNOOP                    (3<<6)
+#define FPGA_MAJOR_MODE_HF_GET_TRACE                (4<<6)

 // BOTH
 // BOTH

-#define FPGA_MAJOR_MODE_OFF                         (7<<5)
+#define FPGA_MAJOR_MODE_OFF                         (7<<6)

 
 

+#define FPGA_MINOR_MODE_MASK                        0x003F

 // Options for LF_ADC
 #define FPGA_LF_ADC_READER_FIELD                    (1<<0)
 
 // Options for LF_EDGE_DETECT
 // Options for LF_ADC
 #define FPGA_LF_ADC_READER_FIELD                    (1<<0)
 
 // Options for LF_EDGE_DETECT

-#define FPGA_CMD_SET_EDGE_DETECT_THRESHOLD          FPGA_CMD_SET_USER_BYTE1

 #define FPGA_LF_EDGE_DETECT_READER_FIELD            (1<<0)
 #define FPGA_LF_EDGE_DETECT_READER_FIELD            (1<<0)

-#define FPGA_LF_EDGE_DETECT_TOGGLE_MODE             (1<<1)
+#define FPGA_LF_EDGE_DETECT_TOGGLE_MODE             (2<<0)

 
 // Options for the HF reader
 #define FPGA_HF_READER_MODE_RECEIVE_IQ              (0<<0)
 
 // Options for the HF reader
 #define FPGA_HF_READER_MODE_RECEIVE_IQ              (0<<0)


@@ -74,10 +76,11 @@ void SetAdcMuxFor(uint32_t whichGpio);
 #define FPGA_HF_READER_MODE_SNOOP_IQ                (5<<0)
 #define FPGA_HF_READER_MODE_SNOOP_AMPLITUDE         (6<<0)
 #define FPGA_HF_READER_MODE_SNOOP_PHASE             (7<<0)
 #define FPGA_HF_READER_MODE_SNOOP_IQ                (5<<0)
 #define FPGA_HF_READER_MODE_SNOOP_AMPLITUDE         (6<<0)
 #define FPGA_HF_READER_MODE_SNOOP_PHASE             (7<<0)

+#define FPGA_HF_READER_MODE_SEND_JAM                (8<<0)

 
 

-#define FPGA_HF_READER_SUBCARRIER_848_KHZ           (0<<3)
-#define FPGA_HF_READER_SUBCARRIER_424_KHZ           (1<<3)
-#define FPGA_HF_READER_SUBCARRIER_212_KHZ           (2<<3)
+#define FPGA_HF_READER_SUBCARRIER_848_KHZ           (0<<4)
+#define FPGA_HF_READER_SUBCARRIER_424_KHZ           (1<<4)
+#define FPGA_HF_READER_SUBCARRIER_212_KHZ           (2<<4)

 
 // Options for the HF simulated tag, how to modulate
 #define FPGA_HF_SIMULATOR_NO_MODULATION             (0<<0)
 
 // Options for the HF simulated tag, how to modulate
 #define FPGA_HF_SIMULATOR_NO_MODULATION             (0<<0)