static int downloaded_bitstream = FPGA_BITSTREAM_ERR;
// this is where the bitstreams are located in memory:
-extern uint8_t _binary_fpga_lf_bit_start, _binary_fpga_lf_bit_end;
-extern uint8_t _binary_fpga_hf_bit_start, _binary_fpga_hf_bit_end;
+extern uint8_t _binary_obj_fpga_all_bit_z_start, _binary_obj_fpga_all_bit_z_end;
+
static uint8_t *fpga_image_ptr = NULL;
+static uint32_t uncompressed_bytes_cnt;
static const uint8_t _bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
#define FPGA_BITSTREAM_FIXED_HEADER_SIZE sizeof(_bitparse_fixed_header)
-#define OUTPUT_BUFFER_LEN 80
+#define OUTPUT_BUFFER_LEN 80
+#define FPGA_INTERLEAVE_SIZE 288
//-----------------------------------------------------------------------------
// Set up the Serial Peripheral Interface as master
//-----------------------------------------------------------------------------
bool FpgaSetupSscDma(uint8_t *buf, int len)
{
- if (buf == NULL) {
- return false;
- }
+ if (buf == NULL) return false;
AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; // Disable DMA Transfer
AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) buf; // transfer to this memory address
AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) buf; // next transfer to same memory address
AT91C_BASE_PDC_SSC->PDC_RNCR = len; // ... with same number of bytes
AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN; // go!
-
- return true;
+
+ return true;
}
-uint8_t get_from_fpga_stream(z_streamp compressed_fpga_stream, uint8_t *output_buffer)
+//----------------------------------------------------------------------------
+// Uncompress (inflate) the FPGA data. Returns one decompressed byte with
+// each call.
+//----------------------------------------------------------------------------
+static int get_from_fpga_combined_stream(z_streamp compressed_fpga_stream, uint8_t *output_buffer)
{
if (fpga_image_ptr == compressed_fpga_stream->next_out) { // need more data
compressed_fpga_stream->next_out = output_buffer;
compressed_fpga_stream->avail_out = OUTPUT_BUFFER_LEN;
fpga_image_ptr = output_buffer;
int res = inflate(compressed_fpga_stream, Z_SYNC_FLUSH);
- // if (res != Z_OK && res != Z_STREAM_END) {
+ if (res != Z_OK)
Dbprintf("inflate returned: %d, %s", res, compressed_fpga_stream->msg);
- // }
+
+ if (res < 0)
+ return res;
}
- Dbprintf("get_from_fpga_stream() returns %02x", *fpga_image_ptr);
+ uncompressed_bytes_cnt++;
+
return *fpga_image_ptr++;
}
+//----------------------------------------------------------------------------
+// Undo the interleaving of several FPGA config files. FPGA config files
+// are combined into one big file:
+// 288 bytes from FPGA file 1, followed by 288 bytes from FGPA file 2, etc.
+//----------------------------------------------------------------------------
+static int get_from_fpga_stream(int bitstream_version, z_streamp compressed_fpga_stream, uint8_t *output_buffer)
+{
+ while((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % FPGA_BITSTREAM_MAX != (bitstream_version - 1)) {
+ // skip undesired data belonging to other bitstream_versions
+ get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer);
+ }
+
+ return get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer);
+
+}
+
static voidpf fpga_inflate_malloc(voidpf opaque, uInt items, uInt size)
{
- Dbprintf("zlib requested %d bytes", items*size);
return BigBuf_malloc(items*size);
}
static void fpga_inflate_free(voidpf opaque, voidpf address)
{
- Dbprintf("zlib wants to free memory");
- BigBuf_free_keep_EM();
+ BigBuf_free(); BigBuf_Clear_ext(false);
}
-void init_fpga_inflate(z_streamp compressed_fpga_stream, uint8_t *fpga_image_start, uint32_t fpga_image_size, uint8_t *output_buffer)
+//----------------------------------------------------------------------------
+// Initialize decompression of the respective (HF or LF) FPGA stream
+//----------------------------------------------------------------------------
+static bool reset_fpga_stream(int bitstream_version, z_streamp compressed_fpga_stream, uint8_t *output_buffer)
{
+ uint8_t header[FPGA_BITSTREAM_FIXED_HEADER_SIZE];
+
+ uncompressed_bytes_cnt = 0;
+
// initialize z_stream structure for inflate:
- compressed_fpga_stream->next_in = fpga_image_start;
- compressed_fpga_stream->avail_in = fpga_image_size;
+ compressed_fpga_stream->next_in = &_binary_obj_fpga_all_bit_z_start;
+ compressed_fpga_stream->avail_in = &_binary_obj_fpga_all_bit_z_start - &_binary_obj_fpga_all_bit_z_end;
compressed_fpga_stream->next_out = output_buffer;
compressed_fpga_stream->avail_out = OUTPUT_BUFFER_LEN;
compressed_fpga_stream->zalloc = &fpga_inflate_malloc;
compressed_fpga_stream->zfree = &fpga_inflate_free;
- // initialize inflate to automatically detect header:
- int res = inflateInit2(compressed_fpga_stream, 15+32);
+ inflateInit2(compressed_fpga_stream, 0);
fpga_image_ptr = output_buffer;
-
- Dbprintf("InflateInit returned %d", res);
- Dbprintf("fpga_image_ptr pointing at %02x %02x %02x %02x", fpga_image_ptr[0], fpga_image_ptr[1], fpga_image_ptr[2], fpga_image_ptr[3]);
- Dbprintf("zstream->next_in pointing at %02x %02x %02x %02x", compressed_fpga_stream->next_in[0], compressed_fpga_stream->next_in[1], compressed_fpga_stream->next_in[2], compressed_fpga_stream->next_in[3]);
-}
-
-
-bool reset_fpga_stream(int bitstream_version, z_streamp compressed_fpga_stream, uint8_t *output_buffer)
-{
- uint8_t header[FPGA_BITSTREAM_FIXED_HEADER_SIZE];
- uint8_t *fpga_image_start;
- uint32_t fpga_image_size;
-
- if (bitstream_version == FPGA_BITSTREAM_LF) {
- fpga_image_start = &_binary_fpga_lf_bit_start;
- fpga_image_size = (uint32_t)&_binary_fpga_lf_bit_end - (uint32_t)&_binary_fpga_lf_bit_start;
- } else if (bitstream_version == FPGA_BITSTREAM_HF) {
- fpga_image_start = &_binary_fpga_hf_bit_start;
- fpga_image_size = (uint32_t)&_binary_fpga_hf_bit_end - (uint32_t)&_binary_fpga_hf_bit_start;
- } else {
- return false;
- }
-
- init_fpga_inflate(compressed_fpga_stream, fpga_image_start, fpga_image_size, output_buffer);
for (uint16_t i = 0; i < FPGA_BITSTREAM_FIXED_HEADER_SIZE; i++) {
- header[i] = get_from_fpga_stream(compressed_fpga_stream, output_buffer);
+ header[i] = get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer);
}
// Check for a valid .bit file (starts with _bitparse_fixed_header)
}
// Download the fpga image starting at current stream position with length FpgaImageLen bytes
-static void DownloadFPGA(int FpgaImageLen, z_streamp compressed_fpga_stream, uint8_t *output_buffer)
+static void DownloadFPGA(int bitstream_version, int FpgaImageLen, z_streamp compressed_fpga_stream, uint8_t *output_buffer)
{
- Dbprintf("Would have loaded FPGA");
- return;
+ //Dbprintf("DownloadFPGA(len: %d)", FpgaImageLen);
+
int i=0;
AT91C_BASE_PIOA->PIO_OER = GPIO_FPGA_ON;
return;
}
- while(FpgaImageLen-->0) {
- DownloadFPGA_byte(get_from_fpga_stream(compressed_fpga_stream, output_buffer));
+ for(i = 0; i < FpgaImageLen; i++) {
+ int b = get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer);
+ if (b < 0) {
+ Dbprintf("Error %d during FpgaDownload", b);
+ break;
+ }
+ DownloadFPGA_byte(b);
}
-
+
// continue to clock FPGA until ready signal goes high
i=100000;
while ( (i--) && ( !(AT91C_BASE_PIOA->PIO_PDSR & GPIO_FPGA_DONE ) ) ) {
* (big endian), <length> bytes content. Except for section 'e' which has 4 bytes
* length.
*/
-int bitparse_find_section(char section_name, unsigned int *section_length, z_streamp compressed_fpga_stream, uint8_t *output_buffer)
+static int bitparse_find_section(int bitstream_version, char section_name, unsigned int *section_length, z_streamp compressed_fpga_stream, uint8_t *output_buffer)
{
int result = 0;
#define MAX_FPGA_BIT_STREAM_HEADER_SEARCH 100 // maximum number of bytes to search for the requested section
uint16_t numbytes = 0;
while(numbytes < MAX_FPGA_BIT_STREAM_HEADER_SEARCH) {
- char current_name = get_from_fpga_stream(compressed_fpga_stream, output_buffer);
+ char current_name = get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer);
numbytes++;
unsigned int current_length = 0;
if(current_name < 'a' || current_name > 'e') {
switch(current_name) {
case 'e':
/* Four byte length field */
- current_length += get_from_fpga_stream(compressed_fpga_stream, output_buffer) << 24;
- current_length += get_from_fpga_stream(compressed_fpga_stream, output_buffer) << 16;
+ current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 24;
+ current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 16;
numbytes += 2;
default: /* Fall through, two byte length field */
- current_length += get_from_fpga_stream(compressed_fpga_stream, output_buffer) << 8;
- current_length += get_from_fpga_stream(compressed_fpga_stream, output_buffer) << 0;
+ current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 8;
+ current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 0;
numbytes += 2;
}
}
for (uint16_t i = 0; i < current_length && numbytes < MAX_FPGA_BIT_STREAM_HEADER_SEARCH; i++) {
- get_from_fpga_stream(compressed_fpga_stream, output_buffer);
+ get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer);
numbytes++;
}
}
}
-//-----------------------------------------------------------------------------
-// Find out which FPGA image format is stored in flash, then call DownloadFPGA
-// with the right parameters to download the image
-//-----------------------------------------------------------------------------
+//----------------------------------------------------------------------------
+// Check which FPGA image is currently loaded (if any). If necessary
+// decompress and load the correct (HF or LF) image to the FPGA
+//----------------------------------------------------------------------------
void FpgaDownloadAndGo(int bitstream_version)
{
z_stream compressed_fpga_stream;
- uint8_t output_buffer[OUTPUT_BUFFER_LEN];
+ uint8_t output_buffer[OUTPUT_BUFFER_LEN] = {0x00};
// check whether or not the bitstream is already loaded
if (downloaded_bitstream == bitstream_version)
return;
+ // make sure that we have enough memory to decompress
+ BigBuf_free(); BigBuf_Clear_ext(false);
+
if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer)) {
return;
}
-
+
unsigned int bitstream_length;
- if(bitparse_find_section('e', &bitstream_length, &compressed_fpga_stream, output_buffer)) {
- DownloadFPGA(bitstream_length, &compressed_fpga_stream, output_buffer);
+ if(bitparse_find_section(bitstream_version, 'e', &bitstream_length, &compressed_fpga_stream, output_buffer)) {
+ DownloadFPGA(bitstream_version, bitstream_length, &compressed_fpga_stream, output_buffer);
downloaded_bitstream = bitstream_version;
- return; /* All done */
}
+
+ inflateEnd(&compressed_fpga_stream);
+
+ // turn off antenna
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+
+ // free eventually allocated BigBuf memory
+ BigBuf_free(); BigBuf_Clear_ext(false);
}
+//-----------------------------------------------------------------------------
+// Gather version information from FPGA image. Needs to decompress the begin
+// of the respective (HF or LF) image.
+// Note: decompression makes use of (i.e. overwrites) BigBuf[]. It is therefore
+// advisable to call this only once and store the results for later use.
+//-----------------------------------------------------------------------------
void FpgaGatherVersion(int bitstream_version, char *dst, int len)
{
unsigned int fpga_info_len;
- char tempstr[40];
+ char tempstr[40] = {0x00};
z_stream compressed_fpga_stream;
- uint8_t output_buffer[OUTPUT_BUFFER_LEN];
+ uint8_t output_buffer[OUTPUT_BUFFER_LEN] = {0x00};
dst[0] = '\0';
-
- if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer)) {
+
+ // ensure that we can allocate enough memory for decompression:
+ BigBuf_free(); BigBuf_Clear_ext(false);
+
+ if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer))
return;
- }
- if(bitparse_find_section('a', &fpga_info_len, &compressed_fpga_stream, output_buffer)) {
+ if(bitparse_find_section(bitstream_version, 'a', &fpga_info_len, &compressed_fpga_stream, output_buffer)) {
for (uint16_t i = 0; i < fpga_info_len; i++) {
- char c = (char)get_from_fpga_stream(&compressed_fpga_stream, output_buffer);
+ char c = (char)get_from_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer);
if (i < sizeof(tempstr)) {
tempstr[i] = c;
}
strncat(dst, "HF ", len-1);
}
strncat(dst, "FPGA image built", len-1);
- if(bitparse_find_section('b', &fpga_info_len, &compressed_fpga_stream, output_buffer)) {
+ if(bitparse_find_section(bitstream_version, 'b', &fpga_info_len, &compressed_fpga_stream, output_buffer)) {
strncat(dst, " for ", len-1);
for (uint16_t i = 0; i < fpga_info_len; i++) {
- char c = (char)get_from_fpga_stream(&compressed_fpga_stream, output_buffer);
+ char c = (char)get_from_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer);
if (i < sizeof(tempstr)) {
tempstr[i] = c;
}
}
strncat(dst, tempstr, len-1);
}
- if(bitparse_find_section('c', &fpga_info_len, &compressed_fpga_stream, output_buffer)) {
+ if(bitparse_find_section(bitstream_version, 'c', &fpga_info_len, &compressed_fpga_stream, output_buffer)) {
strncat(dst, " on ", len-1);
for (uint16_t i = 0; i < fpga_info_len; i++) {
- char c = (char)get_from_fpga_stream(&compressed_fpga_stream, output_buffer);
+ char c = (char)get_from_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer);
if (i < sizeof(tempstr)) {
tempstr[i] = c;
}
}
strncat(dst, tempstr, len-1);
}
- if(bitparse_find_section('d', &fpga_info_len, &compressed_fpga_stream, output_buffer)) {
+ if(bitparse_find_section(bitstream_version, 'd', &fpga_info_len, &compressed_fpga_stream, output_buffer)) {
strncat(dst, " at ", len-1);
for (uint16_t i = 0; i < fpga_info_len; i++) {
- char c = (char)get_from_fpga_stream(&compressed_fpga_stream, output_buffer);
+ char c = (char)get_from_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer);
if (i < sizeof(tempstr)) {
tempstr[i] = c;
}
}
strncat(dst, tempstr, len-1);
}
+
+ strncat(dst, "\n", len-1);
+
+ inflateEnd(&compressed_fpga_stream);
}
HIGH(whichGpio);
}
+
+void Fpga_print_status(void) {
+ Dbprintf("Fgpa");
+ switch(downloaded_bitstream) {
+ case FPGA_BITSTREAM_HF: Dbprintf(" mode....................HF"); break;
+ case FPGA_BITSTREAM_LF: Dbprintf(" mode....................LF"); break;
+ default: Dbprintf(" mode....................%d", downloaded_bitstream); break;
+ }
+}
+
+int FpgaGetCurrent() {
+ return downloaded_bitstream;
+}
projects / proxmark3-svn / blobdiff