]> git.zerfleddert.de Git - proxmark3-svn/blobdiff - armsrc/appmain.c
THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams...
[proxmark3-svn] / armsrc / appmain.c
index b6c3220084dc2c3aaf8d898fd496206c2108b69c..b7bc87e70c631fe8be5c7901e0c96462f7292d32 100644 (file)
@@ -214,6 +214,7 @@ void MeasureAntennaTuning(void)
  * ( hopefully around 95 if it is tuned to 125kHz!)
  */
   
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
        for (i=255; i>19; i--) {
     WDT_HIT();
@@ -236,6 +237,7 @@ void MeasureAntennaTuning(void)
 
   LED_A_ON();
        // Let the FPGA drive the high-frequency antenna around 13.56 MHz.
+       FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
        SpinDelay(20);
        // Vref = 3300mV, and an 10:1 voltage divider on the input
@@ -264,6 +266,7 @@ void MeasureAntennaTuningHf(void)
 
        for (;;) {
                // Let the FPGA drive the high-frequency antenna around 13.56 MHz.
+               FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
                FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
                SpinDelay(20);
                // Vref = 3300mV, and an 10:1 voltage divider on the input
@@ -286,6 +289,7 @@ void SimulateTagHfListen(void)
 
        // We're using this mode just so that I can test it out; the simulated
        // tag mode would work just as well and be simpler.
+       FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP);
 
        // We need to listen to the high-frequency, peak-detected path.
@@ -365,6 +369,7 @@ void SendVersion(void)
 void SamyRun()
 {
        DbpString("Stand-alone mode! No PC necessary.");
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
 
        // 3 possible options? no just 2 for now
 #define OPTS 2
@@ -923,6 +928,7 @@ void UsbPacketReceived(uint8_t *packet, int len)
                        break;
 
                case CMD_SET_LF_DIVISOR:
+                       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
                        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, c->arg[0]);
                        break;
 
@@ -1017,7 +1023,8 @@ void  __attribute__((noreturn)) AppMain(void)
        AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
 
        // Load the FPGA image, which we have stored in our flash.
-       FpgaDownloadAndGo();
+       // (the HF version by default)
+       FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
 
        StartTickCount();
        
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