- fc_div_2 <= fc_div_2 + 1;
-
-(* clock_signal = "yes" *) reg adc_clk;
-always @(xcorr_is_848, ck_1356megb, fc_div_2)
-if (xcorr_is_848)
- // The subcarrier frequency is fc/16; we will sample at fc, so that
- // means the subcarrier is 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 ...
- adc_clk <= ck_1356megb;
-else
- // The subcarrier frequency is fc/32; we will sample at fc/2, and
- // the subcarrier will look identical.
- adc_clk <= fc_div_2;
-
-
+ fc_divider <= fc_divider + 1;
+wire fc_div2 = fc_divider[0];
+
+reg adc_clk;
+always @(ck_1356megb)
+ if (xcorr_is_848)
+ adc_clk <= ck_1356megb;
+ else
+ adc_clk <= fc_div2;
+