]> git.zerfleddert.de Git - proxmark3-svn/blobdiff - armsrc/lfops.c
updates to lf t55xx commands
[proxmark3-svn] / armsrc / lfops.c
index 188d7280f7deab98d763dc8198a180e0a2ed8c19..dd84aa8ee2b123121b8da0c14ff80bbc98cb1d68 100644 (file)
@@ -16,8 +16,7 @@
 #include "string.h"
 #include "lfdemod.h"
 #include "lfsampling.h"
 #include "string.h"
 #include "lfdemod.h"
 #include "lfsampling.h"
-#include "usb_cdc.h"
-
+#include "usb_cdc.h" //test
 
 /**
  * Function to do a modulation and then get samples.
 
 /**
  * Function to do a modulation and then get samples.
@@ -26,7 +25,7 @@
  * @param period_1
  * @param command
  */
  * @param period_1
  * @param command
  */
-void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
+void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint32_t period_1, uint8_t *command)
 {
 
        int divisor_used = 95; // 125 KHz
 {
 
        int divisor_used = 95; // 125 KHz
@@ -214,6 +213,8 @@ void ReadTItag(void)
        }
 }
 
        }
 }
 
+
+
 void WriteTIbyte(uint8_t b)
 {
        int i = 0;
 void WriteTIbyte(uint8_t b)
 {
        int i = 0;
@@ -310,11 +311,16 @@ void AcquireTiType(void)
        }
 }
 
        }
 }
 
+
+
+
 // arguments: 64bit data split into 32bit idhi:idlo and optional 16bit crc
 // if crc provided, it will be written with the data verbatim (even if bogus)
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 {
 // arguments: 64bit data split into 32bit idhi:idlo and optional 16bit crc
 // if crc provided, it will be written with the data verbatim (even if bogus)
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 {
+
+
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        if(crc == 0) {
                crc = update_crc16(crc, (idlo)&0xff);
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        if(crc == 0) {
                crc = update_crc16(crc, (idlo)&0xff);
@@ -399,14 +405,10 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
  #define OPEN_COIL()           HIGH(GPIO_SSC_DOUT)
 
        i = 0;
  #define OPEN_COIL()           HIGH(GPIO_SSC_DOUT)
 
        i = 0;
-       byte_t rx[sizeof(UsbCommand)]; // Storage for usb_read call in loop
        for(;;) {
                //wait until SSC_CLK goes HIGH
                while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
        for(;;) {
                //wait until SSC_CLK goes HIGH
                while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
-                       // Craig Young - Adding a usb_read() here to avoid abort on empty UsbCommand
-                       // My OS X client does this preventing simulation.
-                       // Performance hit should be non-existent since the read is only performed if usb_poll is true
-                       if(BUTTON_PRESS() || (usb_poll() && usb_read(rx,sizeof(UsbCommand)))) {
+                       if(BUTTON_PRESS() || (usb_poll_validate_length() )) {
                                DbpString("Stopped");
                                return;
                        }
                                DbpString("Stopped");
                                return;
                        }
@@ -766,7 +768,7 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
-       while(!BUTTON_PRESS()) {
+       while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
 
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
@@ -855,7 +857,7 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
-       while(!BUTTON_PRESS()) {
+       while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
 
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
@@ -946,7 +948,7 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
-       while(!BUTTON_PRESS()) {
+       while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
 
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
@@ -1005,7 +1007,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
-       while(!BUTTON_PRESS()) {
+       while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
                DoAcquisition_default(-1,true);
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
                DoAcquisition_default(-1,true);
@@ -1083,6 +1085,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 #define T55x7_MODULATION_FSK2a         0x00007000
 #define T55x7_MODULATION_MANCHESTER    0x00008000
 #define T55x7_MODULATION_BIPHASE       0x00010000
 #define T55x7_MODULATION_FSK2a         0x00007000
 #define T55x7_MODULATION_MANCHESTER    0x00008000
 #define T55x7_MODULATION_BIPHASE       0x00010000
+#define T55x7_MODULATION_DIPHASE       0x00018000
 #define T55x7_BITRATE_RF_8             0
 #define T55x7_BITRATE_RF_16            0x00040000
 #define T55x7_BITRATE_RF_32            0x00080000
 #define T55x7_BITRATE_RF_8             0
 #define T55x7_BITRATE_RF_16            0x00040000
 #define T55x7_BITRATE_RF_32            0x00080000
@@ -1117,21 +1120,38 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
  * Relevant times in microsecond
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
  * Relevant times in microsecond
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
+ * Q5 tags seems to have issues when these values changes. 
  */
 #define START_GAP 31*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (or 15fc)
 #define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (or 10fc)
 #define WRITE_0   18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
 #define WRITE_1   50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc)  432 for T55x7; 448 for E5550
  */
 #define START_GAP 31*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (or 15fc)
 #define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (or 10fc)
 #define WRITE_0   18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
 #define WRITE_1   50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc)  432 for T55x7; 448 for E5550
+#define READ_GAP  52*8 
+
+//  VALUES TAKEN FROM EM4x function: SendForward
+//  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
+//  WRITE_GAP = 128;       (16*8)
+//  WRITE_1   = 256 32*8;  (32*8) 
 
 
-#define T55xx_SAMPLES_SIZE      12000 // 32 x 32 x 10  (32 bit times numofblock (7), times clock skip..)
+//  These timings work for 4469/4269/4305 (with the 55*8 above)
+//  WRITE_0 = 23*8 , 9*8  SpinDelayUs(23*8); 
+
+// Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
+// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
+// Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
+// T0 = TIMER_CLOCK1 / 125000 = 192
+// 1 Cycle = 8 microseconds(us)  == 1 field clock
+
+void TurnReadLFOn(int delay) {
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+       // Give it a bit of time for the resonant antenna to settle.
+       SpinDelayUs(delay); //155*8 //50*8
+}
 
 // Write one bit to card
 
 // Write one bit to card
-void T55xxWriteBit(int bit)
-{
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+void T55xxWriteBit(int bit) {
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-       if (bit == 0)
+       if (!bit)
                SpinDelayUs(WRITE_0);
        else
                SpinDelayUs(WRITE_1);
                SpinDelayUs(WRITE_0);
        else
                SpinDelayUs(WRITE_1);
@@ -1140,147 +1160,167 @@ void T55xxWriteBit(int bit)
 }
 
 // Write one card block in page 0, no lock
 }
 
 // Write one card block in page 0, no lock
-void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
-{
+void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
+       LED_A_ON();
+       bool PwdMode = arg & 0x1;
+       uint8_t Page = (arg & 0x2)>>1;
        uint32_t i = 0;
 
        // Set up FPGA, 125kHz
        uint32_t i = 0;
 
        // Set up FPGA, 125kHz
-       // Wait for config.. (192+8190xPOW)x8 == 67ms
-       LFSetupFPGAForADC(0, true);
+       LFSetupFPGAForADC(95, true);
 
 
-       // Now start writting
+       // Trigger T55x7 in mode.
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);
 
-       // Opcode
+       // Opcode 10
        T55xxWriteBit(1);
        T55xxWriteBit(1);
-       T55xxWriteBit(0); //Page 0
-       if (PwdMode == 1){
-               // Pwd
+       T55xxWriteBit(Page); //Page 0
+       if (PwdMode){
+               // Send Pwd
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
        }
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
        }
-       // Lock bit
+       // Send Lock bit
        T55xxWriteBit(0);
 
        T55xxWriteBit(0);
 
-       // Data
+       // Send Data
        for (i = 0x80000000; i != 0; i >>= 1)
                T55xxWriteBit(Data & i);
 
        for (i = 0x80000000; i != 0; i >>= 1)
                T55xxWriteBit(Data & i);
 
-       // Block
+       // Send Block number
        for (i = 0x04; i != 0; i >>= 1)
                T55xxWriteBit(Block & i);
 
        for (i = 0x04; i != 0; i >>= 1)
                T55xxWriteBit(Block & i);
 
-       // Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
+       // Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
        // so wait a little more)
        // so wait a little more)
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-       SpinDelay(20);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-}
+       TurnReadLFOn(20 * 1000);
+               //could attempt to do a read to confirm write took
+               // as the tag should repeat back the new block 
+               // until it is reset, but to confirm it we would 
+               // need to know the current block 0 config mode
 
 
-void TurnReadLFOn(){
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-       // Give it a bit of time for the resonant antenna to settle.
-       SpinDelayUs(8*150);
+       // turn field off
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+       cmd_send(CMD_ACK,0,0,0,0,0);
+       LED_A_OFF();
 }
 
 }
 
-
 // Read one card block in page 0
 // Read one card block in page 0
-void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
-{
+void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
+       LED_A_ON();
+       bool PwdMode = arg0 & 0x1;
+       uint8_t Page = (arg0 & 0x2) >> 1;
        uint32_t i = 0;
        uint32_t i = 0;
-       uint8_t *dest = BigBuf_get_addr();
-       uint16_t bufferlength = BigBuf_max_traceLen();
-       if ( bufferlength > T55xx_SAMPLES_SIZE )
-               bufferlength = T55xx_SAMPLES_SIZE;
+       bool RegReadMode = (Block == 0xFF);
 
 
-       // Clear destination buffer before sending the command
-       memset(dest, 0x80, bufferlength);
+       //clear buffer now so it does not interfere with timing later
+       BigBuf_Clear_ext(false);
+
+       //make sure block is at max 7
+       Block &= 0x7;
 
        // Set up FPGA, 125kHz
 
        // Set up FPGA, 125kHz
-       // Wait for config.. (192+8190xPOW)x8 == 67ms
-       LFSetupFPGAForADC(0, true);
+       LFSetupFPGAForADC(95, true);
+  /*
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+       // Connect the A/D to the peak-detected low-frequency path.
+       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+
+       // Now set up the SSC to get the ADC samples that are now streaming at us.
+       FpgaSetpSsc();
+
+       // Give it a bit of time for the resonant antenna to settle.
+       //SpinDelayUs(8*200);  //192FC
+       SpinDelay(50);
+  */
+
+  // Trigger T55x7 Direct Access Mode
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);
 
-       // Opcode
+       // Opcode 10
        T55xxWriteBit(1);
        T55xxWriteBit(1);
-       T55xxWriteBit(0); //Page 0
-       if (PwdMode == 1){
-               // Pwd
+       T55xxWriteBit(Page); //Page 0
+
+       if (PwdMode){
+               // Send Pwd
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
        }
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
        }
-       // Lock bit
+       // Send a zero bit separation
        T55xxWriteBit(0);
        T55xxWriteBit(0);
-       // Block
-       for (i = 0x04; i != 0; i >>= 1)
-               T55xxWriteBit(Block & i);
+
+       // Send Block number (if direct access mode)
+       if (!RegReadMode)
+               for (i = 0x04; i != 0; i >>= 1)
+                       T55xxWriteBit(Block & i);               
 
        // Turn field on to read the response
 
        // Turn field on to read the response
-       TurnReadLFOn();
-       // Now do the acquisition
-       i = 0;
-       for(;;) {
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-                       AT91C_BASE_SSC->SSC_THR = 0x43;
-                       LED_D_ON();
-               }
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-                       dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                       i++;
-                       LED_D_OFF();
-                       if (i >= bufferlength) break;
-               }
-       }
+       TurnReadLFOn(READ_GAP);
 
 
-       cmd_send(CMD_ACK,0,0,0,0,0);    
+       // Acquisition
+       doT55x7Acquisition();
+
+       // Turn the field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-       LED_D_OFF();
+       cmd_send(CMD_ACK,0,0,0,0,0);    
+       LED_A_OFF();
 }
 
 }
 
+/*
 // Read card traceability data (page 1)
 void T55xxReadTrace(void){
 // Read card traceability data (page 1)
 void T55xxReadTrace(void){
-       
-       uint32_t i = 0;
-       uint8_t *dest = BigBuf_get_addr();
-       uint16_t bufferlength = BigBuf_max_traceLen();
-       if ( bufferlength > T55xx_SAMPLES_SIZE )
-               bufferlength= T55xx_SAMPLES_SIZE;
+       LED_A_ON();
 
 
-       // Clear destination buffer before sending the command
-       memset(dest, 0x80, bufferlength);
+       //clear buffer now so it does not interfere with timing later
+       BigBuf_Clear_ext(false);
+
+       // Set up FPGA, 125kHz
+       LFSetupFPGAForADC(95, true);
 
 
-       LFSetupFPGAForADC(0, true);
+  // Trigger T55x7 Direct Access Mode
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);
 
-       // Opcode
+       // Opcode 11
        T55xxWriteBit(1);
        T55xxWriteBit(1); //Page 1
 
        // Turn field on to read the response
        T55xxWriteBit(1);
        T55xxWriteBit(1); //Page 1
 
        // Turn field on to read the response
-       TurnReadLFOn();
-
-       // Now do the acquisition
-       for(;;) {
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-                       AT91C_BASE_SSC->SSC_THR = 0x43;
-                       LED_D_ON();
-               }
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-                       dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                       i++;
-                       LED_D_OFF();
+       TurnReadLFOn(READ_GAP);
 
 
-                       if (i >= bufferlength) break;
-               }
-       }
+       // Acquisition
+       doT55x7Acquisition();
 
 
+       // Turn the field off
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        cmd_send(CMD_ACK,0,0,0,0,0);
        cmd_send(CMD_ACK,0,0,0,0,0);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-       LED_D_OFF();
+       LED_A_OFF();
+}
+*/
+void T55xxWakeUp(uint32_t Pwd){
+       LED_B_ON();
+       uint32_t i = 0;
+       
+       // Set up FPGA, 125kHz
+       LFSetupFPGAForADC(95, true);
+       
+       // Trigger T55x7 Direct Access Mode
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+       SpinDelayUs(START_GAP);
+       
+       // Opcode 10
+       T55xxWriteBit(1);
+       T55xxWriteBit(0); //Page 0
+
+       // Send Pwd
+       for (i = 0x80000000; i != 0; i >>= 1)
+               T55xxWriteBit(Pwd & i);
+
+       // Turn and leave field on to let the begin repeating transmission
+       TurnReadLFOn(20*1000);
 }
 
 /*-------------- Cloning routines -----------*/
 }
 
 /*-------------- Cloning routines -----------*/
@@ -1499,8 +1539,11 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
                // Clock rate is stored in bits 8-15 of the card value
                clock = (card & 0xFF00) >> 8;
                Dbprintf("Clock rate: %d", clock);
                // Clock rate is stored in bits 8-15 of the card value
                clock = (card & 0xFF00) >> 8;
                Dbprintf("Clock rate: %d", clock);
-               switch (clock)
-               {
+               switch (clock) {
+               case 50:
+                       clock = T55x7_BITRATE_RF_50;
+               case 40:
+                       clock = T55x7_BITRATE_RF_40;
                case 32:
                        clock = T55x7_BITRATE_RF_32;
                        break;
                case 32:
                        clock = T55x7_BITRATE_RF_32;
                        break;
@@ -1580,271 +1623,6 @@ void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int
 
 }
 
 
 }
 
-
-#define abs(x) ( ((x)<0) ? -(x) : (x) )
-#define max(x,y) ( x<y ? y:x)
-
-int DemodPCF7931(uint8_t **outBlocks) {
-       uint8_t BitStream[256];
-       uint8_t Blocks[8][16];
-       uint8_t *GraphBuffer = BigBuf_get_addr();
-       int GraphTraceLen = BigBuf_max_traceLen();
-       int i, j, lastval, bitidx, half_switch;
-       int clock = 64;
-       int tolerance = clock / 8;
-       int pmc, block_done;
-       int lc, warnings = 0;
-       int num_blocks = 0;
-       int lmin=128, lmax=128;
-       uint8_t dir;
-
-       LFSetupFPGAForADC(95, true);
-       DoAcquisition_default(0, 0);
-
-
-       lmin = 64;
-       lmax = 192;
-
-       i = 2;
-
-       /* Find first local max/min */
-       if(GraphBuffer[1] > GraphBuffer[0]) {
-               while(i < GraphTraceLen) {
-                       if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)
-                               break;
-                       i++;
-               }
-               dir = 0;
-       }
-       else {
-               while(i < GraphTraceLen) {
-                       if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)
-                               break;
-                       i++;
-               }
-               dir = 1;
-       }
-
-       lastval = i++;
-       half_switch = 0;
-       pmc = 0;
-       block_done = 0;
-
-       for (bitidx = 0; i < GraphTraceLen; i++)
-       {
-               if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
-               {
-                       lc = i - lastval;
-                       lastval = i;
-
-                       // Switch depending on lc length:
-                       // Tolerance is 1/8 of clock rate (arbitrary)
-                       if (abs(lc-clock/4) < tolerance) {
-                               // 16T0
-                               if((i - pmc) == lc) { /* 16T0 was previous one */
-                                       /* It's a PMC ! */
-                                       i += (128+127+16+32+33+16)-1;
-                                       lastval = i;
-                                       pmc = 0;
-                                       block_done = 1;
-                               }
-                               else {
-                                       pmc = i;
-                               }
-                       } else if (abs(lc-clock/2) < tolerance) {
-                               // 32TO
-                               if((i - pmc) == lc) { /* 16T0 was previous one */
-                                       /* It's a PMC ! */
-                                       i += (128+127+16+32+33)-1;
-                                       lastval = i;
-                                       pmc = 0;
-                                       block_done = 1;
-                               }
-                               else if(half_switch == 1) {
-                                       BitStream[bitidx++] = 0;
-                                       half_switch = 0;
-                               }
-                               else
-                                       half_switch++;
-                       } else if (abs(lc-clock) < tolerance) {
-                               // 64TO
-                               BitStream[bitidx++] = 1;
-                       } else {
-                               // Error
-                               warnings++;
-                               if (warnings > 10)
-                               {
-                                       Dbprintf("Error: too many detection errors, aborting.");
-                                       return 0;
-                               }
-                       }
-
-                       if(block_done == 1) {
-                               if(bitidx == 128) {
-                                       for(j=0; j<16; j++) {
-                                               Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
-                                                               64*BitStream[j*8+6]+
-                                                               32*BitStream[j*8+5]+
-                                                               16*BitStream[j*8+4]+
-                                                               8*BitStream[j*8+3]+
-                                                               4*BitStream[j*8+2]+
-                                                               2*BitStream[j*8+1]+
-                                                               BitStream[j*8];
-                                       }
-                                       num_blocks++;
-                               }
-                               bitidx = 0;
-                               block_done = 0;
-                               half_switch = 0;
-                       }
-                       if(i < GraphTraceLen)
-                       {
-                               if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
-                               else dir = 1;
-                       }
-               }
-               if(bitidx==255)
-                       bitidx=0;
-               warnings = 0;
-               if(num_blocks == 4) break;
-       }
-       memcpy(outBlocks, Blocks, 16*num_blocks);
-       return num_blocks;
-}
-
-int IsBlock0PCF7931(uint8_t *Block) {
-       // Assume RFU means 0 :)
-       if((memcmp(Block, "\x00\x00\x00\x00\x00\x00\x00\x01", 8) == 0) && memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) // PAC enabled
-               return 1;
-       if((memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) && Block[7] == 0) // PAC disabled, can it *really* happen ?
-               return 1;
-       return 0;
-}
-
-int IsBlock1PCF7931(uint8_t *Block) {
-       // Assume RFU means 0 :)
-       if(Block[10] == 0 && Block[11] == 0 && Block[12] == 0 && Block[13] == 0)
-               if((Block[14] & 0x7f) <= 9 && Block[15] <= 9)
-                       return 1;
-
-       return 0;
-}
-
-#define ALLOC 16
-
-void ReadPCF7931() {
-       uint8_t Blocks[8][17];
-       uint8_t tmpBlocks[4][16];
-       int i, j, ind, ind2, n;
-       int num_blocks = 0;
-       int max_blocks = 8;
-       int ident = 0;
-       int error = 0;
-       int tries = 0;
-
-       memset(Blocks, 0, 8*17*sizeof(uint8_t));
-
-       do {
-               memset(tmpBlocks, 0, 4*16*sizeof(uint8_t));
-               n = DemodPCF7931((uint8_t**)tmpBlocks);
-               if(!n)
-                       error++;
-               if(error==10 && num_blocks == 0) {
-                       Dbprintf("Error, no tag or bad tag");
-                       return;
-               }
-               else if (tries==20 || error==10) {
-                       Dbprintf("Error reading the tag");
-                       Dbprintf("Here is the partial content");
-                       goto end;
-               }
-
-               for(i=0; i<n; i++)
-                       Dbprintf("(dbg) %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
-                                        tmpBlocks[i][0], tmpBlocks[i][1], tmpBlocks[i][2], tmpBlocks[i][3], tmpBlocks[i][4], tmpBlocks[i][5], tmpBlocks[i][6], tmpBlocks[i][7],
-                                       tmpBlocks[i][8], tmpBlocks[i][9], tmpBlocks[i][10], tmpBlocks[i][11], tmpBlocks[i][12], tmpBlocks[i][13], tmpBlocks[i][14], tmpBlocks[i][15]);
-               if(!ident) {
-                       for(i=0; i<n; i++) {
-                               if(IsBlock0PCF7931(tmpBlocks[i])) {
-                                       // Found block 0 ?
-                                       if(i < n-1 && IsBlock1PCF7931(tmpBlocks[i+1])) {
-                                               // Found block 1!
-                                               // \o/
-                                               ident = 1;
-                                               memcpy(Blocks[0], tmpBlocks[i], 16);
-                                               Blocks[0][ALLOC] = 1;
-                                               memcpy(Blocks[1], tmpBlocks[i+1], 16);
-                                               Blocks[1][ALLOC] = 1;
-                                               max_blocks = max((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
-                                               // Debug print
-                                               Dbprintf("(dbg) Max blocks: %d", max_blocks);
-                                               num_blocks = 2;
-                                               // Handle following blocks
-                                               for(j=i+2, ind2=2; j!=i; j++, ind2++, num_blocks++) {
-                                                       if(j==n) j=0;
-                                                       if(j==i) break;
-                                                       memcpy(Blocks[ind2], tmpBlocks[j], 16);
-                                                       Blocks[ind2][ALLOC] = 1;
-                                               }
-                                               break;
-                                       }
-                               }
-                       }
-               }
-               else {
-                       for(i=0; i<n; i++) { // Look for identical block in known blocks
-                               if(memcmp(tmpBlocks[i], "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 16)) { // Block is not full of 00
-                                       for(j=0; j<max_blocks; j++) {
-                                               if(Blocks[j][ALLOC] == 1 && !memcmp(tmpBlocks[i], Blocks[j], 16)) {
-                                                       // Found an identical block
-                                                       for(ind=i-1,ind2=j-1; ind >= 0; ind--,ind2--) {
-                                                               if(ind2 < 0)
-                                                                       ind2 = max_blocks;
-                                                               if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
-                                                                       // Dbprintf("Tmp %d -> Block %d", ind, ind2);
-                                                                       memcpy(Blocks[ind2], tmpBlocks[ind], 16);
-                                                                       Blocks[ind2][ALLOC] = 1;
-                                                                       num_blocks++;
-                                                                       if(num_blocks == max_blocks) goto end;
-                                                               }
-                                                       }
-                                                       for(ind=i+1,ind2=j+1; ind < n; ind++,ind2++) {
-                                                               if(ind2 > max_blocks)
-                                                                       ind2 = 0;
-                                                               if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
-                                                                       // Dbprintf("Tmp %d -> Block %d", ind, ind2);
-                                                                       memcpy(Blocks[ind2], tmpBlocks[ind], 16);
-                                                                       Blocks[ind2][ALLOC] = 1;
-                                                                       num_blocks++;
-                                                                       if(num_blocks == max_blocks) goto end;
-                                                               }
-                                                       }
-                                               }
-                                       }
-                               }
-                       }
-               }
-               tries++;
-               if (BUTTON_PRESS()) return;
-       } while (num_blocks != max_blocks);
- end:
-       Dbprintf("-----------------------------------------");
-       Dbprintf("Memory content:");
-       Dbprintf("-----------------------------------------");
-       for(i=0; i<max_blocks; i++) {
-               if(Blocks[i][ALLOC]==1)
-                       Dbprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
-                                        Blocks[i][0], Blocks[i][1], Blocks[i][2], Blocks[i][3], Blocks[i][4], Blocks[i][5], Blocks[i][6], Blocks[i][7],
-                                       Blocks[i][8], Blocks[i][9], Blocks[i][10], Blocks[i][11], Blocks[i][12], Blocks[i][13], Blocks[i][14], Blocks[i][15]);
-               else
-                       Dbprintf("<missing block %d>", i);
-       }
-       Dbprintf("-----------------------------------------");
-
-       return ;
-}
-
-
 //-----------------------------------
 // EM4469 / EM4305 routines
 //-----------------------------------
 //-----------------------------------
 // EM4469 / EM4305 routines
 //-----------------------------------
@@ -1956,14 +1734,8 @@ void SendForward(uint8_t fwd_bit_count) {
 
        LED_D_ON();
 
 
        LED_D_ON();
 
-       //Field on
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-       // Give it a bit of time for the resonant antenna to settle.
-       // And for the tag to fully power up
-       SpinDelay(150);
+       // Set up FPGA, 125kHz
+       LFSetupFPGAForADC(95, true);
 
        // force 1st mod pulse (start gap must be longer for 4305)
        fwd_bit_sz--; //prepare next bit modulation
 
        // force 1st mod pulse (start gap must be longer for 4305)
        fwd_bit_sz--; //prepare next bit modulation
@@ -2008,7 +1780,11 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 
        uint8_t fwd_bit_count;
        uint8_t *dest = BigBuf_get_addr();
 
        uint8_t fwd_bit_count;
        uint8_t *dest = BigBuf_get_addr();
-       int m=0, i=0;
+       uint16_t bufferlength = BigBuf_max_traceLen();
+       uint32_t i = 0;
+
+       // Clear destination buffer before sending the command
+       memset(dest, 0x80, bufferlength);
 
        //If password mode do login
        if (PwdMode == 1) EM4xLogin(Pwd);
 
        //If password mode do login
        if (PwdMode == 1) EM4xLogin(Pwd);
@@ -2017,9 +1793,6 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
        fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
        fwd_bit_count += Prepare_Addr( Address );
 
        fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
        fwd_bit_count += Prepare_Addr( Address );
 
-       m = BigBuf_max_traceLen();
-       // Clear destination buffer before sending the command
-       memset(dest, 128, m);
        // Connect the A/D to the peak-detected low-frequency path.
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        // Now set up the SSC to get the ADC samples that are now streaming at us.
        // Connect the A/D to the peak-detected low-frequency path.
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        // Now set up the SSC to get the ADC samples that are now streaming at us.
@@ -2036,10 +1809,11 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
                        i++;
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
                        i++;
-                       if (i >= m) break;
+                       if (i >= bufferlength) break;
                }
        }
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
                }
        }
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       cmd_send(CMD_ACK,0,0,0,0,0);
        LED_D_OFF();
 }
 
        LED_D_OFF();
 }
 
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