add: a experimental lualib, unstable.

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 13cf296712e4dc1aa81b974fc6b9082bca0b1552..70c6e33b93b3e46c0f15766abee4ed2f4577a8bc 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -37,15 +37,15 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
 
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
 

-       /* Make sure the tag is reset */
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       SpinDelay(2500);
+    /* Make sure the tag is reset */
+    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+    FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+    SpinDelay(2500);

 
        LFSetupFPGAForADC(sc.divisor, 1);
 
 
        LFSetupFPGAForADC(sc.divisor, 1);
 

-       // And a little more time for the tag to fully power up
-       SpinDelay(2000);
+    // And a little more time for the tag to fully power up
+    SpinDelay(2000);

 
     // now modulate the reader field
     while(*command != '\0' && *command != ' ') {
 
     // now modulate the reader field
     while(*command != '\0' && *command != ' ') {


@@ -72,8 +72,6 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
        DoAcquisition_config(false);
 }
 
        DoAcquisition_config(false);
 }
 

-
-

 /* blank r/w tag data stream
 ...0000000000000000 01111111
 1010101010101010101010101010101010101010101010101010101010101010
 /* blank r/w tag data stream
 ...0000000000000000 01111111
 1010101010101010101010101010101010101010101010101010101010101010


@@ -381,7 +379,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
     DbpString("Now use tiread to check");
 }
 
     DbpString("Now use tiread to check");
 }
 

-void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
+void SimulateTagLowFrequency(uint16_t period, uint32_t gap, uint8_t ledcontrol)

 {
     int i;
     uint8_t *tab = BigBuf_get_addr();
 {
     int i;
     uint8_t *tab = BigBuf_get_addr();


@@ -461,7 +459,7 @@ static void fc(int c, int *n)
         dest[((*n)++)]=0;
     }
   
         dest[((*n)++)]=0;
     }
   

-    // an fc/8  encoded bit is a bit pattern of  11000000  x6 = 48 samples
+    // an fc/8  encoded bit is a bit pattern of  11110000  x6 = 48 samples

     if(c==8) {
         for (idx=0; idx<6; idx++) {
             dest[((*n)++)]=1;
     if(c==8) {
         for (idx=0; idx<6; idx++) {
             dest[((*n)++)]=1;


@@ -475,7 +473,7 @@ static void fc(int c, int *n)
         }
     }
 
         }
     }
 

-    // an fc/10 encoded bit is a bit pattern of 1110000000 x5 = 50 samples
+    // an fc/10 encoded bit is a bit pattern of 1111100000 x5 = 50 samples

     if(c==10) {
         for (idx=0; idx<5; idx++) {
             dest[((*n)++)]=1;
     if(c==10) {
         for (idx=0; idx<5; idx++) {
             dest[((*n)++)]=1;


@@ -492,52 +490,33 @@ static void fc(int c, int *n)
     }
 }
 // compose fc/X fc/Y waveform (FSKx)
     }
 }
 // compose fc/X fc/Y waveform (FSKx)

-static void fcAll(uint8_t c, int *n, uint8_t clock, uint16_t *modCnt) 
+static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt) 

 {
     uint8_t *dest = BigBuf_get_addr();
 {
     uint8_t *dest = BigBuf_get_addr();

-    uint8_t idx;
-    uint8_t fcCnt;
-    // c = count of field clock for this bit
-    uint8_t mod = clock % c;
-    uint8_t modAdj = c/mod;
-    bool modAdjOk=FALSE;
-    if (c % mod==0) modAdjOk=TRUE;
+    uint8_t halfFC = fc/2;
+    uint8_t wavesPerClock = clock/fc;
+    uint8_t mod = clock % fc;    //modifier
+    uint8_t modAdj = fc/mod;     //how often to apply modifier
+    bool modAdjOk = !(fc % mod); //if (fc % mod==0) modAdjOk=TRUE;

     // loop through clock - step field clock
     // loop through clock - step field clock

-    for (idx=0; idx < (uint8_t) clock/c; idx++){
-        // loop through field clock length - put 1/2 FC length 1's and 1/2 0's per field clock wave (to create the wave)
-        for (fcCnt=0; fcCnt < c; fcCnt++){  //fudge slow transition from low to high - shorten wave by 1
-            if (fcCnt < c/2){
-                dest[((*n)++)]=0;
-            } else {
-                //fudge low to high transition
-                //if (idx==clock/c && dest[*n-1]==1 && mod>0) dest[((*n++))]=0;
-                //if (c==8 && fcCnt==5) continue; 
-                dest[((*n)++)]=1;   
-            }
-        }
+    for (uint8_t idx=0; idx < wavesPerClock; idx++){
+        // put 1/2 FC length 1's and 1/2 0's per field clock wave (to create the wave)
+        memset(dest+(*n), 0, fc-halfFC);  //in case of odd number use extra here
+        memset(dest+(*n)+(fc-halfFC), 1, halfFC);
+        *n += fc;

     }
     if (mod>0) (*modCnt)++;
     if ((mod>0) && modAdjOk){  //fsk2 
         if ((*modCnt % modAdj) == 0){ //if 4th 8 length wave in a rf/50 add extra 8 length wave
     }
     if (mod>0) (*modCnt)++;
     if ((mod>0) && modAdjOk){  //fsk2 
         if ((*modCnt % modAdj) == 0){ //if 4th 8 length wave in a rf/50 add extra 8 length wave

-            for (fcCnt=0; fcCnt < c; fcCnt++){  //fudge slow transition from low to high - shorten wave by 1
-                if (fcCnt < c/2){
-                    dest[((*n)++)]=0;
-                } else {
-                    //if (c==8 && fcCnt==5) continue; 
-                    dest[((*n)++)]=1;    
-                }
-            }       
+            memset(dest+(*n), 0, fc-halfFC);
+            memset(dest+(*n)+(fc-halfFC), 1, halfFC);
+            *n += fc;

         }
     }
         }
     }

-    //Dbprintf("mod: %d, modAdj %d, modc %d",mod, modAdj, c % mod);

     if (mod>0 && !modAdjOk){  //fsk1
     if (mod>0 && !modAdjOk){  //fsk1

-        for (idx=0; idx < mod; idx++){
-            if (idx < mod/2) {
-                dest[((*n)++)]=0;
-            } else {
-                dest[((*n)++)]=1;
-            }
-        }
+        memset(dest+(*n), 0, mod-(mod/2));
+        memset(dest+(*n)+(mod-(mod/2)), 1, mod/2);
+        *n += mod;

     }
 }
 
     }
 }
 


@@ -607,12 +586,9 @@ void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
     uint8_t fcHigh = arg1 >> 8;
     uint8_t fcLow = arg1 & 0xFF;
     uint16_t modCnt = 0;
     uint8_t fcHigh = arg1 >> 8;
     uint8_t fcLow = arg1 & 0xFF;
     uint16_t modCnt = 0;

-    //spacer bit

     uint8_t clk = arg2 & 0xFF;
     uint8_t invert = (arg2 >> 8) & 1;
     uint8_t clk = arg2 & 0xFF;
     uint8_t invert = (arg2 >> 8) & 1;

-    //fcAll(0, &n, clk);
-    
-    WDT_HIT();
+

     for (i=0; i<size; i++){
         if (BitStream[i] == invert){
             fcAll(fcLow, &n, clk, &modCnt);
     for (i=0; i<size; i++){
         if (BitStream[i] == invert){
             fcAll(fcLow, &n, clk, &modCnt);


@@ -621,42 +597,16 @@ void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
         }
     }
     Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d",fcHigh, fcLow, clk, invert, n);
         }
     }
     Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d",fcHigh, fcLow, clk, invert, n);

-     WDT_HIT();
-    /*Dbprintf("First 64:");
+    /*Dbprintf("DEBUG: First 32:");

     uint8_t *dest = BigBuf_get_addr();
     i=0;
     Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
     i+=16;
     Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
     uint8_t *dest = BigBuf_get_addr();
     i=0;
     Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
     i+=16;
     Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);

-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);

     */     
     if (ledcontrol)
         LED_A_ON();
     */     
     if (ledcontrol)
         LED_A_ON();

+

     SimulateTagLowFrequency(n, 0, ledcontrol);
 
     if (ledcontrol)
     SimulateTagLowFrequency(n, 0, ledcontrol);
 
     if (ledcontrol)


@@ -667,28 +617,15 @@ void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 static void askSimBit(uint8_t c, int *n, uint8_t clock, uint8_t manchester) 
 {
     uint8_t *dest = BigBuf_get_addr();
 static void askSimBit(uint8_t c, int *n, uint8_t clock, uint8_t manchester) 
 {
     uint8_t *dest = BigBuf_get_addr();

-    uint8_t idx;
+    uint8_t halfClk = clock/2;

     // c = current bit 1 or 0
     // c = current bit 1 or 0

-    int i = 0;
-    // for when we want a separator
-    if (c==2) { //separator
-        for (i=0; i<clock/2; i++){
-            dest[((*n)++)]=0;
-        }
+    if (manchester){
+        memset(dest+(*n), c, halfClk);
+        memset(dest+(*n) + halfClk, c^1, halfClk);

     } else {
     } else {

-        if (manchester){
-            for (idx=0; idx < (uint8_t) clock/2; idx++){
-                dest[((*n)++)]=c;    
-            }
-            for (idx=0; idx < (uint8_t) clock/2; idx++){
-                dest[((*n)++)]=c^1;    
-            }
-        } else {
-            for (idx=0; idx < (uint8_t) clock; idx++){
-                dest[((*n)++)]=c;    
-            }
-        }        
+        memset(dest+(*n), c, clock);

     }
     }

+    *n += clock;        

 }
 
 // args clock, ask/man or askraw, invert, transmission separator
 }
 
 // args clock, ask/man or askraw, invert, transmission separator


@@ -703,24 +640,25 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
     for (i=0; i<size; i++){
         askSimBit(BitStream[i]^invert, &n, clk, manchester);
     }
     for (i=0; i<size; i++){
         askSimBit(BitStream[i]^invert, &n, clk, manchester);
     }

-    if (separator==1) Dbprintf("sorry but separator option not yet available"); //askSimBit(2, &n, clk, manchester);
+    if (manchester==0 && BitStream[0]==BitStream[size-1]){ //run a second set inverted (for biphase phase)
+        for (i=0; i<size; i++){
+            askSimBit(BitStream[i]^invert^1, &n, clk, manchester);
+        }    
+    }
+    if (separator==1) Dbprintf("sorry but separator option not yet available"); 

 
     Dbprintf("Simulating with clk: %d, invert: %d, manchester: %d, separator: %d, n: %d",clk, invert, manchester, separator, n);
     //DEBUG
 
     Dbprintf("Simulating with clk: %d, invert: %d, manchester: %d, separator: %d, n: %d",clk, invert, manchester, separator, n);
     //DEBUG

-    //Dbprintf("First 64:");
+    //Dbprintf("First 32:");

     //uint8_t *dest = BigBuf_get_addr();
     //i=0;
     //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
     //i+=16;
     //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
     //uint8_t *dest = BigBuf_get_addr();
     //i=0;
     //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
     //i+=16;
     //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);

-    //i+=16;
-    //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    //i+=16;
-    //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-

 
     if (ledcontrol)
         LED_A_ON();
 
     if (ledcontrol)
         LED_A_ON();

+    

     SimulateTagLowFrequency(n, 0, ledcontrol);
 
     if (ledcontrol)
     SimulateTagLowFrequency(n, 0, ledcontrol);
 
     if (ledcontrol)


@@ -731,27 +669,22 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 static void pskSimBit(uint8_t waveLen, int *n, uint8_t clk, uint8_t *curPhase, bool phaseChg)
 {
     uint8_t *dest = BigBuf_get_addr();
 static void pskSimBit(uint8_t waveLen, int *n, uint8_t clk, uint8_t *curPhase, bool phaseChg)
 {
     uint8_t *dest = BigBuf_get_addr();

-    uint8_t idx;
+    uint8_t halfWave = waveLen/2;
+    //uint8_t idx;

     int i = 0;
     if (phaseChg){
         // write phase change
     int i = 0;
     if (phaseChg){
         // write phase change

-        for (idx=0; idx < waveLen/2; idx++){
-            dest[((*n)++)] = *curPhase^1;
-        }
-        for (idx=0; idx < waveLen/2; idx++){
-            dest[((*n)++)] = *curPhase;
-        }
+        memset(dest+(*n), *curPhase^1, halfWave);
+        memset(dest+(*n) + halfWave, *curPhase, halfWave);
+        *n += waveLen;

         *curPhase ^= 1;
         *curPhase ^= 1;

-        i+=waveLen;
+        i += waveLen;

     }
     //write each normal clock wave for the clock duration
     for (; i < clk; i+=waveLen){
     }
     //write each normal clock wave for the clock duration
     for (; i < clk; i+=waveLen){

-        for (idx=0; idx<waveLen/2; idx++){
-            dest[((*n)++)] = *curPhase;
-        }
-        for (idx=0; idx<waveLen/2; idx++){
-            dest[((*n)++)] = *curPhase^1;
-        }
+        memset(dest+(*n), *curPhase, halfWave);
+        memset(dest+(*n) + halfWave, *curPhase^1, halfWave);
+        *n += waveLen;

     }
 }
 
     }
 }
 


@@ -763,9 +696,6 @@ void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
     uint8_t clk = arg1 >> 8;
     uint8_t carrier = arg1 & 0xFF;
     uint8_t invert = arg2 & 0xFF;
     uint8_t clk = arg1 >> 8;
     uint8_t carrier = arg1 & 0xFF;
     uint8_t invert = arg2 & 0xFF;

-    //uint8_t phase = carrier/2; //extra phase changing bits = 1/2 a carrier wave to change the phase
-    //uint8_t invert = (arg2 >> 8) & 1;
-    WDT_HIT();

     uint8_t curPhase = 0;
     for (i=0; i<size; i++){
         if (BitStream[i] == curPhase){
     uint8_t curPhase = 0;
     for (i=0; i<size; i++){
         if (BitStream[i] == curPhase){


@@ -775,25 +705,12 @@ void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
         }            
     }
     Dbprintf("Simulating with Carrier: %d, clk: %d, invert: %d, n: %d",carrier, clk, invert, n);
         }            
     }
     Dbprintf("Simulating with Carrier: %d, clk: %d, invert: %d, n: %d",carrier, clk, invert, n);

-    WDT_HIT();
-    Dbprintf("First 128:");
-    uint8_t *dest = BigBuf_get_addr();
-    i=0;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-    i+=16;
-    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
+    //Dbprintf("DEBUG: First 32:");
+    //uint8_t *dest = BigBuf_get_addr();
+    //i=0;
+    //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
+    //i+=16;
+    //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);

            
     if (ledcontrol)
         LED_A_ON();
            
     if (ledcontrol)
         LED_A_ON();


@@ -820,7 +737,7 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);

-               // FSK demodulator
+        // FSK demodulator

         size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
                idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
         
         size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
                idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
         


@@ -909,7 +826,7 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);
         if (ledcontrol) LED_A_ON();
 
                DoAcquisition_default(-1,true);

-               size  = BigBuf_max_traceLen();
+        size  = BigBuf_max_traceLen();

         //Dbprintf("DEBUG: Buffer got");
                //askdemod and manchester decode
                errCnt = askmandemod(dest, &size, &clk, &invert, maxErr);
         //Dbprintf("DEBUG: Buffer got");
                //askdemod and manchester decode
                errCnt = askmandemod(dest, &size, &clk, &invert, maxErr);


@@ -962,7 +879,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
                DoAcquisition_default(-1,true);
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
                DoAcquisition_default(-1,true);

-               //fskdemod and get start index
+        //fskdemod and get start index

         WDT_HIT();
         idx = IOdemodFSK(dest, BigBuf_max_traceLen());
         if (idx>0){
         WDT_HIT();
         idx = IOdemodFSK(dest, BigBuf_max_traceLen());
         if (idx>0){


@@ -1071,10 +988,20 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
  */
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
  */

-#define START_GAP 250
-#define WRITE_GAP 160
-#define WRITE_0   144 // 192
-#define WRITE_1   400 // 432 for T55x7; 448 for E5550
+#define START_GAP 30*8 // 10 - 50fc 250
+#define WRITE_GAP 20*8 //  8 - 30fc
+#define WRITE_0   24*8 // 16 - 31fc 24fc 192
+#define WRITE_1   54*8 // 48 - 63fc 54fc 432 for T55x7; 448 for E5550
+
+//  VALUES TAKEN FROM EM4x function: SendForward
+//  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
+//  WRITE_GAP = 128;       (16*8)
+//  WRITE_1   = 256 32*8;  (32*8) 
+
+//  These timings work for 4469/4269/4305 (with the 55*8 above)
+//  WRITE_0 = 23*8 , 9*8  SpinDelayUs(23*8); 
+
+#define T55xx_SAMPLES_SIZE             12000 // 32 x 32 x 10  (32 bit times numofblock (7), times clock skip..)

 
 // Write one bit to card
 void T55xxWriteBit(int bit)
 
 // Write one bit to card
 void T55xxWriteBit(int bit)


@@ -1082,7 +1009,7 @@ void T55xxWriteBit(int bit)
     FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
     FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
     FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
     FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
     FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
     FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

-    if (bit == 0)
+       if (!bit)

         SpinDelayUs(WRITE_0);
     else
         SpinDelayUs(WRITE_1);
         SpinDelayUs(WRITE_0);
     else
         SpinDelayUs(WRITE_1);


@@ -1093,16 +1020,11 @@ void T55xxWriteBit(int bit)
 // Write one card block in page 0, no lock
 void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
 // Write one card block in page 0, no lock
 void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {

-    //unsigned int i;  //enio adjustment 12/10/14
-    uint32_t i;
+       uint32_t i = 0;

 
 

-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+       // Set up FPGA, 125kHz
+       // Wait for config.. (192+8190xPOW)x8 == 67ms
+       LFSetupFPGAForADC(0, true);

 
     // Now start writting
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 
     // Now start writting
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);


@@ -1138,27 +1060,17 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
 // Read one card block in page 0
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
 // Read one card block in page 0
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {

+    uint32_t i = 0;

     uint8_t *dest = BigBuf_get_addr();
     uint8_t *dest = BigBuf_get_addr();

-    //int m=0, i=0; //enio adjustment 12/10/14
-    uint32_t m=0, i=0;
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    m = BigBuf_max_traceLen();
-    // Clear destination buffer before sending the command
-    memset(dest, 128, m);
-    // Connect the A/D to the peak-detected low-frequency path.
-    SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();
-
-    LED_D_ON();
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
-
-    // Now start writting
+    uint16_t bufferlength = BigBuf_max_traceLen();
+       if ( bufferlength > T55xx_SAMPLES_SIZE )
+               bufferlength = T55xx_SAMPLES_SIZE;
+
+       memset(dest, 0x80, bufferlength);
+       
+       // Set up FPGA, 125kHz
+       // Wait for config.. (192+8190xPOW)x8 == 67ms
+       LFSetupFPGAForADC(0, true);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 


@@ -1177,53 +1089,40 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
         T55xxWriteBit(Block & i);
 
     // Turn field on to read the response
         T55xxWriteBit(Block & i);
 
     // Turn field on to read the response

-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+       TurnReadLFOn();

 
     // Now do the acquisition
     i = 0;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;
 
     // Now do the acquisition
     i = 0;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;

+                       LED_D_ON();

         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;

-            // we don't care about actual value, only if it's more or less than a
-            // threshold essentially we capture zero crossings for later analysis
-            //                 if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
-            i++;
-            if (i >= m) break;
+                       ++i;
+                       LED_D_OFF();
+                       if (i >= bufferlength) break;

         }
     }
 
         }
     }
 

+       cmd_send(CMD_ACK,0,0,0,0,0);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();

-    DbpString("DONE!");

 }
 
 // Read card traceability data (page 1)
 void T55xxReadTrace(void){
 }
 
 // Read card traceability data (page 1)
 void T55xxReadTrace(void){

-    uint8_t *dest = BigBuf_get_addr();
-    int m=0, i=0;
-
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    m = BigBuf_max_traceLen();
-    // Clear destination buffer before sending the command
-    memset(dest, 128, m);
-    // Connect the A/D to the peak-detected low-frequency path.
-    SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();

 
 

-    LED_D_ON();
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+       uint32_t i = 0;
+    uint8_t *dest = BigBuf_get_addr();
+    uint16_t bufferlength = BigBuf_max_traceLen();
+       if ( bufferlength > T55xx_SAMPLES_SIZE )
+               bufferlength = T55xx_SAMPLES_SIZE;

 
 

-    // Now start writting
+       memset(dest, 0x80, bufferlength);  
+  
+       LFSetupFPGAForADC(0, true);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 


@@ -1232,25 +1131,34 @@ void T55xxReadTrace(void){
     T55xxWriteBit(1); //Page 1
 
     // Turn field on to read the response
     T55xxWriteBit(1); //Page 1
 
     // Turn field on to read the response

-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+       TurnReadLFOn();

 
     // Now do the acquisition
 
     // Now do the acquisition

-    i = 0;

     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;

+                       LED_D_ON();

         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;

-            i++;
-            if (i >= m) break;
-        }
-    }
-
+                       ++i;
+                       LED_D_OFF();
+               
+                       if (i >= bufferlength) break;
+               }
+       }
+  
+       cmd_send(CMD_ACK,0,0,0,0,0);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();

-    DbpString("DONE!");
+}
+
+void TurnReadLFOn(){
+       //FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+       // Give it a bit of time for the resonant antenna to settle.
+       //SpinDelay(30);
+       SpinDelayUs(9*150);

 }
 
 /*-------------- Cloning routines -----------*/
 }
 
 /*-------------- Cloning routines -----------*/


@@ -1555,9 +1463,10 @@ void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int
 #define max(x,y) ( x<y ? y:x)
 
 int DemodPCF7931(uint8_t **outBlocks) {
 #define max(x,y) ( x<y ? y:x)
 
 int DemodPCF7931(uint8_t **outBlocks) {

-    uint8_t BitStream[256];
-    uint8_t Blocks[8][16];
-    uint8_t *GraphBuffer = BigBuf_get_addr();
+
+    uint8_t BitStream[256] = {0x00};
+       uint8_t Blocks[8][16];
+    uint8_t *dest = BigBuf_get_addr();

     int GraphTraceLen = BigBuf_max_traceLen();
     int i, j, lastval, bitidx, half_switch;
     int clock = 64;
     int GraphTraceLen = BigBuf_max_traceLen();
     int i, j, lastval, bitidx, half_switch;
     int clock = 64;


@@ -1569,8 +1478,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
     uint8_t dir;
 
        LFSetupFPGAForADC(95, true);
     uint8_t dir;
 
        LFSetupFPGAForADC(95, true);

-       DoAcquisition_default(0, 0);
-
+       DoAcquisition_default(0, true);

 
     lmin = 64;
     lmax = 192;
 
     lmin = 64;
     lmax = 192;


@@ -1578,9 +1486,9 @@ int DemodPCF7931(uint8_t **outBlocks) {
     i = 2;
 
     /* Find first local max/min */
     i = 2;
 
     /* Find first local max/min */

-    if(GraphBuffer[1] > GraphBuffer[0]) {
+    if(dest[1] > dest[0]) {

         while(i < GraphTraceLen) {
         while(i < GraphTraceLen) {

-            if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)
+            if( !(dest[i] > dest[i-1]) && dest[i] > lmax)

                 break;
             i++;
         }
                 break;
             i++;
         }


@@ -1588,7 +1496,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
     }
     else {
         while(i < GraphTraceLen) {
     }
     else {
         while(i < GraphTraceLen) {

-            if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)
+            if( !(dest[i] < dest[i-1]) && dest[i] < lmin)

                 break;
             i++;
         }
                 break;
             i++;
         }


@@ -1602,7 +1510,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
 
     for (bitidx = 0; i < GraphTraceLen; i++)
     {
 
     for (bitidx = 0; i < GraphTraceLen; i++)
     {

-        if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
+        if ( (dest[i-1] > dest[i] && dir == 1 && dest[i] > lmax) || (dest[i-1] < dest[i] && dir == 0 && dest[i] < lmin))

         {
             lc = i - lastval;
             lastval = i;
         {
             lc = i - lastval;
             lastval = i;


@@ -1669,7 +1577,7 @@ int DemodPCF7931(uint8_t **outBlocks) {
             }
             if(i < GraphTraceLen)
             {
             }
             if(i < GraphTraceLen)
             {

-                if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
+                if (dest[i-1] > dest[i]) dir=0;

                 else dir = 1;
             }
         }
                 else dir = 1;
             }
         }


@@ -1976,9 +1884,14 @@ void EM4xLogin(uint32_t Password) {
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 

+       uint8_t *dest =  BigBuf_get_addr();
+       uint16_t bufferlength = BigBuf_max_traceLen();
+       uint32_t i = 0;
+
+       // Clear destination buffer before sending the command  0x80 = average.
+       memset(dest, 0x80, bufferlength);
+       

     uint8_t fwd_bit_count;
     uint8_t fwd_bit_count;

-    uint8_t *dest = BigBuf_get_addr();
-    int m=0, i=0;

 
     //If password mode do login
     if (PwdMode == 1) EM4xLogin(Pwd);
 
     //If password mode do login
     if (PwdMode == 1) EM4xLogin(Pwd);


@@ -1987,9 +1900,6 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
     fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
     fwd_bit_count += Prepare_Addr( Address );
 
     fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
     fwd_bit_count += Prepare_Addr( Address );
 

-    m = BigBuf_max_traceLen();
-    // Clear destination buffer before sending the command
-    memset(dest, 128, m);

     // Connect the A/D to the peak-detected low-frequency path.
     SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
     // Now set up the SSC to get the ADC samples that are now streaming at us.
     // Connect the A/D to the peak-detected low-frequency path.
     SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
     // Now set up the SSC to get the ADC samples that are now streaming at us.


@@ -2005,10 +1915,12 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;

-            i++;
-            if (i >= m) break;
-        }
-    }
+                       ++i;
+                       if (i >= bufferlength) break;
+               }
+       }
+  
+       cmd_send(CMD_ACK,0,0,0,0,0);

     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
 }
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
 }