]> git.zerfleddert.de Git - proxmark3-svn/blobdiff - armsrc/lfops.c
minor code cleanup
[proxmark3-svn] / armsrc / lfops.c
index 0eb3503d0eb99d4ef967a9e5d9f84140d97ebc16..b9dbb8e27cdc386692cd58ad8923ae3d64d93f38 100644 (file)
 #include "hitag2.h"
 #include "crc16.h"
 #include "string.h"
+#include "lfdemod.h"
 
-void AcquireRawAdcSamples125k(int at134khz)
-{
-       if (at134khz)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-
-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-
-       // Give it a bit of time for the resonant antenna to settle.
-       SpinDelay(50);
 
-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
-
-       // Now call the acquisition routine
-       DoAcquisition125k();
-}
-
-// split into two routines so we can avoid timing issues after sending commands //
-void DoAcquisition125k(void)
+/**
+* Does the sample acquisition. If threshold is specified, the actual sampling
+* is not commenced until the threshold has been reached.
+* @param trigger_threshold - the threshold
+* @param silent - is true, now outputs are made. If false, dbprints the status
+*/
+void DoAcquisition125k_internal(int trigger_threshold,bool silent)
 {
        uint8_t *dest = (uint8_t *)BigBuf;
        int n = sizeof(BigBuf);
@@ -53,38 +38,95 @@ void DoAcquisition125k(void)
                }
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                       i++;
                        LED_D_OFF();
-                       if (i >= n) break;
+                       if (trigger_threshold != -1 && dest[i] < trigger_threshold)
+                               continue;
+                       else
+                               trigger_threshold = -1;
+                       if (++i >= n) break;
                }
        }
-       Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
-                       dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
+       if(!silent)
+       {
+               Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
+                   dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
+
+       }
+}
+/**
+* Perform sample aquisition.
+*/
+void DoAcquisition125k(int trigger_threshold)
+{
+       DoAcquisition125k_internal(trigger_threshold, false);
+}
+
+/**
+* Setup the FPGA to listen for samples. This method downloads the FPGA bitstream
+* if not already loaded, sets divisor and starts up the antenna.
+* @param divisor : 1, 88> 255 or negative ==> 134.8 KHz
+*                                 0 or 95 ==> 125 KHz
+*
+**/
+void LFSetupFPGAForADC(int divisor, bool lf_field)
+{
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       if ( (divisor == 1) || (divisor < 0) || (divisor > 255) )
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
+       else if (divisor == 0)
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       else
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);
+
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | (lf_field ? FPGA_LF_ADC_READER_FIELD : 0));
+
+       // Connect the A/D to the peak-detected low-frequency path.
+       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+       // Give it a bit of time for the resonant antenna to settle.
+       SpinDelay(50);
+       // Now set up the SSC to get the ADC samples that are now streaming at us.
+       FpgaSetupSsc();
+}
+/**
+* Initializes the FPGA, and acquires the samples.
+**/
+void AcquireRawAdcSamples125k(int divisor)
+{
+       LFSetupFPGAForADC(divisor, true);
+       // Now call the acquisition routine
+       DoAcquisition125k_internal(-1,false);
+}
+/**
+* Initializes the FPGA for snoop-mode, and acquires the samples.
+**/
+
+void SnoopLFRawAdcSamples(int divisor, int trigger_threshold)
+{
+       LFSetupFPGAForADC(divisor, false);
+       DoAcquisition125k(trigger_threshold);
 }
 
 void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
 {
-       int at134khz;
 
        /* Make sure the tag is reset */
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelay(2500);
 
+
+       int divisor_used = 95; // 125 KHz
        // see if 'h' was specified
-       if (command[strlen((char *) command) - 1] == 'h')
-               at134khz = TRUE;
-       else
-               at134khz = FALSE;
 
-       if (at134khz)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       if (command[strlen((char *) command) - 1] == 'h')
+               divisor_used = 88; // 134.8 KHz
 
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
 
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
        // Give it a bit of time for the resonant antenna to settle.
        SpinDelay(50);
+
        // And a little more time for the tag to fully power up
        SpinDelay(2000);
 
@@ -96,12 +138,9 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
                FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
                LED_D_OFF();
                SpinDelayUs(delay_off);
-               if (at134khz)
-                       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-               else
-                       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
 
-               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
                LED_D_ON();
                if(*(command++) == '0')
                        SpinDelayUs(period_0);
@@ -111,15 +150,12 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        LED_D_OFF();
        SpinDelayUs(delay_off);
-       if (at134khz)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
 
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // now do the read
-       DoAcquisition125k();
+       DoAcquisition125k(-1);
 }
 
 /* blank r/w tag data stream
@@ -137,15 +173,12 @@ void ReadTItag(void)
        // when we read a TI tag we sample the zerocross line at 2Mhz
        // TI tags modulate a 1 as 16 cycles of 123.2Khz
        // TI tags modulate a 0 as 16 cycles of 134.2Khz
      #define FSAMPLE 2000000
      #define FREQLO 123200
      #define FREQHI 134200
+ #define FSAMPLE 2000000
+ #define FREQLO 123200
+ #define FREQHI 134200
 
        signed char *dest = (signed char *)BigBuf;
        int n = sizeof(BigBuf);
-//     int *dest = GraphBuffer;
-//     int n = GraphTraceLen;
-
        // 128 bit shift register [shift3:shift2:shift1:shift0]
        uint32_t shift3 = 0, shift2 = 0, shift1 = 0, shift0 = 0;
 
@@ -156,6 +189,7 @@ void ReadTItag(void)
        uint32_t threshold = (sampleslo - sampleshi + 1)>>1;
 
        // TI tags charge at 134.2Khz
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
 
        // Place FPGA in passthrough mode, in this mode the CROSS_LO line
@@ -180,10 +214,10 @@ void ReadTItag(void)
 
                                // TI bits are coming to us lsb first so shift them
                                // right through our 128 bit right shift register
-                         shift0 = (shift0>>1) | (shift1 << 31);
-                         shift1 = (shift1>>1) | (shift2 << 31);
-                         shift2 = (shift2>>1) | (shift3 << 31);
-                         shift3 >>= 1;
+                               shift0 = (shift0>>1) | (shift1 << 31);
+                               shift1 = (shift1>>1) | (shift2 << 31);
+                               shift2 = (shift2>>1) | (shift3 << 31);
+                               shift3 >>= 1;
 
                                // check if the cycles fall close to the number
                                // expected for either the low or high frequency
@@ -218,18 +252,18 @@ void ReadTItag(void)
        if (cycles!=0xF0B) {
                DbpString("Info: No valid tag detected.");
        } else {
-         // put 64 bit data into shift1 and shift0
-         shift0 = (shift0>>24) | (shift1 << 8);
-         shift1 = (shift1>>24) | (shift2 << 8);
+               // put 64 bit data into shift1 and shift0
+               shift0 = (shift0>>24) | (shift1 << 8);
+               shift1 = (shift1>>24) | (shift2 << 8);
 
                // align 16 bit crc into lower half of shift2
-         shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff;
+               shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff;
 
                // if r/w tag, check ident match
-               if ( shift3&(1<<15) ) {
+               if (shift3 & (1<<15) ) {
                        DbpString("Info: TI tag is rewriteable");
                        // only 15 bits compare, last bit of ident is not valid
-                       if ( ((shift3>>16)^shift0)&0x7fff ) {
+                       if (((shift3 >> 16) ^ shift0) & 0x7fff ) {
                                DbpString("Error: Ident mismatch!");
                        } else {
                                DbpString("Info: TI tag ident is valid");
@@ -244,7 +278,7 @@ void ReadTItag(void)
                // calculate CRC
                uint32_t crc=0;
 
-               crc = update_crc16(crc, (shift0)&0xff);
+               crc = update_crc16(crc, (shift0)&0xff);
                crc = update_crc16(crc, (shift0>>8)&0xff);
                crc = update_crc16(crc, (shift0>>16)&0xff);
                crc = update_crc16(crc, (shift0>>24)&0xff);
@@ -254,7 +288,7 @@ void ReadTItag(void)
                crc = update_crc16(crc, (shift1>>24)&0xff);
 
                Dbprintf("Info: Tag data: %x%08x, crc=%x",
-                       (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
+                   (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
                if (crc != (shift2&0xffff)) {
                        Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc);
                } else {
@@ -293,7 +327,7 @@ void AcquireTiType(void)
        int i, j, n;
        // tag transmission is <20ms, sampling at 2M gives us 40K samples max
        // each sample is 1 bit stuffed into a uint32_t so we need 1250 uint32_t
      #define TIBUFLEN 1250
+ #define TIBUFLEN 1250
 
        // clear buffer
        memset(BigBuf,0,sizeof(BigBuf));
@@ -363,8 +397,9 @@ void AcquireTiType(void)
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 {
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        if(crc == 0) {
-               crc = update_crc16(crc, (idlo)&0xff);
+               crc = update_crc16(crc, (idlo)&0xff);
                crc = update_crc16(crc, (idlo>>8)&0xff);
                crc = update_crc16(crc, (idlo>>16)&0xff);
                crc = update_crc16(crc, (idlo>>24)&0xff);
@@ -374,7 +409,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
                crc = update_crc16(crc, (idhi>>24)&0xff);
        }
        Dbprintf("Writing to tag: %x%08x, crc=%x",
-               (unsigned int) idhi, (unsigned int) idlo, crc);
+           (unsigned int) idhi, (unsigned int) idlo, crc);
 
        // TI tags charge at 134.2Khz
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
@@ -433,17 +468,18 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
 {
        int i;
        uint8_t *tab = (uint8_t *)BigBuf;
-    
+
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
-    
+
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
-    
+
        AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
        AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
-    
+
 #define SHORT_COIL()   LOW(GPIO_SSC_DOUT)
 #define OPEN_COIL()            HIGH(GPIO_SSC_DOUT)
-    
+
        i = 0;
        for(;;) {
                while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
@@ -453,18 +489,18 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
                        }
                        WDT_HIT();
                }
-        
+
                if (ledcontrol)
                        LED_D_ON();
-        
+
                if(tab[i])
                        OPEN_COIL();
                else
                        SHORT_COIL();
-        
+
                if (ledcontrol)
                        LED_D_OFF();
-        
+
                while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
                        if(BUTTON_PRESS()) {
                                DbpString("Stopped");
@@ -472,7 +508,7 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
                        }
                        WDT_HIT();
                }
-        
+
                i++;
                if(i == period) {
                        i = 0;
@@ -592,220 +628,210 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
                LED_A_OFF();
 }
 
-
-// loop to capture raw HID waveform then FSK demodulate the TAG ID from it
+// loop to get raw HID waveform then FSK demodulate the TAG ID from it
 void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 {
        uint8_t *dest = (uint8_t *)BigBuf;
-       int m=0, n=0, i=0, idx=0, found=0, lastval=0;
+
+       size_t size=0; //, found=0;
        uint32_t hi2=0, hi=0, lo=0;
 
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
 
-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+       while(!BUTTON_PRESS()) {
 
-       // Give it a bit of time for the resonant antenna to settle.
-       SpinDelay(50);
+               WDT_HIT();
+               if (ledcontrol) LED_A_ON();
 
-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
+               DoAcquisition125k_internal(-1,true);
+               // FSK demodulator
+               size = HIDdemodFSK(dest, sizeof(BigBuf), &hi2, &hi, &lo);
 
-       for(;;) {
                WDT_HIT();
-               if (ledcontrol)
-                       LED_A_ON();
-               if(BUTTON_PRESS()) {
-                       DbpString("Stopped");
-                       if (ledcontrol)
-                               LED_A_OFF();
-                       return;
-               }
 
-               i = 0;
-               m = sizeof(BigBuf);
-               memset(dest,128,m);
-               for(;;) {
-                       if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
-                               AT91C_BASE_SSC->SSC_THR = 0x43;
-                               if (ledcontrol)
-                                       LED_D_ON();
-                       }
-                       if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
-                               dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                               // we don't care about actual value, only if it's more or less than a
-                               // threshold essentially we capture zero crossings for later analysis
-                               if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
-                               i++;
-                               if (ledcontrol)
-                                       LED_D_OFF();
-                               if(i >= m) {
-                                       break;
+               if (size>0 && lo>0){
+                       // final loop, go over previously decoded manchester data and decode into usable tag ID
+                       // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
+                       if (hi2 != 0){ //extra large HID tags
+                               Dbprintf("TAG ID: %x%08x%08x (%d)",
+                                   (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
+                       }else {  //standard HID tags <38 bits
+                               //Dbprintf("TAG ID: %x%08x (%d)",(unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF); //old print cmd
+                               uint8_t bitlen = 0;
+                               uint32_t fc = 0;
+                               uint32_t cardnum = 0;
+                               if (((hi>>5)&1) == 1){//if bit 38 is set then < 37 bit format is used
+                                       uint32_t lo2=0;
+                                       lo2=(((hi & 31) << 12) | (lo>>20)); //get bits 21-37 to check for format len bit
+                                       uint8_t idx3 = 1;
+                                       while(lo2 > 1){ //find last bit set to 1 (format len bit)
+                                               lo2=lo2 >> 1;
+                                               idx3++;
+                                       }
+                                       bitlen = idx3+19;
+                                       fc =0;
+                                       cardnum=0;
+                                       if(bitlen == 26){
+                                               cardnum = (lo>>1)&0xFFFF;
+                                               fc = (lo>>17)&0xFF;
+                                       }
+                                       if(bitlen == 37){
+                                               cardnum = (lo>>1)&0x7FFFF;
+                                               fc = ((hi&0xF)<<12)|(lo>>20);
+                                       }
+                                       if(bitlen == 34){
+                                               cardnum = (lo>>1)&0xFFFF;
+                                               fc= ((hi&1)<<15)|(lo>>17);
+                                       }
+                                       if(bitlen == 35){
+                                               cardnum = (lo>>1)&0xFFFFF;
+                                               fc = ((hi&1)<<11)|(lo>>21);
+                                       }
+                               }
+                               else { //if bit 38 is not set then 37 bit format is used
+                                       bitlen= 37;
+                                       fc =0;
+                                       cardnum=0;
+                                       if(bitlen==37){
+                                               cardnum = (lo>>1)&0x7FFFF;
+                                               fc = ((hi&0xF)<<12)|(lo>>20);
+                                       }
                                }
+                               //Dbprintf("TAG ID: %x%08x (%d)",
+                               // (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
+                               Dbprintf("TAG ID: %x%08x (%d) - Format Len: %dbit - FC: %d - Card: %d",
+                                   (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF,
+                                   (unsigned int) bitlen, (unsigned int) fc, (unsigned int) cardnum);
+                       }
+                       if (findone){
+                               if (ledcontrol) LED_A_OFF();
+                               return;
                        }
+                       // reset
+                       hi2 = hi = lo = 0;
                }
+               WDT_HIT();
+       }
+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();
+}
 
-               // FSK demodulator
+void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
+{
+       uint8_t *dest = (uint8_t *)BigBuf;
 
-               // sync to first lo-hi transition
-               for( idx=1; idx<m; idx++) {
-                       if (dest[idx-1]<dest[idx])
-                               lastval=idx;
-                               break;
-               }
-               WDT_HIT();
+       size_t size=0;
+       int clk=0, invert=0, errCnt=0;
+       uint64_t lo=0;
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
 
-               // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
-               // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere
-               // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
-               for( i=0; idx<m; idx++) {
-                       if (dest[idx-1]<dest[idx]) {
-                               dest[i]=idx-lastval;
-                               if (dest[i] <= 8) {
-                                               dest[i]=1;
-                               } else {
-                                               dest[i]=0;
-                               }
+       while(!BUTTON_PRESS()) {
 
-                               lastval=idx;
-                               i++;
-                       }
-               }
-               m=i;
+               WDT_HIT();
+               if (ledcontrol) LED_A_ON();
+
+               DoAcquisition125k_internal(-1,true);
+               size = sizeof(BigBuf);
+               //Dbprintf("DEBUG: Buffer got");
+               //askdemod and manchester decode
+               errCnt = askmandemod(dest, &size, &clk, &invert);
+               //Dbprintf("DEBUG: ASK Got");
                WDT_HIT();
 
-               // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns
-               lastval=dest[0];
-               idx=0;
-               i=0;
-               n=0;
-               for( idx=0; idx<m; idx++) {
-                       if (dest[idx]==lastval) {
-                               n++;
-                       } else {
-                               // a bit time is five fc/10 or six fc/8 cycles so figure out how many bits a pattern width represents,
-                               // an extra fc/8 pattern preceeds every 4 bits (about 200 cycles) just to complicate things but it gets
-                               // swallowed up by rounding
-                               // expected results are 1 or 2 bits, any more and it's an invalid manchester encoding
-                               // special start of frame markers use invalid manchester states (no transitions) by using sequences
-                               // like 111000
-                               if (dest[idx-1]) {
-                                       n=(n+1)/6;                      // fc/8 in sets of 6
-                               } else {
-                                       n=(n+1)/5;                      // fc/10 in sets of 5
-                               }
-                               switch (n) {                    // stuff appropriate bits in buffer
-                                       case 0:
-                                       case 1: // one bit
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       case 2: // two bits
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       case 3: // 3 bit start of frame markers
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       // When a logic 0 is immediately followed by the start of the next transmisson
-                                       // (special pattern) a pattern of 4 bit duration lengths is created.
-                                       case 4:
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       default:        // this shouldn't happen, don't stuff any bits
-                                               break;
-                               }
-                               n=0;
-                               lastval=dest[idx];
+               if (errCnt>=0){
+                       lo = Em410xDecode(dest,size);
+                       //Dbprintf("DEBUG: EM GOT");
+                       if (lo>0){
+                               Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)",
+                                   (uint32_t)(lo>>32),
+                                   (uint32_t)lo,
+                                   (uint32_t)(lo&0xFFFF),
+                                   (uint32_t)((lo>>16LL) & 0xFF),
+                                   (uint32_t)(lo & 0xFFFFFF));
+                       }
+                       if (findone){
+                               if (ledcontrol) LED_A_OFF();
+                               return;
                        }
+               } else{
+                       //Dbprintf("DEBUG: No Tag");
                }
-               m=i;
                WDT_HIT();
+               lo = 0;
+               clk=0;
+               invert=0;
+               errCnt=0;
+               size=0;
+       }
+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();
+}
 
-               // final loop, go over previously decoded manchester data and decode into usable tag ID
-               // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
-               for( idx=0; idx<m-6; idx++) {
-                       // search for a start of frame marker
-                       if ( dest[idx] && dest[idx+1] && dest[idx+2] && (!dest[idx+3]) && (!dest[idx+4]) && (!dest[idx+5]) )
-                       {
-                               found=1;
-                               idx+=6;
-                               if (found && (hi2|hi|lo)) {
-                                       if (hi2 != 0){
-                                       Dbprintf("TAG ID: %x%08x%08x (%d)",
-                                               (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                               }               
-                                       else {
-                                         Dbprintf("TAG ID: %x%08x (%d)",
-                                                 (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                                       }       
-                                       /* if we're only looking for one tag */
-                                       if (findone)
-                                       {
-                                               *high = hi;
-                                               *low = lo;
-                                               return;
-                                       }
-                                       hi2=0;
-                                       hi=0;
-                                       lo=0;
-                                       found=0;
-                               }
-                       }
-                       if (found) {
-                               if (dest[idx] && (!dest[idx+1]) ) {
-                                       hi2=(hi2<<1)|(hi>>31);
-                                       hi=(hi<<1)|(lo>>31);
-                                       lo=(lo<<1)|0;
-                               } else if ( (!dest[idx]) && dest[idx+1]) {
-                                       hi2=(hi2<<1)|(hi>>31);
-                                       hi=(hi<<1)|(lo>>31);
-                                       lo=(lo<<1)|1;
-                               } else {
-                                       found=0;
-                                       hi2=0;
-                                       hi=0;
-                                       lo=0;
-                               }
-                               idx++;
+void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
+{
+       uint8_t *dest = (uint8_t *)BigBuf;
+       int idx=0;
+       uint32_t code=0, code2=0;
+       uint8_t version=0;
+       uint8_t facilitycode=0;
+       uint16_t number=0;
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
+
+       while(!BUTTON_PRESS()) {
+               WDT_HIT();
+               if (ledcontrol) LED_A_ON();
+               DoAcquisition125k_internal(-1,true);
+               //fskdemod and get start index
+               WDT_HIT();
+               idx = IOdemodFSK(dest,sizeof(BigBuf));
+               if (idx>0){
+                       //valid tag found
+
+                       //Index map
+                       //0           10          20          30          40          50          60
+                       //|           |           |           |           |           |           |
+                       //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
+                       //-----------------------------------------------------------------------------
+                       //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 ???????? 11
+                       //
+                       //XSF(version)facility:codeone+codetwo
+                       //Handle the data
+                       if(findone){ //only print binary if we are doing one
+                               Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx],   dest[idx+1],   dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7],dest[idx+8]);
+                               Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15],dest[idx+16],dest[idx+17]);
+                               Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23],dest[idx+24],dest[idx+25],dest[idx+26]);
+                               Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31],dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35]);
+                               Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39],dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44]);
+                               Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+45],dest[idx+46],dest[idx+47],dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53]);
+                               Dbprintf("%d%d%d%d%d%d%d%d %d%d",dest[idx+54],dest[idx+55],dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]);
                        }
-                       if ( dest[idx] && dest[idx+1] && dest[idx+2] && (!dest[idx+3]) && (!dest[idx+4]) && (!dest[idx+5]) )
-                       {
-                               found=1;
-                               idx+=6;
-                               if (found && (hi|lo)) {
-                                       if (hi2 != 0){
-                                       Dbprintf("TAG ID: %x%08x%08x (%d)",
-                                               (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                               }               
-                                       else {
-                                         Dbprintf("TAG ID: %x%08x (%d)",
-                                                 (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                                       }       
-                                       /* if we're only looking for one tag */
-                                       if (findone)
-                                       {
-                                               *high = hi;
-                                               *low = lo;
-                                               return;
-                                       }
-          hi2=0;
-                                       hi=0;
-                                       lo=0;
-                                       found=0;
-                               }
+                       code = bytebits_to_byte(dest+idx,32);
+                       code2 = bytebits_to_byte(dest+idx+32,32);
+                       version = bytebits_to_byte(dest+idx+27,8); //14,4
+                       facilitycode = bytebits_to_byte(dest+idx+18,8) ;
+                       number = (bytebits_to_byte(dest+idx+36,8)<<8)|(bytebits_to_byte(dest+idx+45,8)); //36,9
+
+                       Dbprintf("XSF(%02d)%02x:%05d (%08x%08x)",version,facilitycode,number,code,code2);
+                       // if we're only looking for one tag
+                       if (findone){
+                               if (ledcontrol) LED_A_OFF();
+                               //LED_A_OFF();
+                               return;
                        }
+                       code=code2=0;
+                       version=facilitycode=0;
+                       number=0;
+                       idx=0;
                }
                WDT_HIT();
        }
+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();
 }
 
-
 /*------------------------------
  * T5555/T5557/T5567 routines
  *------------------------------
@@ -873,8 +899,9 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 // Write one bit to card
 void T55xxWriteBit(int bit)
 {
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
        if (bit == 0)
                SpinDelayUs(WRITE_0);
        else
@@ -886,10 +913,12 @@ void T55xxWriteBit(int bit)
 // Write one card block in page 0, no lock
 void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
-       unsigned int i;
+       //unsigned int i;  //enio adjustment 12/10/14
+       uint32_t i;
 
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
@@ -906,7 +935,7 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
                // Pwd
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
-       }       
+       }
        // Lock bit
        T55xxWriteBit(0);
 
@@ -921,20 +950,20 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
        // Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
        // so wait a little more)
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
        SpinDelay(20);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 }
 
-
-// Read one card block in page 0 
+// Read one card block in page 0
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
        uint8_t *dest = (uint8_t *)BigBuf;
-       int m=0, i=0;
+       //int m=0, i=0; //enio adjustment 12/10/14
+       uint32_t m=0, i=0;
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        m = sizeof(BigBuf);
-  // Clear destination buffer before sending the command
+       // Clear destination buffer before sending the command
        memset(dest, 128, m);
        // Connect the A/D to the peak-detected low-frequency path.
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
@@ -943,7 +972,7 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 
        LED_D_ON();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
@@ -960,18 +989,18 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
                // Pwd
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
-       }       
+       }
        // Lock bit
        T55xxWriteBit(0);
        // Block
        for (i = 0x04; i != 0; i >>= 1)
                T55xxWriteBit(Block & i);
-  
-  // Turn field on to read the response
+
+       // Turn field on to read the response
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
-       // Now do the acquisition 
+       // Now do the acquisition
        i = 0;
        for(;;) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
@@ -981,24 +1010,25 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
                        // we don't care about actual value, only if it's more or less than a
                        // threshold essentially we capture zero crossings for later analysis
-//                     if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
+                       //                      if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
                        i++;
                        if (i >= m) break;
                }
        }
 
-  FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        LED_D_OFF();
        DbpString("DONE!");
 }
 
 // Read card traceability data (page 1)
-void T55xxReadTrace(void){ 
+void T55xxReadTrace(void){
        uint8_t *dest = (uint8_t *)BigBuf;
        int m=0, i=0;
+
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        m = sizeof(BigBuf);
-  // Clear destination buffer before sending the command
+       // Clear destination buffer before sending the command
        memset(dest, 128, m);
        // Connect the A/D to the peak-detected low-frequency path.
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
@@ -1007,7 +1037,7 @@ void T55xxReadTrace(void){
 
        LED_D_ON();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
@@ -1020,12 +1050,12 @@ void T55xxReadTrace(void){
        // Opcode
        T55xxWriteBit(1);
        T55xxWriteBit(1); //Page 1
-  
-  // Turn field on to read the response
+
+       // Turn field on to read the response
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
-       // Now do the acquisition 
+       // Now do the acquisition
        i = 0;
        for(;;) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
@@ -1038,7 +1068,7 @@ void T55xxReadTrace(void){
                }
        }
 
-  FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        LED_D_OFF();
        DbpString("DONE!");
 }
@@ -1047,100 +1077,100 @@ void T55xxReadTrace(void){
 // Copy HID id to card and setup block 0 config
 void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
 {
-       int data1, data2, data3, data4, data5, data6; //up to six blocks for long format
+       int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
        int last_block = 0;
 
-  if (longFMT){
-         // Ensure no more than 84 bits supplied
-         if (hi2>0xFFFFF) {
-                 DbpString("Tags can only have 84 bits.");
-                 return;
-         }
-    // Build the 6 data blocks for supplied 84bit ID
-    last_block = 6;
-    data1 = 0x1D96A900; // load preamble (1D) & long format identifier (9E manchester encoded)
-         for (int i=0;i<4;i++) {
-                 if (hi2 & (1<<(19-i)))
-                         data1 |= (1<<(((3-i)*2)+1)); // 1 -> 10
-                 else
-                         data1 |= (1<<((3-i)*2)); // 0 -> 01
-         }
-
-       data2 = 0;
-       for (int i=0;i<16;i++) {
-               if (hi2 & (1<<(15-i)))
-                       data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data2 |= (1<<((15-i)*2)); // 0 -> 01
-    }
-
-       data3 = 0;
-       for (int i=0;i<16;i++) {
-               if (hi & (1<<(31-i)))
-                       data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data3 |= (1<<((15-i)*2)); // 0 -> 01
-       }
-  
-       data4 = 0;
-       for (int i=0;i<16;i++) {
-               if (hi & (1<<(15-i)))
-                       data4 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data4 |= (1<<((15-i)*2)); // 0 -> 01
-    }
-    
-       data5 = 0;
-       for (int i=0;i<16;i++) {
-               if (lo & (1<<(31-i)))
-                       data5 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data5 |= (1<<((15-i)*2)); // 0 -> 01
-       }
-  
-       data6 = 0;
-       for (int i=0;i<16;i++) {
-               if (lo & (1<<(15-i)))
-                       data6 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data6 |= (1<<((15-i)*2)); // 0 -> 01
-    }
-  }
-  else {       
-         // Ensure no more than 44 bits supplied
-         if (hi>0xFFF) {
-                 DbpString("Tags can only have 44 bits.");
-                 return;
-         }
-
-       // Build the 3 data blocks for supplied 44bit ID
-       last_block = 3;
-       
-       data1 = 0x1D000000; // load preamble
-  
-       for (int i=0;i<12;i++) {
-               if (hi & (1<<(12-i)))
-                       data1 |= (1<<(((12-i)*2)+1)); // 1 -> 10
-               else
-                       data1 |= (1<<((12-i)*2)); // 0 -> 01
-       }
-  
-       data2 = 0;
-       for (int i=0;i<16;i++) {
-               if (lo & (1<<(31-i)))
-                       data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data2 |= (1<<((15-i)*2)); // 0 -> 01
-       }
-  
-       data3 = 0;
-       for (int i=0;i<16;i++) {
-               if (lo & (1<<(15-i)))
-                       data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data3 |= (1<<((15-i)*2)); // 0 -> 01
-       }               
-  }
+       if (longFMT){
+               // Ensure no more than 84 bits supplied
+               if (hi2>0xFFFFF) {
+                       DbpString("Tags can only have 84 bits.");
+                       return;
+               }
+               // Build the 6 data blocks for supplied 84bit ID
+               last_block = 6;
+               data1 = 0x1D96A900; // load preamble (1D) & long format identifier (9E manchester encoded)
+               for (int i=0;i<4;i++) {
+                       if (hi2 & (1<<(19-i)))
+                               data1 |= (1<<(((3-i)*2)+1)); // 1 -> 10
+                       else
+                               data1 |= (1<<((3-i)*2)); // 0 -> 01
+               }
+
+               data2 = 0;
+               for (int i=0;i<16;i++) {
+                       if (hi2 & (1<<(15-i)))
+                               data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+                       else
+                               data2 |= (1<<((15-i)*2)); // 0 -> 01
+               }
+
+               data3 = 0;
+               for (int i=0;i<16;i++) {
+                       if (hi & (1<<(31-i)))
+                               data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+                       else
+                               data3 |= (1<<((15-i)*2)); // 0 -> 01
+               }
+
+               data4 = 0;
+               for (int i=0;i<16;i++) {
+                       if (hi & (1<<(15-i)))
+                               data4 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+                       else
+                               data4 |= (1<<((15-i)*2)); // 0 -> 01
+               }
+
+               data5 = 0;
+               for (int i=0;i<16;i++) {
+                       if (lo & (1<<(31-i)))
+                               data5 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+                       else
+                               data5 |= (1<<((15-i)*2)); // 0 -> 01
+               }
+
+               data6 = 0;
+               for (int i=0;i<16;i++) {
+                       if (lo & (1<<(15-i)))
+                               data6 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+                       else
+                               data6 |= (1<<((15-i)*2)); // 0 -> 01
+               }
+       }
+       else {
+               // Ensure no more than 44 bits supplied
+               if (hi>0xFFF) {
+                       DbpString("Tags can only have 44 bits.");
+                       return;
+               }
+
+               // Build the 3 data blocks for supplied 44bit ID
+               last_block = 3;
+
+               data1 = 0x1D000000; // load preamble
+
+               for (int i=0;i<12;i++) {
+                       if (hi & (1<<(11-i)))
+                               data1 |= (1<<(((11-i)*2)+1)); // 1 -> 10
+                       else
+                               data1 |= (1<<((11-i)*2)); // 0 -> 01
+               }
+
+               data2 = 0;
+               for (int i=0;i<16;i++) {
+                       if (lo & (1<<(31-i)))
+                               data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+                       else
+                               data2 |= (1<<((15-i)*2)); // 0 -> 01
+               }
+
+               data3 = 0;
+               for (int i=0;i<16;i++) {
+                       if (lo & (1<<(15-i)))
+                               data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
+                       else
+                               data3 |= (1<<((15-i)*2)); // 0 -> 01
+               }
+       }
 
        LED_D_ON();
        // Program the data blocks for supplied ID
@@ -1148,21 +1178,41 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
        T55xxWriteBlock(data1,1,0,0);
        T55xxWriteBlock(data2,2,0,0);
        T55xxWriteBlock(data3,3,0,0);
-       
+
        if (longFMT) { // if long format there are 6 blocks
-         T55xxWriteBlock(data4,4,0,0);
-         T55xxWriteBlock(data5,5,0,0);
-         T55xxWriteBlock(data6,6,0,0);
-  }
+               T55xxWriteBlock(data4,4,0,0);
+               T55xxWriteBlock(data5,5,0,0);
+               T55xxWriteBlock(data6,6,0,0);
+       }
 
        // Config for HID (RF/50, FSK2a, Maxblock=3 for short/6 for long)
        T55xxWriteBlock(T55x7_BITRATE_RF_50    |
-                       T55x7_MODULATION_FSK2a |
-                       last_block << T55x7_MAXBLOCK_SHIFT,
-                       0,0,0);
-  
+                                       T55x7_MODULATION_FSK2a |
+                                       last_block << T55x7_MAXBLOCK_SHIFT,
+                                       0,0,0);
+
        LED_D_OFF();
-       
+
+       DbpString("DONE!");
+}
+
+void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT)
+{
+       int data1=0, data2=0; //up to six blocks for long format
+
+       data1 = hi;  // load preamble
+       data2 = lo;
+
+       LED_D_ON();
+       // Program the data blocks for supplied ID
+       // and the block 0 for HID format
+       T55xxWriteBlock(data1,1,0,0);
+       T55xxWriteBlock(data2,2,0,0);
+
+       //Config Block
+       T55xxWriteBlock(0x00147040,0,0,0);
+       LED_D_OFF();
+
        DbpString("DONE!");
 }
 
@@ -1177,6 +1227,7 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
        uint64_t rev_id = 0;    // reversed ID
        int c_parity[4];        // column parity
        int r_parity = 0;       // row parity
+       uint32_t clock = 0;
 
        // Reverse ID bits given as parameter (for simpler operations)
        for (i = 0; i < EM410X_ID_LENGTH; ++i) {
@@ -1234,22 +1285,45 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
        T55xxWriteBlock((uint32_t)id, 2, 0, 0);
 
        // Config for EM410x (RF/64, Manchester, Maxblock=2)
-       if (card)
+       if (card) {
+               // Clock rate is stored in bits 8-15 of the card value
+               clock = (card & 0xFF00) >> 8;
+               Dbprintf("Clock rate: %d", clock);
+               switch (clock)
+               {
+                       case 32:
+                               clock = T55x7_BITRATE_RF_32;
+                               break;
+                       case 16:
+                               clock = T55x7_BITRATE_RF_16;
+                               break;
+                       case 0:
+                               // A value of 0 is assumed to be 64 for backwards-compatibility
+                               // Fall through...
+                       case 64:
+                               clock = T55x7_BITRATE_RF_64;
+                               break;
+                       default:
+                               Dbprintf("Invalid clock rate: %d", clock);
+                               return;
+               }
+
                // Writing configuration for T55x7 tag
-               T55xxWriteBlock(T55x7_BITRATE_RF_64         |
-                               T55x7_MODULATION_MANCHESTER |
-                               2 << T55x7_MAXBLOCK_SHIFT,
-                               0, 0, 0);
+               T55xxWriteBlock(clock       |
+                   T55x7_MODULATION_MANCHESTER |
+                   2 << T55x7_MAXBLOCK_SHIFT,
+                   0, 0, 0);
+       }
        else
                // Writing configuration for T5555(Q5) tag
                T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |
-                               T5555_MODULATION_MANCHESTER   |
-                               2 << T5555_MAXBLOCK_SHIFT,
-                               0, 0, 0);
+                   T5555_MODULATION_MANCHESTER   |
+                   2 << T5555_MAXBLOCK_SHIFT,
+                   0, 0, 0);
 
        LED_D_OFF();
        Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555",
-                                       (uint32_t)(id >> 32), (uint32_t)id);
+           (uint32_t)(id >> 32), (uint32_t)id);
 }
 
 // Clone Indala 64-bit tag by UID to T55x7
@@ -1262,15 +1336,15 @@ void CopyIndala64toT55x7(int hi, int lo)
        T55xxWriteBlock(lo,2,0,0);
        //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=2)
        T55xxWriteBlock(T55x7_BITRATE_RF_32    |
-                       T55x7_MODULATION_PSK1 |
-                       2 << T55x7_MAXBLOCK_SHIFT,
-                       0,0,0);
+           T55x7_MODULATION_PSK1 |
+           2 << T55x7_MAXBLOCK_SHIFT,
+           0, 0, 0);
        //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
-//     T5567WriteBlock(0x603E1042,0);
+       //      T5567WriteBlock(0x603E1042,0);
 
        DbpString("DONE!");
 
-}      
+}
 
 void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int uid6, int uid7)
 {
@@ -1286,12 +1360,493 @@ void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int
        T55xxWriteBlock(uid7,7,0,0);
        //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
        T55xxWriteBlock(T55x7_BITRATE_RF_32    |
-                       T55x7_MODULATION_PSK1 |
-                       7 << T55x7_MAXBLOCK_SHIFT,
-                       0,0,0);
+           T55x7_MODULATION_PSK1 |
+           7 << T55x7_MAXBLOCK_SHIFT,
+           0,0,0);
        //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
-//     T5567WriteBlock(0x603E10E2,0);
+       //      T5567WriteBlock(0x603E10E2,0);
 
        DbpString("DONE!");
 
 }
+
+
+#define abs(x) ( ((x)<0) ? -(x) : (x) )
+#define max(x,y) ( x<y ? y:x)
+
+int DemodPCF7931(uint8_t **outBlocks) {
+       uint8_t BitStream[256];
+       uint8_t Blocks[8][16];
+       uint8_t *GraphBuffer = (uint8_t *)BigBuf;
+       int GraphTraceLen = sizeof(BigBuf);
+       int i, j, lastval, bitidx, half_switch;
+       int clock = 64;
+       int tolerance = clock / 8;
+       int pmc, block_done;
+       int lc, warnings = 0;
+       int num_blocks = 0;
+       int lmin=128, lmax=128;
+       uint8_t dir;
+
+       AcquireRawAdcSamples125k(0);
+
+       lmin = 64;
+       lmax = 192;
+
+       i = 2;
+
+       /* Find first local max/min */
+       if(GraphBuffer[1] > GraphBuffer[0]) {
+               while(i < GraphTraceLen) {
+                       if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)
+                               break;
+                       i++;
+               }
+               dir = 0;
+       }
+       else {
+               while(i < GraphTraceLen) {
+                       if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)
+                               break;
+                       i++;
+               }
+               dir = 1;
+       }
+
+       lastval = i++;
+       half_switch = 0;
+       pmc = 0;
+       block_done = 0;
+
+       for (bitidx = 0; i < GraphTraceLen; i++)
+       {
+               if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
+               {
+                       lc = i - lastval;
+                       lastval = i;
+
+                       // Switch depending on lc length:
+                       // Tolerance is 1/8 of clock rate (arbitrary)
+                       if (abs(lc-clock/4) < tolerance) {
+                               // 16T0
+                               if((i - pmc) == lc) { /* 16T0 was previous one */
+                                       /* It's a PMC ! */
+                                       i += (128+127+16+32+33+16)-1;
+                                       lastval = i;
+                                       pmc = 0;
+                                       block_done = 1;
+                               }
+                               else {
+                                       pmc = i;
+                               }
+                       } else if (abs(lc-clock/2) < tolerance) {
+                               // 32TO
+                               if((i - pmc) == lc) { /* 16T0 was previous one */
+                                       /* It's a PMC ! */
+                                       i += (128+127+16+32+33)-1;
+                                       lastval = i;
+                                       pmc = 0;
+                                       block_done = 1;
+                               }
+                               else if(half_switch == 1) {
+                                       BitStream[bitidx++] = 0;
+                                       half_switch = 0;
+                               }
+                               else
+                                       half_switch++;
+                       } else if (abs(lc-clock) < tolerance) {
+                               // 64TO
+                               BitStream[bitidx++] = 1;
+                       } else {
+                               // Error
+                               warnings++;
+                               if (warnings > 10)
+                               {
+                                       Dbprintf("Error: too many detection errors, aborting.");
+                                       return 0;
+                               }
+                       }
+
+                       if(block_done == 1) {
+                               if(bitidx == 128) {
+                                       for(j=0; j<16; j++) {
+                                               Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
+                                                   64*BitStream[j*8+6]+
+                                                   32*BitStream[j*8+5]+
+                                                   16*BitStream[j*8+4]+
+                                                   8*BitStream[j*8+3]+
+                                                   4*BitStream[j*8+2]+
+                                                   2*BitStream[j*8+1]+
+                                                   BitStream[j*8];
+                                       }
+                                       num_blocks++;
+                               }
+                               bitidx = 0;
+                               block_done = 0;
+                               half_switch = 0;
+                       }
+                       if(i < GraphTraceLen)
+                       {
+                               if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
+                               else dir = 1;
+                       }
+               }
+               if(bitidx==255)
+                       bitidx=0;
+               warnings = 0;
+               if(num_blocks == 4) break;
+       }
+       memcpy(outBlocks, Blocks, 16*num_blocks);
+       return num_blocks;
+}
+
+int IsBlock0PCF7931(uint8_t *Block) {
+       // Assume RFU means 0 :)
+       if((memcmp(Block, "\x00\x00\x00\x00\x00\x00\x00\x01", 8) == 0) && memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) // PAC enabled
+               return 1;
+       if((memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) && Block[7] == 0) // PAC disabled, can it *really* happen ?
+               return 1;
+       return 0;
+}
+
+int IsBlock1PCF7931(uint8_t *Block) {
+       // Assume RFU means 0 :)
+       if(Block[10] == 0 && Block[11] == 0 && Block[12] == 0 && Block[13] == 0)
+               if((Block[14] & 0x7f) <= 9 && Block[15] <= 9)
+                       return 1;
+
+       return 0;
+}
+
+#define ALLOC 16
+
+void ReadPCF7931() {
+       uint8_t Blocks[8][17];
+       uint8_t tmpBlocks[4][16];
+       int i, j, ind, ind2, n;
+       int num_blocks = 0;
+       int max_blocks = 8;
+       int ident = 0;
+       int error = 0;
+       int tries = 0;
+
+       memset(Blocks, 0, 8*17*sizeof(uint8_t));
+
+       do {
+               memset(tmpBlocks, 0, 4*16*sizeof(uint8_t));
+               n = DemodPCF7931((uint8_t**)tmpBlocks);
+               if(!n)
+                       error++;
+               if(error==10 && num_blocks == 0) {
+                       Dbprintf("Error, no tag or bad tag");
+                       return;
+               }
+               else if (tries==20 || error==10) {
+                       Dbprintf("Error reading the tag");
+                       Dbprintf("Here is the partial content");
+                       goto end;
+               }
+
+               for(i=0; i<n; i++)
+                       Dbprintf("(dbg) %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+                           tmpBlocks[i][0], tmpBlocks[i][1], tmpBlocks[i][2], tmpBlocks[i][3], tmpBlocks[i][4], tmpBlocks[i][5], tmpBlocks[i][6], tmpBlocks[i][7],
+                           tmpBlocks[i][8], tmpBlocks[i][9], tmpBlocks[i][10], tmpBlocks[i][11], tmpBlocks[i][12], tmpBlocks[i][13], tmpBlocks[i][14], tmpBlocks[i][15]);
+               if(!ident) {
+                       for(i=0; i<n; i++) {
+                               if(IsBlock0PCF7931(tmpBlocks[i])) {
+                                       // Found block 0 ?
+                                       if(i < n-1 && IsBlock1PCF7931(tmpBlocks[i+1])) {
+                                               // Found block 1!
+                                               // \o/
+                                               ident = 1;
+                                               memcpy(Blocks[0], tmpBlocks[i], 16);
+                                               Blocks[0][ALLOC] = 1;
+                                               memcpy(Blocks[1], tmpBlocks[i+1], 16);
+                                               Blocks[1][ALLOC] = 1;
+                                               max_blocks = max((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
+                                               // Debug print
+                                               Dbprintf("(dbg) Max blocks: %d", max_blocks);
+                                               num_blocks = 2;
+                                               // Handle following blocks
+                                               for(j=i+2, ind2=2; j!=i; j++, ind2++, num_blocks++) {
+                                                       if(j==n) j=0;
+                                                       if(j==i) break;
+                                                       memcpy(Blocks[ind2], tmpBlocks[j], 16);
+                                                       Blocks[ind2][ALLOC] = 1;
+                                               }
+                                               break;
+                                       }
+                               }
+                       }
+               }
+               else {
+                       for(i=0; i<n; i++) { // Look for identical block in known blocks
+                               if(memcmp(tmpBlocks[i], "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 16)) { // Block is not full of 00
+                                       for(j=0; j<max_blocks; j++) {
+                                               if(Blocks[j][ALLOC] == 1 && !memcmp(tmpBlocks[i], Blocks[j], 16)) {
+                                                       // Found an identical block
+                                                       for(ind=i-1,ind2=j-1; ind >= 0; ind--,ind2--) {
+                                                               if(ind2 < 0)
+                                                                       ind2 = max_blocks;
+                                                               if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
+                                                                       // Dbprintf("Tmp %d -> Block %d", ind, ind2);
+                                                                       memcpy(Blocks[ind2], tmpBlocks[ind], 16);
+                                                                       Blocks[ind2][ALLOC] = 1;
+                                                                       num_blocks++;
+                                                                       if(num_blocks == max_blocks) goto end;
+                                                               }
+                                                       }
+                                                       for(ind=i+1,ind2=j+1; ind < n; ind++,ind2++) {
+                                                               if(ind2 > max_blocks)
+                                                                       ind2 = 0;
+                                                               if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
+                                                                       // Dbprintf("Tmp %d -> Block %d", ind, ind2);
+                                                                       memcpy(Blocks[ind2], tmpBlocks[ind], 16);
+                                                                       Blocks[ind2][ALLOC] = 1;
+                                                                       num_blocks++;
+                                                                       if(num_blocks == max_blocks) goto end;
+                                                               }
+                                                       }
+                                               }
+                                       }
+                               }
+                       }
+               }
+               tries++;
+               if (BUTTON_PRESS()) return;
+       } while (num_blocks != max_blocks);
+end:
+       Dbprintf("-----------------------------------------");
+       Dbprintf("Memory content:");
+       Dbprintf("-----------------------------------------");
+       for(i=0; i<max_blocks; i++) {
+               if(Blocks[i][ALLOC]==1)
+                       Dbprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+                           Blocks[i][0], Blocks[i][1], Blocks[i][2], Blocks[i][3], Blocks[i][4], Blocks[i][5], Blocks[i][6], Blocks[i][7],
+                           Blocks[i][8], Blocks[i][9], Blocks[i][10], Blocks[i][11], Blocks[i][12], Blocks[i][13], Blocks[i][14], Blocks[i][15]);
+               else
+                       Dbprintf("<missing block %d>", i);
+       }
+       Dbprintf("-----------------------------------------");
+
+       return ;
+}
+
+
+//-----------------------------------
+// EM4469 / EM4305 routines
+//-----------------------------------
+#define FWD_CMD_LOGIN 0xC //including the even parity, binary mirrored
+#define FWD_CMD_WRITE 0xA
+#define FWD_CMD_READ 0x9
+#define FWD_CMD_DISABLE 0x5
+
+
+uint8_t forwardLink_data[64]; //array of forwarded bits
+uint8_t * forward_ptr; //ptr for forward message preparation
+uint8_t fwd_bit_sz; //forwardlink bit counter
+uint8_t * fwd_write_ptr; //forwardlink bit pointer
+
+//====================================================================
+// prepares command bits
+// see EM4469 spec
+//====================================================================
+//--------------------------------------------------------------------
+uint8_t Prepare_Cmd( uint8_t cmd ) {
+       //--------------------------------------------------------------------
+
+       *forward_ptr++ = 0; //start bit
+       *forward_ptr++ = 0; //second pause for 4050 code
+
+       *forward_ptr++ = cmd;
+       cmd >>= 1;
+       *forward_ptr++ = cmd;
+       cmd >>= 1;
+       *forward_ptr++ = cmd;
+       cmd >>= 1;
+       *forward_ptr++ = cmd;
+
+       return 6; //return number of emited bits
+}
+
+//====================================================================
+// prepares address bits
+// see EM4469 spec
+//====================================================================
+
+//--------------------------------------------------------------------
+uint8_t Prepare_Addr( uint8_t addr ) {
+       //--------------------------------------------------------------------
+
+       register uint8_t line_parity;
+
+       uint8_t i;
+       line_parity = 0;
+       for(i=0;i<6;i++) {
+               *forward_ptr++ = addr;
+               line_parity ^= addr;
+               addr >>= 1;
+       }
+
+       *forward_ptr++ = (line_parity & 1);
+
+       return 7; //return number of emited bits
+}
+
+//====================================================================
+// prepares data bits intreleaved with parity bits
+// see EM4469 spec
+//====================================================================
+
+//--------------------------------------------------------------------
+uint8_t Prepare_Data( uint16_t data_low, uint16_t data_hi) {
+       //--------------------------------------------------------------------
+
+       register uint8_t line_parity;
+       register uint8_t column_parity;
+       register uint8_t i, j;
+       register uint16_t data;
+
+       data = data_low;
+       column_parity = 0;
+
+       for(i=0; i<4; i++) {
+               line_parity = 0;
+               for(j=0; j<8; j++) {
+                       line_parity ^= data;
+                       column_parity ^= (data & 1) << j;
+                       *forward_ptr++ = data;
+                       data >>= 1;
+               }
+               *forward_ptr++ = line_parity;
+               if(i == 1)
+                       data = data_hi;
+       }
+
+       for(j=0; j<8; j++) {
+               *forward_ptr++ = column_parity;
+               column_parity >>= 1;
+       }
+       *forward_ptr = 0;
+
+       return 45; //return number of emited bits
+}
+
+//====================================================================
+// Forward Link send function
+// Requires: forwarLink_data filled with valid bits (1 bit per byte)
+// fwd_bit_count set with number of bits to be sent
+//====================================================================
+void SendForward(uint8_t fwd_bit_count) {
+
+       fwd_write_ptr = forwardLink_data;
+       fwd_bit_sz = fwd_bit_count;
+
+       LED_D_ON();
+
+       //Field on
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+       // Give it a bit of time for the resonant antenna to settle.
+       // And for the tag to fully power up
+       SpinDelay(150);
+
+       // force 1st mod pulse (start gap must be longer for 4305)
+       fwd_bit_sz--; //prepare next bit modulation
+       fwd_write_ptr++;
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
+       SpinDelayUs(16*8); //16 cycles on (8us each)
+
+       // now start writting
+       while(fwd_bit_sz-- > 0) { //prepare next bit modulation
+               if(((*fwd_write_ptr++) & 1) == 1)
+                       SpinDelayUs(32*8); //32 cycles at 125Khz (8us each)
+               else {
+                       //These timings work for 4469/4269/4305 (with the 55*8 above)
+                       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+                       SpinDelayUs(23*8); //16-4 cycles off (8us each)
+                       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+                       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
+                       SpinDelayUs(9*8); //16 cycles on (8us each)
+               }
+       }
+}
+
+void EM4xLogin(uint32_t Password) {
+
+       uint8_t fwd_bit_count;
+
+       forward_ptr = forwardLink_data;
+       fwd_bit_count = Prepare_Cmd( FWD_CMD_LOGIN );
+       fwd_bit_count += Prepare_Data( Password&0xFFFF, Password>>16 );
+
+       SendForward(fwd_bit_count);
+
+       //Wait for command to complete
+       SpinDelay(20);
+
+}
+
+void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
+
+       uint8_t fwd_bit_count;
+       uint8_t *dest = (uint8_t *)BigBuf;
+       int m=0, i=0;
+
+       //If password mode do login
+       if (PwdMode == 1) EM4xLogin(Pwd);
+
+       forward_ptr = forwardLink_data;
+       fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
+       fwd_bit_count += Prepare_Addr( Address );
+
+       m = sizeof(BigBuf);
+       // Clear destination buffer before sending the command
+       memset(dest, 128, m);
+       // Connect the A/D to the peak-detected low-frequency path.
+       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+       // Now set up the SSC to get the ADC samples that are now streaming at us.
+       FpgaSetupSsc();
+
+       SendForward(fwd_bit_count);
+
+       // Now do the acquisition
+       i = 0;
+       for(;;) {
+               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+                       AT91C_BASE_SSC->SSC_THR = 0x43;
+               }
+               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
+                       dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
+                       i++;
+                       if (i >= m) break;
+               }
+       }
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       LED_D_OFF();
+}
+
+void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
+
+       uint8_t fwd_bit_count;
+
+       //If password mode do login
+       if (PwdMode == 1) EM4xLogin(Pwd);
+
+       forward_ptr = forwardLink_data;
+       fwd_bit_count = Prepare_Cmd( FWD_CMD_WRITE );
+       fwd_bit_count += Prepare_Addr( Address );
+       fwd_bit_count += Prepare_Data( Data&0xFFFF, Data>>16 );
+
+       SendForward(fwd_bit_count);
+
+       //Wait for write to complete
+       SpinDelay(20);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       LED_D_OFF();
+}
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