X-Git-Url: http://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/132a02179cfad11fbf484b191544fb3c8475eda8..b41be3cb11103739d2fa92ced09d1e29f8151b7b:/armsrc/iso14443b.c

diff --git a/armsrc/iso14443b.c b/armsrc/iso14443b.c
index 80f93678..f276158f 100644
--- a/armsrc/iso14443b.c
+++ b/armsrc/iso14443b.c
@@ -1,5 +1,6 @@
 //-----------------------------------------------------------------------------
 // Jonathan Westhues, split Nov 2006
+// piwi 2018
 //
 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
 // at your option, any later version. See the LICENSE.txt file for the text of
@@ -9,14 +10,21 @@
 // the `fake tag' modes.
 //-----------------------------------------------------------------------------
 
+#include "iso14443b.h"
+
 #include "proxmark3.h"
 #include "apps.h"
 #include "util.h"
 #include "string.h"
-
 #include "iso14443crc.h"
+#include "fpgaloader.h"
+#include "BigBuf.h"
 
-#define RECEIVE_SAMPLES_TIMEOUT 2000
+#define RECEIVE_SAMPLES_TIMEOUT 64 // TR0 max is 256/fs = 256/(848kHz) = 302us or 64 samples from FPGA
+#define ISO14443B_DMA_BUFFER_SIZE 128
+
+// PCB Block number for APDUs
+static uint8_t pcb_blocknum = 0;
 
 //=============================================================================
 // An ISO 14443 Type B tag. We listen for commands from the reader, using
@@ -122,8 +130,7 @@ static struct {
 		STATE_UNSYNCD,
 		STATE_GOT_FALLING_EDGE_OF_SOF,
 		STATE_AWAITING_START_BIT,
-		STATE_RECEIVING_DATA,
-		STATE_ERROR_WAIT
+		STATE_RECEIVING_DATA
 	}       state;
 	uint16_t    shiftReg;
 	int     bitCnt;
@@ -145,7 +152,7 @@ static struct {
  * Returns: true if we received a EOF
  *          false if we are still waiting for some more
  */
-static int Handle14443bUartBit(int bit)
+static RAMFUNC int Handle14443bUartBit(uint8_t bit)
 {
 	switch(Uart.state) {
 		case STATE_UNSYNCD:
@@ -172,7 +179,7 @@ static int Handle14443bUartBit(int bit)
 					} else {
 						// didn't stay down long enough
 						// before going high, error
-						Uart.state = STATE_ERROR_WAIT;
+						Uart.state = STATE_UNSYNCD;
 					}
 				} else {
 					// do nothing, keep waiting
@@ -183,7 +190,8 @@ static int Handle14443bUartBit(int bit)
 			if(Uart.bitCnt > 12) {
 				// Give up if we see too many zeros without
 				// a one, too.
-				Uart.state = STATE_ERROR_WAIT;
+				LED_A_OFF();
+				Uart.state = STATE_UNSYNCD;
 			}
 			break;
 
@@ -193,7 +201,7 @@ static int Handle14443bUartBit(int bit)
 				if(Uart.posCnt > 50/2) {	// max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
 					// stayed high for too long between
 					// characters, error
-					Uart.state = STATE_ERROR_WAIT;
+					Uart.state = STATE_UNSYNCD;
 				}
 			} else {
 				// falling edge, this starts the data byte
@@ -227,95 +235,91 @@ static int Handle14443bUartBit(int bit)
 
 					if(Uart.byteCnt >= Uart.byteCntMax) {
 						// Buffer overflowed, give up
-						Uart.posCnt = 0;
-						Uart.state = STATE_ERROR_WAIT;
+						LED_A_OFF();
+						Uart.state = STATE_UNSYNCD;
 					} else {
 						// so get the next byte now
 						Uart.posCnt = 0;
 						Uart.state = STATE_AWAITING_START_BIT;
 					}
-				} else if(Uart.shiftReg == 0x000) {
+				} else if (Uart.shiftReg == 0x000) {
 					// this is an EOF byte
 					LED_A_OFF(); // Finished receiving
+					Uart.state = STATE_UNSYNCD;
 					if (Uart.byteCnt != 0) {
-						return TRUE;
+						return true;
 					}
-					Uart.posCnt = 0;
-					Uart.state = STATE_ERROR_WAIT;
 				} else {
 					// this is an error
-					Uart.posCnt = 0;
-					Uart.state = STATE_ERROR_WAIT;
+					LED_A_OFF();
+					Uart.state = STATE_UNSYNCD;
 				}
 			}
 			break;
 
-		case STATE_ERROR_WAIT:
-			// We're all screwed up, so wait a little while
-			// for whatever went wrong to finish, and then
-			// start over.
-			Uart.posCnt++;
-			if(Uart.posCnt > 10) {
-				Uart.state = STATE_UNSYNCD;
-				LED_A_OFF();
-			}
-			break;
-
 		default:
+			LED_A_OFF();
 			Uart.state = STATE_UNSYNCD;
 			break;
 	}
 
-	return FALSE;
+	return false;
+}
+
+
+static void UartReset()
+{
+	Uart.byteCntMax = MAX_FRAME_SIZE;
+	Uart.state = STATE_UNSYNCD;
+	Uart.byteCnt = 0;
+	Uart.bitCnt = 0;
+}
+
+
+static void UartInit(uint8_t *data)
+{
+	Uart.output = data;
+	UartReset();
 }
 
+
 //-----------------------------------------------------------------------------
 // Receive a command (from the reader to us, where we are the simulated tag),
 // and store it in the given buffer, up to the given maximum length. Keeps
 // spinning, waiting for a well-framed command, until either we get one
-// (returns TRUE) or someone presses the pushbutton on the board (FALSE).
+// (returns true) or someone presses the pushbutton on the board (false).
 //
 // Assume that we're called with the SSC (to the FPGA) and ADC path set
 // correctly.
 //-----------------------------------------------------------------------------
-static int GetIso14443bCommandFromReader(uint8_t *received, int *len, int maxLen)
+static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len)
 {
-	uint8_t mask;
-	int i, bit;
-
 	// Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen
 	// only, since we are receiving, not transmitting).
 	// Signal field is off with the appropriate LED
 	LED_D_OFF();
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
 
-
 	// Now run a `software UART' on the stream of incoming samples.
-	Uart.output = received;
-	Uart.byteCntMax = maxLen;
-	Uart.state = STATE_UNSYNCD;
+	UartInit(received);
 
 	for(;;) {
 		WDT_HIT();
 
-		if(BUTTON_PRESS()) return FALSE;
+		if(BUTTON_PRESS()) return false;
 
-		if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
-			AT91C_BASE_SSC->SSC_THR = 0x00;
-		}
 		if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
 			uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-
-			mask = 0x80;
-			for(i = 0; i < 8; i++, mask >>= 1) {
-				bit = (b & mask);
-				if(Handle14443bUartBit(bit)) {
+			for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) {
+				if(Handle14443bUartBit(b & mask)) {
 					*len = Uart.byteCnt;
-					return TRUE;
+					return true;
 				}
 			}
 		}
 	}
+
+	return false;
 }
 
 //-----------------------------------------------------------------------------
@@ -324,65 +328,104 @@ static int GetIso14443bCommandFromReader(uint8_t *received, int *len, int maxLen
 //-----------------------------------------------------------------------------
 void SimulateIso14443bTag(void)
 {
-	// the only command we understand is REQB, AFI=0, Select All, N=0:
-	static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
-	// ... and we respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
+	LED_A_ON();
+	// the only commands we understand is WUPB, AFI=0, Select All, N=1:
+	static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB
+	// ... and REQB, AFI=0, Normal Request, N=1:
+	static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB
+	// ... and HLTB
+	static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB
+	// ... and ATTRIB
+	static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
+
+	// ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
 	// supports only 106kBit/s in both directions, max frame size = 32Bytes,
 	// supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported:
 	static const uint8_t response1[] = {
 		0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
 		0x00, 0x21, 0x85, 0x5e, 0xd7
 	};
+	// response to HLTB and ATTRIB
+	static const uint8_t response2[] = {0x00, 0x78, 0xF0};
+
+
+	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+
+	clear_trace();
+	set_tracing(true);
 
-	uint8_t *resp;
-	int respLen;
+	const uint8_t *resp;
+	uint8_t *respCode;
+	uint16_t respLen, respCodeLen;
 
 	// allocate command receive buffer
 	BigBuf_free();
 	uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
-	int len;
-
-	int i;
 
-	int cmdsRecvd = 0;
-
-	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+	uint16_t len;
+	uint16_t cmdsRecvd = 0;
 
 	// prepare the (only one) tag answer:
 	CodeIso14443bAsTag(response1, sizeof(response1));
-	uint8_t *resp1 = BigBuf_malloc(ToSendMax);
-	memcpy(resp1, ToSend, ToSendMax); 
-	uint16_t resp1Len = ToSendMax;
+	uint8_t *resp1Code = BigBuf_malloc(ToSendMax);
+	memcpy(resp1Code, ToSend, ToSendMax);
+	uint16_t resp1CodeLen = ToSendMax;
+
+	// prepare the (other) tag answer:
+	CodeIso14443bAsTag(response2, sizeof(response2));
+	uint8_t *resp2Code = BigBuf_malloc(ToSendMax);
+	memcpy(resp2Code, ToSend, ToSendMax);
+	uint16_t resp2CodeLen = ToSendMax;
 
 	// We need to listen to the high-frequency, peak-detected path.
 	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
-	FpgaSetupSsc();
+	FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
 
 	cmdsRecvd = 0;
 
 	for(;;) {
-		uint8_t b1, b2;
 
-		if(!GetIso14443bCommandFromReader(receivedCmd, &len, 100)) {
+		if(!GetIso14443bCommandFromReader(receivedCmd, &len)) {
 			Dbprintf("button pressed, received %d commands", cmdsRecvd);
 			break;
-			}
+		}
 
-		// Good, look at the command now.
+		LogTrace(receivedCmd, len, 0, 0, NULL, true);
 
-		if(len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0) {
-			resp = resp1; respLen = resp1Len;
+		// Good, look at the command now.
+		if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0)
+			|| (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) {
+			resp = response1;
+			respLen = sizeof(response1);
+			respCode = resp1Code;
+			respCodeLen = resp1CodeLen;
+		} else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0])
+			|| (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) {
+			resp = response2;
+			respLen = sizeof(response2);
+			respCode = resp2Code;
+			respCodeLen = resp2CodeLen;
 		} else {
 			Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
 			// And print whether the CRC fails, just for good measure
-			ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
-			if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
-				// Not so good, try again.
-				DbpString("+++CRC fail");
-			} else {
-				DbpString("CRC passes");
+			uint8_t b1, b2;
+			if (len >= 3){ // if crc exists
+				ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
+				if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
+					// Not so good, try again.
+					DbpString("+++CRC fail");
+		
+				} else {
+					DbpString("CRC passes");
+				}
 			}
-			break;
+			//get rid of compiler warning
+			respCodeLen = 0;
+			resp = response1;
+			respLen	= 0;
+			respCode = resp1Code;
+			//don't crash at new command just wait and see if reader will send other new cmds.
+			//break;
 		}
 
 		cmdsRecvd++;
@@ -392,25 +435,25 @@ void SimulateIso14443bTag(void)
 			break;
 		}
 
-		if(respLen <= 0) continue;
+		if(respCodeLen <= 0) continue;
 
 		// Modulate BPSK
 		// Signal field is off with the appropriate LED
 		LED_D_OFF();
 		FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
 		AT91C_BASE_SSC->SSC_THR = 0xff;
-		FpgaSetupSsc();
+		FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
 
 		// Transmit the response.
-		i = 0;
+		uint16_t i = 0;
 		for(;;) {
 			if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
-				uint8_t b = resp[i];
+				uint8_t b = respCode[i];
 
 				AT91C_BASE_SSC->SSC_THR = b;
 
 				i++;
-				if(i > respLen) {
+				if(i > respCodeLen) {
 					break;
 				}
 			}
@@ -419,7 +462,14 @@ void SimulateIso14443bTag(void)
 				(void)b;
 			}
 		}
+
+		// trace the response:
+		LogTrace(resp, respLen, 0, 0, NULL, false);
+
 	}
+	
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+	LED_A_OFF();
 }
 
 //=============================================================================
@@ -436,8 +486,7 @@ static struct {
 		DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
 		DEMOD_GOT_FALLING_EDGE_OF_SOF,
 		DEMOD_AWAITING_START_BIT,
-		DEMOD_RECEIVING_DATA,
-		DEMOD_ERROR_WAIT
+		DEMOD_RECEIVING_DATA
 	}       state;
 	int     bitCount;
 	int     posCount;
@@ -488,54 +537,11 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 
 #define SUBCARRIER_DETECT_THRESHOLD	8
 
-// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq)
-/* #define CHECK_FOR_SUBCARRIER() { \
-		v = ci; \
-		if(v < 0) v = -v; \
-		if(cq > 0) { \
-			v += cq; \
-		} else { \
-			v -= cq; \
-		} \
-	}		
- */
 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
-#define CHECK_FOR_SUBCARRIER() { \
-		if(ci < 0) { \
-			if(cq < 0) { /* ci < 0, cq < 0 */ \
-				if (cq < ci) { \
-					v = -cq - (ci >> 1); \
-				} else { \
-					v = -ci - (cq >> 1); \
-				} \
-			} else {	/* ci < 0, cq >= 0 */ \
-				if (cq < -ci) { \
-					v = -ci + (cq >> 1); \
-				} else { \
-					v = cq - (ci >> 1); \
-				} \
-			} \
-		} else { \
-			if(cq < 0) { /* ci >= 0, cq < 0 */ \
-				if (-cq < ci) { \
-					v = ci - (cq >> 1); \
-				} else { \
-					v = -cq + (ci >> 1); \
-				} \
-			} else {	/* ci >= 0, cq >= 0 */ \
-				if (cq < ci) { \
-					v = ci + (cq >> 1); \
-				} else { \
-					v = cq + (ci >> 1); \
-				} \
-			} \
-		} \
-	}
-	
+#define AMPLITUDE(ci,cq) (MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2))
 	switch(Demod.state) {
 		case DEMOD_UNSYNCD:
-			CHECK_FOR_SUBCARRIER();
-			if(v > SUBCARRIER_DETECT_THRESHOLD) {	// subcarrier detected
+			if(AMPLITUDE(ci,cq) > SUBCARRIER_DETECT_THRESHOLD) {	// subcarrier detected
 				Demod.state = DEMOD_PHASE_REF_TRAINING;
 				Demod.sumI = ci;
 				Demod.sumQ = cq;
@@ -545,8 +551,7 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 
 		case DEMOD_PHASE_REF_TRAINING:
 			if(Demod.posCount < 8) {
-				CHECK_FOR_SUBCARRIER();
-				if (v > SUBCARRIER_DETECT_THRESHOLD) {
+				if (AMPLITUDE(ci,cq) > SUBCARRIER_DETECT_THRESHOLD) {
 					// set the reference phase (will code a logic '1') by averaging over 32 1/fs.
 					// note: synchronization time > 80 1/fs
 					Demod.sumI += ci;
@@ -629,7 +634,7 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 					Demod.metric -= Demod.thisBit;
 				}
 				(Demod.metricN)++;
-*/				
+*/
 
 				Demod.shiftReg >>= 1;
 				if(Demod.thisBit > 0) {	// logic '1'
@@ -649,7 +654,7 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 						LED_C_OFF();
 						if(s == 0x000) {
 							// This is EOF (start, stop and all data bits == '0'
-							return TRUE;
+							return true;
 						}
 					}
 				}
@@ -663,7 +668,7 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 			break;
 	}
 
-	return FALSE;
+	return false;
 }
 
 
@@ -684,95 +689,84 @@ static void DemodInit(uint8_t *data)
 }
 
 
-static void UartReset()
-{
-	Uart.byteCntMax = MAX_FRAME_SIZE;
-	Uart.state = STATE_UNSYNCD;
-	Uart.byteCnt = 0;
-	Uart.bitCnt = 0;
-}
-
-
-static void UartInit(uint8_t *data)
-{
-	Uart.output = data;
-	UartReset();
-}
-
-
 /*
  *  Demodulate the samples we received from the tag, also log to tracebuffer
- *  quiet: set to 'TRUE' to disable debug output
+ *  quiet: set to 'true' to disable debug output
  */
-static void GetSamplesFor14443bDemod(int n, bool quiet)
+static void GetSamplesFor14443bDemod(int timeout, bool quiet)
 {
-	int max = 0;
-	bool gotFrame = FALSE;
-	int lastRxCounter, ci, cq, samples = 0;
-
+	int maxBehindBy = 0;
+	bool gotFrame = false;
+	int lastRxCounter, samples = 0;
+	int8_t ci, cq;
+	
 	// Allocate memory from BigBuf for some buffers
 	// free all previous allocations first
 	BigBuf_free();
-	
+
 	// The response (tag -> reader) that we're receiving.
 	uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
-	
+
 	// The DMA buffer, used to stream samples from the FPGA
-	int8_t *dmaBuf = (int8_t*) BigBuf_malloc(DMA_BUFFER_SIZE);
+	uint16_t *dmaBuf = (uint16_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE * sizeof(uint16_t));
 
 	// Set up the demodulator for tag -> reader responses.
 	DemodInit(receivedResponse);
 
+	// wait for last transfer to complete
+	while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY))
+
 	// Setup and start DMA.
-	FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE);
+	FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
+	FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
 
-	int8_t *upTo = dmaBuf;
-	lastRxCounter = DMA_BUFFER_SIZE;
+	uint16_t *upTo = dmaBuf;
+	lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
 
 	// Signal field is ON with the appropriate LED:
 	LED_D_ON();
 	// And put the FPGA in the appropriate mode
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_RECEIVE_IQ);
 
 	for(;;) {
-		int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
-		if(behindBy > max) max = behindBy;
-
-		while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1)) > 2) {
-			ci = upTo[0];
-			cq = upTo[1];
-			upTo += 2;
-			if(upTo >= dmaBuf + DMA_BUFFER_SIZE) {
-				upTo = dmaBuf;
-				AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
-				AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
-			}
-			lastRxCounter -= 2;
-			if(lastRxCounter <= 0) {
-				lastRxCounter += DMA_BUFFER_SIZE;
-			}
+		int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1);
+		if(behindBy > maxBehindBy) {
+			maxBehindBy = behindBy;
+		}
 
-			samples += 2;
+		if(behindBy < 1) continue;
 
-			if(Handle14443bSamplesDemod(ci, cq)) {
-				gotFrame = TRUE;
-				break;
-			}
+		ci = *upTo >> 8;
+		cq = *upTo;
+		upTo++;
+		lastRxCounter--;
+		if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) {               // we have read all of the DMA buffer content.
+			upTo = dmaBuf;                                             // start reading the circular buffer from the beginning
+			lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
+		}
+		if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) {              // DMA Counter Register had reached 0, already rotated.
+			AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;          // refresh the DMA Next Buffer and
+			AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE;  // DMA Next Counter registers
+		}
+		samples++;
+
+		if(Handle14443bSamplesDemod(ci, cq)) {
+			gotFrame = true;
+			break;
 		}
 
-		if(samples > n || gotFrame) {
+		if(samples > timeout && Demod.state < DEMOD_PHASE_REF_TRAINING) {
+			LED_C_OFF();
 			break;
 		}
 	}
 
-	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
+	FpgaDisableSscDma();
 
-	if (!quiet) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max, samples, gotFrame, Demod.len, Demod.sumI, Demod.sumQ);
+	if (!quiet) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", maxBehindBy, samples, gotFrame, Demod.len, Demod.sumI, Demod.sumQ);
 	//Tracing
-	if (tracing && Demod.len > 0) {
-		uint8_t parity[MAX_PARITY_SIZE];
-		//GetParity(Demod.output, Demod.len, parity);
-		LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE);
+	if (Demod.len > 0) {
+		LogTrace(Demod.output, Demod.len, 0, 0, NULL, false);
 	}
 }
 
@@ -782,48 +776,21 @@ static void GetSamplesFor14443bDemod(int n, bool quiet)
 //-----------------------------------------------------------------------------
 static void TransmitFor14443b(void)
 {
-	int c;
-
-	FpgaSetupSsc();
-
-	while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
-		AT91C_BASE_SSC->SSC_THR = 0xff;
-	}
-
-	// Signal field is ON with the appropriate Red LED
-	LED_D_ON();
-	// Signal we are transmitting with the Green LED
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
 	LED_B_ON();
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
-
-	for(c = 0; c < 10;) {
-		if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
-			AT91C_BASE_SSC->SSC_THR = 0xff;
-			c++;
-		}
-		if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
-			volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
-			(void)r;
-		}
-		WDT_HIT();
-	}
-
-	c = 0;
-	for(;;) {
-		if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
-			AT91C_BASE_SSC->SSC_THR = ToSend[c];
-			c++;
-			if(c >= ToSendMax) {
-				break;
-			}
-		}
-		if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
-			volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
-			(void)r;
+	for(int c = 0; c < ToSendMax; c++) {
+		uint8_t data = ToSend[c];
+		for (int i = 0; i < 8; i++) {
+			uint16_t send_word = (data & 0x80) ? 0x0000 : 0xffff;
+			while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
+			AT91C_BASE_SSC->SSC_THR = send_word;
+			while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
+			AT91C_BASE_SSC->SSC_THR = send_word;
+			data <<= 1;
 		}
 		WDT_HIT();
 	}
-	LED_B_OFF(); // Finished sending
+	LED_B_OFF();
 }
 
 
@@ -838,19 +805,14 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
 
 	ToSendReset();
 
-	// Establish initial reference level
-	for(i = 0; i < 40; i++) {
-		ToSendStuffBit(1);
-	}
 	// Send SOF
 	for(i = 0; i < 10; i++) {
 		ToSendStuffBit(0);
 	}
+	ToSendStuffBit(1);
+	ToSendStuffBit(1);
 
 	for(i = 0; i < len; i++) {
-		// Stop bits/EGT
-		ToSendStuffBit(1);
-		ToSendStuffBit(1);
 		// Start bit
 		ToSendStuffBit(0);
 		// Data bits
@@ -863,19 +825,18 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
 			}
 			b >>= 1;
 		}
+		// Stop bit
+		ToSendStuffBit(1);
 	}
+
 	// Send EOF
-	ToSendStuffBit(1);
 	for(i = 0; i < 10; i++) {
 		ToSendStuffBit(0);
 	}
-	for(i = 0; i < 8; i++) {
-		ToSendStuffBit(1);
-	}
+	ToSendStuffBit(1);
 
-	// And then a little more, to make sure that the last character makes
-	// it out before we switch to rx mode.
-	for(i = 0; i < 24; i++) {
+	// ensure that last byte is filled up
+	for(i = 0; i < 8; i++) {
 		ToSendStuffBit(1);
 	}
 
@@ -891,13 +852,102 @@ static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len)
 {
 	CodeIso14443bAsReader(cmd, len);
 	TransmitFor14443b();
-	if (tracing) {
-		uint8_t parity[MAX_PARITY_SIZE];
-		GetParity(cmd, len, parity);
-		LogTrace(cmd,len, 0, 0, parity, TRUE);
+	LogTrace(cmd,len, 0, 0, NULL, true);
+}
+
+/* Sends an APDU to the tag
+ * TODO: check CRC and preamble
+ */
+int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response)
+{
+	LED_A_ON();
+	uint8_t message_frame[message_length + 4];
+	// PCB
+	message_frame[0] = 0x0A | pcb_blocknum;
+	pcb_blocknum ^= 1;
+	// CID
+	message_frame[1] = 0;
+	// INF
+	memcpy(message_frame + 2, message, message_length);
+	// EDC (CRC)
+	ComputeCrc14443(CRC_14443_B, message_frame, message_length + 2, &message_frame[message_length + 2], &message_frame[message_length + 3]);
+	// send
+	CodeAndTransmit14443bAsReader(message_frame, message_length + 4);
+	// get response
+	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, true);
+	FpgaDisableTracing();
+	if(Demod.len < 3)
+	{
+		LED_A_OFF();
+		return 0;
+	}
+	// TODO: Check CRC
+	// copy response contents
+	if(response != NULL)
+	{
+		memcpy(response, Demod.output, Demod.len);
 	}
+	LED_A_OFF();
+	return Demod.len;
 }
 
+/* Perform the ISO 14443 B Card Selection procedure
+ * Currently does NOT do any collision handling.
+ * It expects 0-1 cards in the device's range.
+ * TODO: Support multiple cards (perform anticollision)
+ * TODO: Verify CRC checksums
+ */
+int iso14443b_select_card()
+{
+	// WUPB command (including CRC)
+	// Note: WUPB wakes up all tags, REQB doesn't wake up tags in HALT state
+	static const uint8_t wupb[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
+	// ATTRIB command (with space for CRC)
+	uint8_t attrib[] = { 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00};
+
+	// first, wake up the tag
+	CodeAndTransmit14443bAsReader(wupb, sizeof(wupb));
+	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, true);
+	// ATQB too short?
+	if (Demod.len < 14)
+	{
+		return 2;
+	}
+
+    // select the tag
+    // copy the PUPI to ATTRIB
+    memcpy(attrib + 1, Demod.output + 1, 4);
+    /* copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into
+    ATTRIB (Param 3) */
+    attrib[7] = Demod.output[10] & 0x0F;
+    ComputeCrc14443(CRC_14443_B, attrib, 9, attrib + 9, attrib + 10);
+    CodeAndTransmit14443bAsReader(attrib, sizeof(attrib));
+    GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, true);
+    // Answer to ATTRIB too short?
+    if(Demod.len < 3)
+	{
+		return 2;
+	}
+	// reset PCB block number
+	pcb_blocknum = 0;
+	return 1;
+}
+
+// Set up ISO 14443 Type B communication (similar to iso14443a_setup)
+void iso14443b_setup() {
+	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+	// Set up the synchronous serial port
+	FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
+	// connect Demodulated Signal to ADC:
+	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
+
+	// Signal field is on with the appropriate LED
+    LED_D_ON();
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
+
+	DemodReset();
+	UartReset();
+}
 
 //-----------------------------------------------------------------------------
 // Read a SRI512 ISO 14443B tag.
@@ -910,9 +960,7 @@ static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len)
 //-----------------------------------------------------------------------------
 void ReadSTMemoryIso14443b(uint32_t dwLast)
 {
-	clear_trace();
-	set_tracing(TRUE);
-
+	LED_A_ON();
 	uint8_t i = 0x00;
 
 	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
@@ -923,78 +971,83 @@ void ReadSTMemoryIso14443b(uint32_t dwLast)
 	SpinDelay(200);
 
 	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
-	FpgaSetupSsc();
+	FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
 
 	// Now give it time to spin up.
 	// Signal field is on with the appropriate LED
 	LED_D_ON();
-	FpgaWriteConfWord(
-		FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
 	SpinDelay(200);
 
+	clear_trace();
+	set_tracing(true);
+
 	// First command: wake up the tag using the INITIATE command
 	uint8_t cmd1[] = {0x06, 0x00, 0x97, 0x5b};
-
 	CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
-//    LED_A_ON();
-	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
-//    LED_A_OFF();
+	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, true);
 
 	if (Demod.len == 0) {
-	DbpString("No response from tag");
-	return;
+		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+		DbpString("No response from tag");
+		LEDsoff();
+		return;
 	} else {
-	Dbprintf("Randomly generated UID from tag (+ 2 byte CRC): %02x %02x %02x",
-		Demod.output[0], Demod.output[1], Demod.output[2]);
+		Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x",
+				Demod.output[0], Demod.output[1], Demod.output[2]);
 	}
+
 	// There is a response, SELECT the uid
 	DbpString("Now SELECT tag:");
 	cmd1[0] = 0x0E; // 0x0E is SELECT
 	cmd1[1] = Demod.output[0];
 	ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
 	CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
-
-//    LED_A_ON();
-	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
-//    LED_A_OFF();
+	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, true);
 	if (Demod.len != 3) {
+		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 		Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
+		LEDsoff();
 		return;
 	}
 	// Check the CRC of the answer:
 	ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]);
 	if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) {
+		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 		DbpString("CRC Error reading select response.");
+		LEDsoff();
 		return;
 	}
 	// Check response from the tag: should be the same UID as the command we just sent:
 	if (cmd1[1] != Demod.output[0]) {
+		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 		Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]);
+		LEDsoff();
 		return;
 	}
+
 	// Tag is now selected,
 	// First get the tag's UID:
 	cmd1[0] = 0x0B;
 	ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]);
 	CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one
-
-//    LED_A_ON();
-	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
-//    LED_A_OFF();
+	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, true);
 	if (Demod.len != 10) {
+		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 		Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
+		LEDsoff();
 		return;
 	}
 	// The check the CRC of the answer (use cmd1 as temporary variable):
 	ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]);
 	if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) {
 		Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
-			(cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]);
+				(cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]);
 		// Do not return;, let's go on... (we should retry, maybe ?)
 	}
 	Dbprintf("Tag UID (64 bits): %08x %08x",
-		(Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
-		(Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]);
+			(Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
+			(Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]);
 
 	// Now loop to read all 16 blocks, address from 0 to last block
 	Dbprintf("Tag memory dump, block 0 to %d", dwLast);
@@ -1009,30 +1062,32 @@ void ReadSTMemoryIso14443b(uint32_t dwLast)
 		cmd1[1] = i;
 		ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
 		CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
-
-//	    LED_A_ON();
-		GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
-//	    LED_A_OFF();
+		GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, true);
 		if (Demod.len != 6) { // Check if we got an answer from the tag
+			FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 			DbpString("Expected 6 bytes from tag, got less...");
+			LEDsoff();
 			return;
 		}
 		// The check the CRC of the answer (use cmd1 as temporary variable):
 		ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]);
 		if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) {
 			Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
-				(cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]);
+					(cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]);
 			// Do not return;, let's go on... (we should retry, maybe ?)
 		}
 		// Now print out the memory location:
 		Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i,
-			(Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0],
-			(Demod.output[4]<<8)+Demod.output[5]);
+				(Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0],
+				(Demod.output[4]<<8)+Demod.output[5]);
 		if (i == 0xff) {
 			break;
 		}
 		i++;
 	}
+	
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+	LEDsoff();
 }
 
 
@@ -1050,27 +1105,23 @@ void ReadSTMemoryIso14443b(uint32_t dwLast)
  * Memory usage for this function, (within BigBuf)
  * Last Received command (reader->tag) - MAX_FRAME_SIZE
  * Last Received command (tag->reader) - MAX_FRAME_SIZE
- * DMA Buffer - DMA_BUFFER_SIZE
+ * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE
  * Demodulated samples received - all the rest
  */
 void RAMFUNC SnoopIso14443b(void)
 {
-	// We won't start recording the frames that we acquire until we trigger;
-	// a good trigger condition to get started is probably when we see a
-	// response from the tag.
-	int triggered = TRUE;			// TODO: set and evaluate trigger condition
-
+	LED_A_ON();
 	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
 	BigBuf_free();
 
 	clear_trace();
-	set_tracing(TRUE);
+	set_tracing(true);
 
 	// The DMA buffer, used to stream samples from the FPGA
-	int8_t *dmaBuf = (int8_t*) BigBuf_malloc(DMA_BUFFER_SIZE);
+	uint16_t *dmaBuf = (uint16_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE * sizeof(uint16_t));
 	int lastRxCounter;
-	int8_t *upTo;
-	int ci, cq;
+	uint16_t *upTo;
+	int8_t ci, cq;
 	int maxBehindBy = 0;
 
 	// Count of samples received so far, so that we can include timing
@@ -1085,67 +1136,65 @@ void RAMFUNC SnoopIso14443b(void)
 	Dbprintf("  Trace: %i bytes", BigBuf_max_traceLen());
 	Dbprintf("  Reader -> tag: %i bytes", MAX_FRAME_SIZE);
 	Dbprintf("  tag -> Reader: %i bytes", MAX_FRAME_SIZE);
-	Dbprintf("  DMA: %i bytes", DMA_BUFFER_SIZE);
+	Dbprintf("  DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE);
 
-	// Signal field is off, no reader signal, no tag signal
-	LEDsoff();
+	// Signal field is off
+	LED_D_OFF();
 
 	// And put the FPGA in the appropriate mode
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_SNOOP);
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_SNOOP_IQ);
 	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
 
 	// Setup for the DMA.
-	FpgaSetupSsc();
+	FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
 	upTo = dmaBuf;
-	lastRxCounter = DMA_BUFFER_SIZE;
-	FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE);
-	uint8_t parity[MAX_PARITY_SIZE];
+	lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
+	FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
+
+	bool TagIsActive = false;
+	bool ReaderIsActive = false;
+	// We won't start recording the frames that we acquire until we trigger.
+	// A good trigger condition to get started is probably when we see a
+	// reader command
+	bool triggered = false;
 
-	bool TagIsActive = FALSE;
-	bool ReaderIsActive = FALSE;
-	
 	// And now we loop, receiving samples.
 	for(;;) {
-		int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
-								(DMA_BUFFER_SIZE-1);
+		int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1);
 		if(behindBy > maxBehindBy) {
 			maxBehindBy = behindBy;
 		}
 
-		if(behindBy < 2) continue;
-
-		ci = upTo[0];
-		cq = upTo[1];
-		upTo += 2;
-		lastRxCounter -= 2;
-		if(upTo >= dmaBuf + DMA_BUFFER_SIZE) {
-			upTo = dmaBuf;
-			lastRxCounter += DMA_BUFFER_SIZE;
-			AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
-			AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
-			WDT_HIT();
-			if(behindBy > (9*DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not?
-				Dbprintf("blew circular buffer! behindBy=%d", behindBy);
-				break;
-			}
-			if(!tracing) {
-				DbpString("Reached trace limit");
+		if(behindBy < 1) continue;
+
+		ci = *upTo>>8;
+		cq = *upTo;
+		upTo++;
+		lastRxCounter--;
+		if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) {               // we have read all of the DMA buffer content.
+			upTo = dmaBuf;                                             // start reading the circular buffer from the beginning again
+			lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
+			if(behindBy > (9*ISO14443B_DMA_BUFFER_SIZE/10)) { 
+				Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
 				break;
 			}
+		}
+		if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) {              // DMA Counter Register had reached 0, already rotated.
+			AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;          // refresh the DMA Next Buffer and
+			AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE;  // DMA Next Counter registers
+			WDT_HIT();
 			if(BUTTON_PRESS()) {
 				DbpString("cancelled");
 				break;
 			}
 		}
 
-		samples += 2;
+		samples++;
 
 		if (!TagIsActive) {							// no need to try decoding reader data if the tag is sending
 			if(Handle14443bUartBit(ci & 0x01)) {
-				if(triggered && tracing) {
-					//GetParity(Uart.output, Uart.byteCnt, parity);
-					LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
-				}
+				triggered = true;
+				LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, true);
 				/* And ready to receive another command. */
 				UartReset();
 				/* And also reset the demod code, which might have been */
@@ -1153,31 +1202,21 @@ void RAMFUNC SnoopIso14443b(void)
 				DemodReset();
 			}
 			if(Handle14443bUartBit(cq & 0x01)) {
-				if(triggered && tracing) {
-					//GetParity(Uart.output, Uart.byteCnt, parity);
-					LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
-				}
+				triggered = true;
+				LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, true);
 				/* And ready to receive another command. */
 				UartReset();
 				/* And also reset the demod code, which might have been */
 				/* false-triggered by the commands from the reader. */
 				DemodReset();
 			}
-			ReaderIsActive = (Uart.state != STATE_UNSYNCD);
+			ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF);
 		}
 
-		if(!ReaderIsActive) {						// no need to try decoding tag data if the reader is sending - and we cannot afford the time
-			if(Handle14443bSamplesDemod(ci & 0xFE, cq & 0xFE)) {
-
+		if(!ReaderIsActive && triggered) {						// no need to try decoding tag data if the reader is sending or not yet triggered
+			if(Handle14443bSamplesDemod(ci/2, cq/2)) {
 				//Use samples as a time measurement
-				if(tracing)
-				{
-					uint8_t parity[MAX_PARITY_SIZE];
-					//GetParity(Demod.output, Demod.len, parity);
-					LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
-				}
-				triggered = TRUE;
-
+				LogTrace(Demod.output, Demod.len, samples, samples, NULL, false);
 				// And ready to receive another response.
 				DemodReset();
 			}
@@ -1187,14 +1226,13 @@ void RAMFUNC SnoopIso14443b(void)
 	}
 
 	FpgaDisableSscDma();
-	LEDsoff();
-	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
 	DbpString("Snoop statistics:");
 	Dbprintf("  Max behind by: %i", maxBehindBy);
 	Dbprintf("  Uart State: %x", Uart.state);
 	Dbprintf("  Uart ByteCnt: %i", Uart.byteCnt);
 	Dbprintf("  Uart ByteCntMax: %i", Uart.byteCntMax);
 	Dbprintf("  Trace length: %i", BigBuf_get_traceLen());
+	LEDsoff();
 }
 
 
@@ -1212,39 +1250,36 @@ void RAMFUNC SnoopIso14443b(void)
  */
 void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[])
 {
+	LED_A_ON();
 	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
 	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
-	FpgaSetupSsc();
 
-	set_tracing(TRUE);
-	
-/* 	if(!powerfield) {
-		// Make sure that we start from off, since the tags are stateful;
-		// confusing things will happen if we don't reset them between reads.
-		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-		LED_D_OFF();
-		SpinDelay(200);
-	}
- */
-
-	// if(!GETBIT(GPIO_LED_D))	{	// if field is off
-		// FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
-		// // Signal field is on with the appropriate LED
-		// LED_D_ON();
-		// SpinDelay(200);
-	// }
-
-	CodeAndTransmit14443bAsReader(data, datalen);
+	// switch field on and give tag some time to power up
+	LED_D_ON();
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_SHALLOW_MOD);
+	FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
+	SpinDelay(10);
+
+	if (datalen){
+		set_tracing(true);
+		
+		CodeAndTransmit14443bAsReader(data, datalen);
+
+		if(recv) {
+			GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, true);
+			FpgaDisableTracing();
+			uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE);
+			cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen);
+		}
 
-	if(recv) {
-		GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
-		uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE);
-		cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen);
+		FpgaDisableTracing();
 	}
-	
+
 	if(!powerfield) {
 		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 		LED_D_OFF();
 	}
+	
+	LED_A_OFF();
 }