X-Git-Url: http://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/15c4dc5ace24e6081d1597b011148f156cdd599e..cd2f1acd1b4e1458422462f9584a06900f8f3719:/bootrom/flash-reset.s?ds=sidebyside

diff --git a/bootrom/flash-reset.s b/bootrom/flash-reset.s
index a94d048a..95c8f590 100644
--- a/bootrom/flash-reset.s
+++ b/bootrom/flash-reset.s
@@ -1,43 +1,51 @@
-.extern CopyBootToRAM
-    
+@-----------------------------------------------------------------------------
+@ This code is licensed to you under the terms of the GNU GPL, version 2 or,
+@ at your option, any later version. See the LICENSE.txt file for the text of
+@ the license.
+@-----------------------------------------------------------------------------
+@ Reset vector for running from FLASH
+@-----------------------------------------------------------------------------
+
 .section .startup,"ax"
-         .code 32
-         .align 0
+
+.arm
 
 .global flashstart
 flashstart:
-    b       Reset
-    b       UndefinedInstruction
-    b       SoftwareInterrupt
-    b       PrefetchAbort
-    b       DataAbort
-    b       Reserved
-    b       Irq
-    b       Fiq
-
-Reset:
-    ldr     sp,     .stack_end	@ initialize stack pointer to top of RAM
-    bl      CopyBootToRAM			@ copy bootloader to RAM (in case the
-    								@ user re-flashes the bootloader)
-    ldr     r3,     .bootphase2_start	@ start address of RAM bootloader
-    bx      r3						@ jump to it
-
-	.stack_end:
-	.word _stack_end
-	.bootphase2_start:
-	.word __bootphase2_start__
-
-Fiq:
-    b       Fiq
-UndefinedInstruction:
-    b       UndefinedInstruction
-SoftwareInterrupt:
-    b       SoftwareInterrupt
-PrefetchAbort:
-    b       PrefetchAbort
-DataAbort:
-    b       DataAbort
-Reserved:
-    b       Reserved
-Irq:
-    b       Irq
+	b	reset
+	b	undefined_instruction
+	b	software_interrupt
+	b	prefetch_abort
+	b	data_abort
+	b	. @reserved
+	ldr	pc, [pc,#-0xF20]	@ IRQ - read the AIC
+	b	fiq
+
+reset:
+	ldr	sp, =_stack_end		@ initialize stack pointer to top of RAM
+
+	@ copy bootloader to RAM (in case the user re-flashes the bootloader)
+	ldr	r0, =__bootphase2_src_start__
+	ldr	r1, =__bootphase2_start__
+	ldr	r2, =__bootphase2_end__
+1:
+	ldr	r3, [r0], #4
+	str	r3, [r1], #4
+	cmp	r1, r2
+	blo	1b
+
+	ldr	r3, =ram_start		@ start address of RAM bootloader
+	bx	r3			@ jump to it
+
+	.ltorg
+
+undefined_instruction:
+	b	.
+software_interrupt:
+	b	.
+prefetch_abort:
+	b	.
+data_abort:
+	b	.
+fiq:
+	b	.