X-Git-Url: http://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/1d99b0df4a0c1a2f42fe23ae32cc8f3d090bc985..bd20f8f47847787e1f3e933043933272908c5beb:/armsrc/legicrf.c diff --git a/armsrc/legicrf.c b/armsrc/legicrf.c index 7c3460af..c785542d 100644 --- a/armsrc/legicrf.c +++ b/armsrc/legicrf.c @@ -1,20 +1,29 @@ -/* - * LEGIC RF simulation code - * - * (c) 2009 Henryk Plötz - */ - -#include +//----------------------------------------------------------------------------- +// (c) 2009 Henryk Plötz +// +// This code is licensed to you under the terms of the GNU GPL, version 2 or, +// at your option, any later version. See the LICENSE.txt file for the text of +// the license. +//----------------------------------------------------------------------------- +// LEGIC RF simulation code +//----------------------------------------------------------------------------- +#include "proxmark3.h" #include "apps.h" +#include "util.h" +#include "string.h" + #include "legicrf.h" -#include "unistd.h" -#include "stdint.h" +#include "legic_prng.h" +#include "crc.h" static struct legic_frame { int bits; - uint16_t data; + uint32_t data; } current_frame; + +static crc_t legic_crc; + AT91PS_TC timer; static void setup_timer(void) @@ -43,33 +52,35 @@ static void setup_timer(void) /* Send a frame in reader mode, the FPGA must have been set up by * LegicRfReader */ -static void frame_send_rwd(uint16_t data, int bits) +static void frame_send_rwd(uint32_t data, int bits) { /* Start clock */ timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; while(timer->TC_CV > 1) ; /* Wait till the clock has reset */ - + int i; for(i=0; iTC_CV; int pause_end = starttime + RWD_TIME_PAUSE, bit_end; int bit = data & 1; data = data >> 1; - - if(bit) { + + if(bit ^ legic_prng_get_bit()) { bit_end = starttime + RWD_TIME_1; } else { bit_end = starttime + RWD_TIME_0; } - + /* RWD_TIME_PAUSE time off, then some time on, so that the complete bit time is * RWD_TIME_x, where x is the bit to be transmitted */ AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; while(timer->TC_CV < pause_end) ; AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; + legic_prng_forward(1); /* bit duration is longest. use this time to forward the lfsr */ + while(timer->TC_CV < bit_end) ; } - + { /* One final pause to mark the end of the frame */ int pause_end = timer->TC_CV + RWD_TIME_PAUSE; @@ -77,19 +88,20 @@ static void frame_send_rwd(uint16_t data, int bits) while(timer->TC_CV < pause_end) ; AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; } - + /* Reset the timer, to measure time until the start of the tag frame */ timer->TC_CCR = AT91C_TC_SWTRG; + while(timer->TC_CV > 1) ; /* Wait till the clock has reset */ } /* Receive a frame from the card in reader emulation mode, the FPGA and * timer must have been set up by LegicRfReader and frame_send_rwd. - * + * * The LEGIC RF protocol from card to reader does not include explicit * frame start/stop information or length information. The reader must * know beforehand how many bits it wants to receive. (Notably: a card * sending a stream of 0-bits is indistinguishable from no card present.) - * + * * Receive methodology: There is a fancy correlator in hi_read_rx_xcorr, but * I'm not smart enough to use it. Instead I have patched hi_read_tx to output * the ADC signal with hysteresis on SSP_DIN. Bit-bang that signal and look @@ -98,30 +110,44 @@ static void frame_send_rwd(uint16_t data, int bits) * expected for a 212kHz subcarrier, this was a 1-bit. For timing we use the * timer that's still running from frame_send_rwd in order to get a synchronization * with the frame that we just sent. - * - * FIXME: Because we're relying on the hysteresis to just do the right thing + * + * FIXME: Because we're relying on the hysteresis to just do the right thing * the range is severely reduced (and you'll probably also need a good antenna). - * So this should be fixed some time in the future for a proper receiver. + * So this should be fixed some time in the future for a proper receiver. */ -static void frame_receive_rwd(struct legic_frame * const f, int bits) +static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt) { - uint16_t the_bit = 1; /* Use a bitmask to save on shifts */ - uint16_t data=0; + uint32_t the_bit = 1; /* Use a bitmask to save on shifts */ + uint32_t data=0; int i, old_level=0, edges=0; int next_bit_at = TAG_TIME_WAIT; - - + + if(bits > 16) bits = 16; AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; + /* we have some time now, precompute the cipher + * since we cannot compute it on the fly while reading */ + legic_prng_forward(2); + + if(crypt) + { + for(i=0; iTC_CV < next_bit_at) ; + next_bit_at += TAG_TIME_BIT; - + for(i=0; iTC_CV < next_bit_at) { int level = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN); if(level != old_level) @@ -129,17 +155,20 @@ static void frame_receive_rwd(struct legic_frame * const f, int bits) old_level = level; } next_bit_at += TAG_TIME_BIT; - + if(edges > 20 && edges < 60) { /* expected are 42 edges */ - data |= the_bit; + data ^= the_bit; } - - + the_bit <<= 1; } - + f->data = data; f->bits = bits; + + /* Reset the timer, to synchronize the next frame */ + timer->TC_CCR = AT91C_TC_SWTRG; + while(timer->TC_CV > 1) ; /* Wait till the clock has reset */ } static void frame_clean(struct legic_frame * const f) @@ -148,38 +177,133 @@ static void frame_clean(struct legic_frame * const f) f->bits = 0; } -void LegicRfReader(void) +static uint32_t perform_setup_phase_rwd(int iv) { + + /* Switch on carrier and let the tag charge for 1ms */ + AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; + SpinDelay(1); + + legic_prng_init(0); /* no keystream yet */ + frame_send_rwd(iv, 7); + legic_prng_init(iv); + + frame_clean(¤t_frame); + frame_receive_rwd(¤t_frame, 6, 1); + legic_prng_forward(1); /* we wait anyways */ + while(timer->TC_CV < 387) ; /* ~ 258us */ + frame_send_rwd(0x19, 6); + + return current_frame.data; +} + +static void LegicCommonInit(void) { SetAdcMuxFor(GPIO_MUXSEL_HIPKD); FpgaSetupSsc(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX); - + /* Bitbang the transmitter */ AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; - + setup_timer(); - - while(!BUTTON_PRESS()) { - /* Switch on carrier and let the tag charge for 1ms */ - AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; - SpinDelay(1); - - LED_A_ON(); - frame_send_rwd(queries[0].data, queries[0].bits); - LED_A_OFF(); - - frame_clean(¤t_frame); - LED_B_ON(); - frame_receive_rwd(¤t_frame, responses[0].bits); - LED_B_OFF(); - - /* Switch off carrier, make sure tag is reset */ - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; - SpinDelay(10); - - WDT_HIT(); + + crc_init(&legic_crc, 4, 0x19 >> 1, 0x5, 0); +} + +static void switch_off_tag_rwd(void) +{ + /* Switch off carrier, make sure tag is reset */ + AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; + SpinDelay(10); + + WDT_HIT(); +} +/* calculate crc for a legic command */ +static int LegicCRC(int byte_index, int value, int cmd_sz) { + crc_clear(&legic_crc); + crc_update(&legic_crc, 1, 1); /* CMD_READ */ + crc_update(&legic_crc, byte_index, cmd_sz-1); + crc_update(&legic_crc, value, 8); + return crc_finish(&legic_crc); +} + +int legic_read_byte(int byte_index, int cmd_sz) { + int byte; + + legic_prng_forward(4); /* we wait anyways */ + while(timer->TC_CV < 387) ; /* ~ 258us + 100us*delay */ + + frame_send_rwd(1 | (byte_index << 1), cmd_sz); + frame_clean(¤t_frame); + + frame_receive_rwd(¤t_frame, 12, 1); + + byte = current_frame.data & 0xff; + if( LegicCRC(byte_index, byte, cmd_sz) != (current_frame.data >> 8) ) { + Dbprintf("!!! crc mismatch: expected %x but got %x !!!", LegicCRC(byte_index, current_frame.data & 0xff, cmd_sz), current_frame.data >> 8); + return -1; } - + + return byte; +} + +/* legic_write_byte() is not included, however it's trivial to implement + * and here are some hints on what remains to be done: + * + * * assemble a write_cmd_frame with crc and send it + * * wait until the tag sends back an ACK ('1' bit unencrypted) + * * forward the prng based on the timing + */ + + +void LegicRfReader(int offset, int bytes) { + int byte_index=0, cmd_sz=0, card_sz=0; + + LegicCommonInit(); + + memset(BigBuf, 0, 1024); + + DbpString("setting up legic card"); + uint32_t tag_type = perform_setup_phase_rwd(0x55); + switch(tag_type) { + case 0x1d: + DbpString("MIM 256 card found, reading card ..."); + cmd_sz = 9; + card_sz = 256; + break; + case 0x3d: + DbpString("MIM 1024 card found, reading card ..."); + cmd_sz = 11; + card_sz = 1024; + break; + default: + Dbprintf("Unknown card format: %x",tag_type); + switch_off_tag_rwd(); + return; + } + if(bytes == -1) { + bytes = card_sz; + } + if(bytes+offset >= card_sz) { + bytes = card_sz-offset; + } + + switch_off_tag_rwd(); //we lost to mutch time with dprintf + perform_setup_phase_rwd(0x55); + + while(byte_index < bytes) { + int r = legic_read_byte(byte_index+offset, cmd_sz); + if(r == -1) { + Dbprintf("aborting"); + switch_off_tag_rwd(); + return; + } + ((uint8_t*)BigBuf)[byte_index] = r; + byte_index++; + } + switch_off_tag_rwd(); + Dbprintf("Card read, use 'hf legic decode' or 'data hexsamples %d' to view results", (bytes+7) & ~7); } +