X-Git-Url: http://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/9c3cc9012a5b4b65ec2063594b511d803ce777c2..a20fe6d61f3f0d9a2f014103cf9a13b39d4ca281:/pcb/proxmark3_fix/CAD/change_log.txt

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+13/11/2015 Change list from original PCB:
+
+Main problem: more then 800 DRC errors when runing that in Eagle. Check out the following changes to make a more reliable PCB. Those are minor cosmetic changes, but ease your life to avoid short circuit.
+
+1. Eagle Layout / DRC rules / Masks / Limit: from 0mil to 16mil, thus ordinary GND and signal vias which smaller then 16mil wont be open at solder stop mask layer.
+
+2. Eagle Layout / DRC rules / Masks / Stop MAX: from 2mil to 0, this way the solder stop mask wont overlap silkscreen drawings. Also as per PCB assembly houses, it's recommended, they set their own scaling for production.
+
+3. Exporting all the parts in the proxmark3 Eagle Layout into a library for minor silkscreen edition: proxmark3_components  merged.lbr
+	- Editing components footprint as was overlapping with top stop mask
+
+4. Adding top, bottom, in1, in2 layer markings in PCB layout for better manufacturing identification	
+
+5. Generating 4 layer CAM files