X-Git-Url: http://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/ba8a80b30c4da36ef10854b53b06d9ff9acaca44..d3ae0de746962dfde04133fc2fdb8e9f6544771a:/armsrc/fpgaloader.c

diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c
index 88fdc4cf..af2f02ab 100644
--- a/armsrc/fpgaloader.c
+++ b/armsrc/fpgaloader.c
@@ -135,52 +135,96 @@ void FpgaSetupSscDma(BYTE *buf, int len)
 	PDC_CONTROL(SSC_BASE) = PDC_RX_ENABLE;
 }
 
-// Download the fpga image starting at FpgaImage and with length FpgaImageLen DWORDs (e.g. 4 bytes)
+static void DownloadFPGA_byte(unsigned char w)
+{
+#define SEND_BIT(x) { if(w & (1<<x) ) HIGH(GPIO_FPGA_DIN); else LOW(GPIO_FPGA_DIN); HIGH(GPIO_FPGA_CCLK); LOW(GPIO_FPGA_CCLK); }
+	SEND_BIT(7);
+	SEND_BIT(6);
+	SEND_BIT(5);
+	SEND_BIT(4);
+	SEND_BIT(3);
+	SEND_BIT(2);
+	SEND_BIT(1);
+	SEND_BIT(0);
+}
+
+// Download the fpga image starting at FpgaImage and with length FpgaImageLen bytes
 // If bytereversal is set: reverse the byte order in each 4-byte word
-static void DownloadFPGA(const DWORD *FpgaImage, DWORD FpgaImageLen, int bytereversal)
+static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int bytereversal)
 {
-	int i, j;
+	int i=0;
 
 	PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_ON);
 	PIO_ENABLE = (1 << GPIO_FPGA_ON);
-	PIO_OUTPUT_DATA_SET = (1 << GPIO_FPGA_ON);
+	HIGH(GPIO_FPGA_ON);		// ensure everything is powered on
 
 	SpinDelay(50);
 
 	LED_D_ON();
 
+	// These pins are inputs
+    PIO_OUTPUT_DISABLE =     (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE);
+	// PIO controls the following pins
+    PIO_ENABLE =             (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE);
+	// Enable pull-ups
+	PIO_NO_PULL_UP_DISABLE = (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE);
+
+	// setup initial logic state
 	HIGH(GPIO_FPGA_NPROGRAM);
 	LOW(GPIO_FPGA_CCLK);
 	LOW(GPIO_FPGA_DIN);
+	// These pins are outputs
 	PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_NPROGRAM)	|
 						(1 << GPIO_FPGA_CCLK)		|
 						(1 << GPIO_FPGA_DIN);
-	SpinDelay(1);
 
+	// enter FPGA configuration mode
 	LOW(GPIO_FPGA_NPROGRAM);
 	SpinDelay(50);
 	HIGH(GPIO_FPGA_NPROGRAM);
 
-	for(i = 0; i < FpgaImageLen; i++) {
-		DWORD v = FpgaImage[i];
-		unsigned char w;
-		for(j = 0; j < 4; j++) {
-			if(!bytereversal) 
-				w = v >>(j*8);
-			else
-				w = v >>((3-j)*8);
-#define SEND_BIT(x) { if(w & (1<<x) ) HIGH(GPIO_FPGA_DIN); else LOW(GPIO_FPGA_DIN); HIGH(GPIO_FPGA_CCLK); LOW(GPIO_FPGA_CCLK); }
-			SEND_BIT(7);
-			SEND_BIT(6);
-			SEND_BIT(5);
-			SEND_BIT(4);
-			SEND_BIT(3);
-			SEND_BIT(2);
-			SEND_BIT(1);
-			SEND_BIT(0);
+	i=100000;
+	// wait for FPGA ready to accept data signal
+	while ((i) && ( !(PIO_PIN_DATA_STATUS & (1<<GPIO_FPGA_NINIT) ) ) ) {
+		i--;
+	}
+
+	// crude error indicator, leave both red LEDs on and return
+	if (i==0){
+		LED_C_ON();
+		LED_D_ON();
+		return;
+	}
+
+	if(bytereversal) {
+		/* This is only supported for DWORD aligned images */
+		if( ((int)FpgaImage % sizeof(DWORD)) == 0 ) {
+			i=0;
+			while(FpgaImageLen-->0)
+				DownloadFPGA_byte(FpgaImage[(i++)^0x3]);
+			/* Explanation of the magic in the above line: 
+			 * i^0x3 inverts the lower two bits of the integer i, counting backwards
+			 * for each 4 byte increment. The generated sequence of (i++)^3 is
+			 * 3 2 1 0 7 6 5 4 11 10 9 8 15 14 13 12 etc. pp. 
+			 */
 		}
+	} else {
+		while(FpgaImageLen-->0)
+			DownloadFPGA_byte(*FpgaImage++);
 	}
 
+	// continue to clock FPGA until ready signal goes high
+	i=100000;
+	while ( (i--) && ( !(PIO_PIN_DATA_STATUS & (1<<GPIO_FPGA_DONE) ) ) ) {
+		HIGH(GPIO_FPGA_CCLK);
+		LOW(GPIO_FPGA_CCLK);
+	}
+	// crude error indicator, leave both red LEDs on and return
+	if (i==0){
+		LED_C_ON();
+		LED_D_ON();
+		return;
+	}
 	LED_D_OFF();
 }
 
@@ -208,7 +252,7 @@ static int bitparse_init(void * start_address, void *end_address)
 	}
 }
 
-int bitparse_find_section(char section_name, void **section_start, unsigned int *section_length)
+int bitparse_find_section(char section_name, char **section_start, unsigned int *section_length)
 {
 	char *pos = bitparse_headers_start;
 	int result = 0;
@@ -265,24 +309,24 @@ void FpgaDownloadAndGo(void)
 		/* Successfully initialized the .bit parser. Find the 'e' section and
 		 * send its contents to the FPGA.
 		 */
-		void *bitstream_start;
+		char *bitstream_start;
 		unsigned int bitstream_length;
 		if(bitparse_find_section('e', &bitstream_start, &bitstream_length)) {
-			DownloadFPGA((DWORD *)bitstream_start, bitstream_length/4, 0);
+			DownloadFPGA(bitstream_start, bitstream_length, 0);
 			
 			return; /* All done */
 		}
 	}
 	
 	/* Fallback for the old flash image format: Check for the magic marker 0xFFFFFFFF
-	 * 0xAA995566 at address 0x2000. This is raw bitstream with a size of 336,768 bits 
+	 * 0xAA995566 at address 0x102000. This is raw bitstream with a size of 336,768 bits 
 	 * = 10,524 DWORDs, stored as DWORDS e.g. little-endian in memory, but each DWORD
 	 * is still to be transmitted in MSBit first order. Set the invert flag to indicate
 	 * that the DownloadFPGA function should invert every 4 byte sequence when doing
 	 * the bytewise download.
 	 */
-	if( *(DWORD*)0x2000 == 0xFFFFFFFF && *(DWORD*)0x2004 == 0xAA995566 )
-		DownloadFPGA((DWORD *)0x2000, 10524, 1);
+	if( *(DWORD*)0x102000 == 0xFFFFFFFF && *(DWORD*)0x102004 == 0xAA995566 )
+		DownloadFPGA((char*)0x102000, 10524*4, 1);
 }
 
 void FpgaGatherVersion(char *dst, int len)
@@ -290,26 +334,26 @@ void FpgaGatherVersion(char *dst, int len)
 	char *fpga_info; 
 	unsigned int fpga_info_len;
 	dst[0] = 0;
-	if(!bitparse_find_section('e', (void**)&fpga_info, &fpga_info_len)) {
+	if(!bitparse_find_section('e', &fpga_info, &fpga_info_len)) {
 		strncat(dst, "FPGA image: legacy image without version information", len-1);
 	} else {
 		strncat(dst, "FPGA image built", len-1);
 		/* USB packets only have 48 bytes data payload, so be terse */
 #if 0
-		if(bitparse_find_section('a', (void**)&fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
+		if(bitparse_find_section('a', &fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
 			strncat(dst, " from ", len-1);
 			strncat(dst, fpga_info, len-1);
 		}
-		if(bitparse_find_section('b', (void**)&fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
+		if(bitparse_find_section('b', &fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
 			strncat(dst, " for ", len-1);
 			strncat(dst, fpga_info, len-1);
 		}
 #endif
-		if(bitparse_find_section('c', (void**)&fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
+		if(bitparse_find_section('c', &fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
 			strncat(dst, " on ", len-1);
 			strncat(dst, fpga_info, len-1);
 		}
-		if(bitparse_find_section('d', (void**)&fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
+		if(bitparse_find_section('d', &fpga_info, &fpga_info_len) && fpga_info[fpga_info_len-1] == 0 ) {
 			strncat(dst, " at ", len-1);
 			strncat(dst, fpga_info, len-1);
 		}