X-Git-Url: http://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/e3ae0257834f7d134c7f80db6fa23668b5a5fa6d..46cd40465a32be6ec9059aa8673ef9d84adb9517:/bootrom/flash-reset.s?ds=inline diff --git a/bootrom/flash-reset.s b/bootrom/flash-reset.s index 64134033..8b58636f 100644 --- a/bootrom/flash-reset.s +++ b/bootrom/flash-reset.s @@ -1,43 +1,51 @@ -.extern CopyBootToRAM - -.section .startup,"ax" - .code 32 - .align 0 - -.global flashstart -flashstart: - b Reset - b UndefinedInstruction - b SoftwareInterrupt - b PrefetchAbort - b DataAbort - b Reserved - b Irq - b Fiq - -Reset: - ldr sp, .stack_end @ initialize stack pointer to top of RAM - bl CopyBootToRAM @ copy bootloader to RAM (in case the - @ user re-flashes the bootloader) - ldr r3, .bootphase2_start @ start address of RAM bootloader - bx r3 @ jump to it - - .stack_end: - .word _stack_end - .bootphase2_start: - .word __bootphase2_start__ - -Fiq: - b Fiq -UndefinedInstruction: - b UndefinedInstruction -SoftwareInterrupt: - b SoftwareInterrupt -PrefetchAbort: - b PrefetchAbort -DataAbort: - b DataAbort -Reserved: - b Reserved -Irq: - b Irq +@----------------------------------------------------------------------------- +@ This code is licensed to you under the terms of the GNU GPL, version 2 or, +@ at your option, any later version. See the LICENSE.txt file for the text of +@ the license. +@----------------------------------------------------------------------------- +@ Reset vector for running from FLASH +@----------------------------------------------------------------------------- + +.extern CopyBootToRAM + +.section .startup,"ax" + .code 32 + .align 0 + +.global flashstart +flashstart: + b Reset + b UndefinedInstruction + b SoftwareInterrupt + b PrefetchAbort + b DataAbort + b Reserved + b Irq + b Fiq + +Reset: + ldr sp, .stack_end @ initialize stack pointer to top of RAM + bl CopyBootToRAM @ copy bootloader to RAM (in case the + @ user re-flashes the bootloader) + ldr r3, .bootphase2_start @ start address of RAM bootloader + bx r3 @ jump to it + + .stack_end: + .word _stack_end + .bootphase2_start: + .word __bootphase2_start__ + +Fiq: + b Fiq +UndefinedInstruction: + b UndefinedInstruction +SoftwareInterrupt: + b SoftwareInterrupt +PrefetchAbort: + b PrefetchAbort +DataAbort: + b DataAbort +Reserved: + b Reserved +Irq: + b Irq