From: d18c7db <d18c7db@ef4ab9da-24cd-11de-8aaa-f3a34680c41f>
Date: Thu, 16 Apr 2009 23:09:21 +0000 (+0000)
Subject: Updated logic in lo_read.v so it's much tidier now, better timing.
X-Git-Tag: v1.0.0~609
X-Git-Url: http://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/commitdiff_plain/1c38843b3f0b808f06a468162667bf96d235363d

Updated logic in lo_read.v so it's much tidier now, better timing.
Commented source and recompiled FPGA to new fpgaimg.c
---

diff --git a/armsrc/fpgaimg.c b/armsrc/fpgaimg.c
index 7e01dc19..05dade13 100644
--- a/armsrc/fpgaimg.c
+++ b/armsrc/fpgaimg.c
@@ -5,7 +5,7 @@
 //// Design name: 	fpga-placed.ncd
 //// Architecture:	spartan2
 //// Part:        	2s30vq100
-//// Date:        	Thu Apr 09 16:25:33 2009
+//// Date:        	Fri Apr 17 10:29:23 2009
 //// Bits:        	336768
 
 #include <proxmark3.h>
@@ -36,7 +36,7 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00000000,
 	0x00000000,
-	0x00000480,
+	0x000004d0,
 	0x00000000,
 	0x00121000,
 	0x00000000,
@@ -54,7 +54,7 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00000000,
 	0x00000000,
-	0x001000c0,
+	0x00084080,
 	0x00000000,
 	0x00020000,
 	0x00000000,
@@ -63,7 +63,7 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00000000,
 	0x00000000,
-	0x00000080,
+	0x00000280,
 	0x00000000,
 	0x00120000,
 	0x00000000,
@@ -81,7 +81,7 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00000000,
 	0x00000000,
-	0x00100480,
+	0x00080480,
 	0x00000000,
 	0x00120000,
 	0x00000000,
@@ -90,7809 +90,7809 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00000000,
 	0x00000000,
-	0x00100480,
+	0x00080480,
 	0x00000000,
 	0xef100060,
 	0x00180006,
 	0x00018000,
 	0x60001800,
-	0x060001a8,
-	0x0062005a,
-	0x80166001,
-	0xd82fc400,
+	0x068001a0,
+	0x0068000b,
+	0x80024000,
+	0x90378690,
 	0x00000000,
-	0xc005fd00,
-	0xfe203320,
-	0x0fc003f2,
-	0x40fc8033,
-	0x602cc203,
-	0x3c00fc40,
-	0x37c02ce0,
+	0xc005fc00,
+	0xcc813b00,
+	0x0ee81334,
+	0x24fc2833,
+	0xc00cd803,
+	0xfe00c790,
+	0x3fe0cc58,
 	0x03300070,
 	0x00000000,
-	0x8010ed40,
-	0xbbc12220,
-	0x0b8802e0,
-	0x80bb000a,
-	0x4008a402,
-	0x3cc0b8e0,
-	0x23d808e6,
-	0x0be00430,
-	0x00000000,
-	0x8805cc90,
-	0xb2902000,
-	0x0b0012c0,
-	0x04b32880,
-	0x40080386,
-	0x0c24b064,
-	0x28d20b24,
-	0x82230170,
-	0x00000000,
-	0xc015ac01,
-	0xbb812205,
-	0x0b8022e2,
-	0x29bb8022,
-	0x08889106,
-	0x2c00b802,
-	0x28c00ba0,
-	0x02f00460,
+	0x8010e050,
+	0x89803220,
+	0x08a80225,
+	0x08b8c022,
+	0xe00ab802,
+	0xee008ba0,
+	0x2dcc88ba,
+	0x82200430,
+	0x00000000,
+	0x8805c8a0,
+	0x0b0028a0,
+	0x0a204204,
+	0xa0b00120,
+	0xc0181002,
+	0xcc008100,
+	0x6cc22a10,
+	0x0a230170,
+	0x00000000,
+	0xc0158003,
+	0xa9842680,
+	0x18a88026,
+	0x00398022,
+	0xc00ab202,
+	0xec008900,
+	0x2ec00a30,
+	0x02300460,
 	0x00000000,
-	0x0015ec00,
-	0xf80032b0,
-	0x8f9603e2,
-	0x00f9c030,
-	0x720c9483,
-	0x2c00f8f0,
-	0x3ec08fa0,
-	0x23100470,
+	0x2015f300,
+	0xcbc93a20,
+	0x0e281326,
+	0x80f888b1,
+	0xc09ca003,
+	0xcc00cb90,
+	0x3ec00eb0,
+	0x03100470,
 	0x00000000,
-	0xe001bc00,
-	0xff003fa1,
-	0x8ff403f8,
-	0x00fd003f,
-	0xe00ff003,
-	0xfc00fc80,
-	0xb7c00ce0,
+	0xe001ae40,
+	0xdd003b70,
+	0x4fd013e4,
+	0x0cf5003f,
+	0xc00fe803,
+	0xfc00ff00,
+	0x3fc00df9,
 	0x03f80060,
 	0x00000000,
-	0x4010ac00,
-	0xf0103e86,
-	0x4e9201ed,
-	0x05f940ba,
-	0x400c20c3,
-	0xec00c240,
-	0x32c00e20,
-	0x23100420,
+	0x4010a502,
+	0xcb003082,
+	0x0fa003e2,
+	0x20c8003e,
+	0xc50da003,
+	0xec84f902,
+	0x32c00cb0,
+	0x03100420,
 	0x00000000,
-	0xc8053c00,
-	0xbbc42ec0,
-	0x089c80ed,
-	0x14b9412a,
-	0x8008b602,
-	0xfc008a00,
-	0xa3c00de0,
+	0xc8052c00,
+	0x01802290,
+	0x0bb102e0,
+	0x0089402f,
+	0xf0088002,
+	0xee20b900,
+	0x23c028a0,
 	0x02320040,
 	0x00000000,
-	0xe0054c10,
-	0xb0c82cf0,
-	0x082802c8,
-	0x00b90828,
-	0x80080002,
-	0x8c008004,
-	0x20c08a20,
-	0x02380050,
-	0x00000000,
-	0x00011e04,
-	0xb4802fe0,
-	0x085812db,
-	0x40bf8029,
-	0x65085806,
-	0xde008590,
-	0x20e009e8,
+	0xc0054000,
+	0x81902050,
+	0x0b2506c4,
+	0x00a0582c,
+	0xc2083002,
+	0xcd00b300,
+	0x66c00030,
+	0x2a380050,
+	0x00000000,
+	0x00011200,
+	0x9f802164,
+	0x0b6826da,
+	0x00a4802d,
+	0xe0297802,
+	0xde00bf84,
+	0x25e008f8,
 	0x02080040,
 	0x00000000,
-	0x68080c00,
-	0xf3003c10,
-	0x0c2103c8,
-	0x40b3003a,
-	0x802c0003,
-	0xac04ca10,
-	0x70c00e20,
+	0x68080102,
+	0xc3003044,
+	0x0f0143cc,
+	0x02e1023c,
+	0xc40d3003,
+	0xcc107300,
+	0x34c40c30,
 	0x03120200,
 	0x00000000,
-	0x401dbc04,
-	0xff003d80,
-	0x2be003fc,
-	0x40f7003f,
-	0x000fd003,
-	0xfd20df10,
-	0x3fd00f60,
-	0x03d00660,
+	0x401db042,
+	0xe700bfd4,
+	0x0fc123fc,
+	0x40df103d,
+	0xc04ef003,
+	0xfc00ff00,
+	0x3bc00ff1,
+	0x03d00260,
 	0x00000000,
-	0xa805ec4c,
-	0xf8003ec0,
-	0x0ca083e2,
-	0x08cb0030,
-	0x800ca013,
-	0xee88c902,
-	0x32f00ca2,
+	0xa805ec00,
+	0xcb0030a8,
+	0x4ca003ec,
+	0x00eb00b2,
+	0xc00fb603,
+	0xec00fb04,
+	0x3ec88fb0,
 	0x032a0070,
 	0x00000000,
 	0x48119c00,
-	0xb4002dc0,
-	0x087002d8,
-	0x040700a1,
-	0xc0287002,
-	0xdc008500,
-	0x21c88a65,
+	0x87002140,
+	0x084002d8,
+	0x00870021,
+	0xc00b7090,
+	0xdc00b704,
+	0x2dc24b70,
 	0x02120460,
 	0x00000000,
-	0xc0009e80,
-	0xb7812f20,
-	0x487812fe,
-	0x00078021,
-	0xa0096802,
-	0xde038788,
-	0x28e4096a,
-	0x0a300020,
+	0xc0009e00,
+	0x878469e0,
+	0x084c02ca,
+	0x00a38861,
+	0xe00b7846,
+	0xde00b780,
+	0x2dec0b78,
+	0x02300020,
 	0x00000000,
-	0x4814cc00,
-	0xb3802cf2,
-	0x083e52cf,
-	0x008b3022,
-	0xa5093a42,
-	0xcc008300,
-	0x28c00b20,
+	0x4814cfc0,
+	0x8359e8d0,
+	0x180c82ca,
+	0x40832020,
+	0xc00b1206,
+	0xcc00b300,
+	0x2cc00b28,
 	0x02120430,
 	0x00000000,
-	0xe815a808,
-	0xfe803fa8,
-	0x0cac03f8,
-	0x82cec033,
-	0x800dee03,
-	0xe800ce00,
-	0xba800de0,
-	0x033a0460,
+	0xe815b902,
+	0xcec13a90,
+	0x0cec03f9,
+	0x00ee8022,
+	0x800fa803,
+	0xe800fa00,
+	0x3e800f64,
+	0x0b3a0460,
 	0x00000000,
-	0x4800e000,
-	0xf8113e10,
-	0x2f0103e0,
-	0x20f8403e,
-	0x000e8403,
-	0xe000f800,
-	0x36000e80,
-	0x03d20030,
+	0x4800c010,
+	0xf8002610,
+	0x2f8403e0,
+	0x20f8003e,
+	0x000f8103,
+	0xe100f800,
+	0x3e000f81,
+	0x83d20030,
 	0x00000000,
-	0x0810e400,
-	0xf9803e48,
-	0x0cb40366,
-	0x00c9a032,
-	0x400c9203,
-	0x2400f908,
-	0x32400f90,
-	0x03020430,
+	0x0810e600,
+	0xc98032d2,
+	0x0f9c03c4,
+	0x80d1a032,
+	0x500fb102,
+	0xa680f900,
+	0x3e400f90,
+	0x0b020410,
 	0x00000000,
-	0x80046400,
-	0xb9c92c60,
-	0x089c0225,
-	0x40b9c022,
-	0x40089c02,
-	0x2400b900,
-	0xa2400b10,
-	0x0a200010,
+	0x80046600,
+	0x81802a50,
+	0x0b9e02e4,
+	0x08890022,
+	0x400b9802,
+	0xe400b900,
+	0x2e400b90,
+	0x02280010,
 	0x00000000,
-	0x18052400,
-	0xb9202e40,
-	0x28908265,
-	0x00ab0022,
-	0x40181002,
-	0x2400b100,
-	0x22410b90,
-	0x02060040,
+	0x18052442,
+	0x89202250,
+	0x0b9042e4,
+	0x00994022,
+	0x414bb012,
+	0xa400b900,
+	0x2e400b90,
+	0x020e0040,
 	0x00000000,
-	0x08140500,
-	0xb1002ec0,
-	0x08100205,
-	0x00b14020,
-	0x50281282,
-	0x4440b168,
-	0x20480b93,
+	0x08040500,
+	0x89002840,
+	0x0b1002c5,
+	0x00810020,
+	0xc10b1006,
+	0xc400b100,
+	0x2c480b91,
 	0x02020100,
 	0x00000000,
-	0xb80d6200,
-	0xf8803e00,
-	0x0c880360,
-	0x00e200b2,
-	0x000ca20b,
-	0x0020f020,
-	0x320c0f02,
-	0x832e0350,
-	0x00000000,
-	0x9815e700,
-	0xfd403d40,
-	0x0fb403de,
-	0x10fd803f,
-	0x400fd282,
-	0xa400fd20,
-	0x3e4c0fd2,
+	0xb80dc202,
+	0xc8003220,
+	0x0f8003ea,
+	0x00d88092,
+	0x000f8003,
+	0xa800f800,
+	0x3e1c0f00,
+	0x03260350,
+	0x00000000,
+	0x981df700,
+	0xf7003e50,
+	0x4fd023ff,
+	0x04fd403e,
+	0x500f9003,
+	0xe400fd08,
+	0x3e448fd2,
 	0x03e60670,
 	0x00000000,
-	0x1805e400,
-	0xc9003e40,
-	0x0c5003e4,
+	0x1805f600,
+	0xcd0033c0,
+	0x0fd003f4,
 	0x00cd0033,
-	0x400cd003,
-	0x240ac900,
-	0x32400c90,
-	0x03060070,
+	0x680c9003,
+	0xe400f900,
+	0x32400c50,
+	0x43060070,
 	0x00000000,
-	0x3810e000,
-	0x88003a00,
-	0x08800260,
-	0x0088a08a,
-	0x200a8042,
-	0x20008800,
-	0x22000880,
-	0x028e0430,
+	0x3810cb80,
+	0x88002201,
+	0x0b8002e0,
+	0x00880022,
+	0x10088002,
+	0xe000b000,
+	0xa2000880,
+	0x02060030,
+	0x00000000,
+	0x0805c522,
+	0x8900a840,
+	0x0b1002c4,
+	0x028100a0,
+	0x50281002,
+	0xc400b100,
+	0x20401810,
+	0x0a820170,
 	0x00000000,
-	0x0805c400,
-	0x01802a40,
-	0x081002c4,
-	0x04838902,
-	0x4a08100a,
-	0x04008100,
-	0x20400810,
-	0x02020170,
+	0x1815a401,
+	0x89202a40,
+	0x0b9202e6,
+	0x00898022,
+	0x40089202,
+	0xe400b900,
+	0x22400810,
+	0x02860460,
 	0x00000000,
-	0x1811a402,
-	0x89002a40,
-	0x28984244,
-	0x00810022,
-	0x500ab082,
-	0x24008900,
-	0x22400890,
-	0x42860460,
-	0x00000000,
-	0xa014a400,
-	0xc9003a62,
-	0x0c9c12e7,
-	0x42c98432,
-	0x400c9923,
-	0x2408c900,
-	0x32400890,
-	0x03280470,
+	0xa014a500,
+	0xc1043a72,
+	0x0f9013e5,
+	0x00c98832,
+	0x400c9803,
+	0xe400f980,
+	0x32402c92,
+	0x03a80470,
 	0x00000000,
-	0x28008408,
-	0xfb203ac4,
-	0x0f90036c,
-	0x00f9c03e,
-	0x400f1043,
-	0xe400f190,
-	0xbe402f10,
-	0x03ca0060,
+	0x2800a400,
+	0xf9843648,
+	0x0f9013e4,
+	0x00f1003c,
+	0x400fb003,
+	0xec00f9a0,
+	0x3c400f90,
+	0x03420060,
 	0x00000000,
-	0x2810a000,
-	0xf8003e12,
-	0x0f880321,
-	0x20f88032,
-	0x002c8403,
-	0x0000c800,
-	0xb2000c80,
+	0x2810a102,
+	0xc8003200,
+	0x0f8803e0,
+	0x00c8403e,
+	0x000d8003,
+	0xe000f800,
+	0x32000f80,
 	0x030a0420,
 	0x00000000,
-	0x28042800,
-	0xbac02ca0,
-	0x0be0822a,
-	0x21fe00a1,
-	0x8008e18a,
-	0x28008a00,
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-	0x28054c00,
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-	0x0b68021c,
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-	0x28081e00,
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+	0xde00f780,
+	0x31e80f6e,
+	0x032a0000,
+	0x00000000,
+	0x081da5a0,
+	0xe2003ec1,
+	0x0fa003e4,
+	0x00fa023c,
+	0x400f8403,
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 	0x00000000,
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+	0x03000070,
 	0x00000000,
-	0x4005fe00,
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-	0xb0091002,
-	0x8c10b340,
-	0x24c00830,
-	0x02080430,
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+	0xe880f920,
+	0x3e800fb0,
 	0x03c20660,
 	0x00000000,
-	0x0001d600,
-	0xce8033e0,
-	0xcdf803fb,
-	0x40f78033,
-	0x600fe803,
-	0xfe00ff80,
-	0x3fe40cfc,
-	0x03000070,
+	0x0005fe00,
+	0xff803ff2,
+	0x0ef80b36,
+	0x44ff803f,
+	0xe00ff803,
+	0x3f00ff80,
+	0x3d200cf8,
+	0x03c00070,
 	0x00000000,
-	0xa8119408,
-	0xdc002140,
-	0x0b7002dc,
-	0x20b60001,
+	0xa8119c00,
+	0xb7002fc0,
+	0x0d540214,
+	0x00b74039,
 	0xc00b5002,
-	0xd480b720,
-	0x2d400a50,
-	0x02aa0460,
-	0x00000000,
-	0x0000b420,
-	0x86002180,
-	0x096002d2,
-	0x08bd0821,
-	0x200b6802,
-	0xd804b400,
-	0x6f8018e0,
-	0x02800020,
+	0x9c00b600,
+	0x2d800a70,
+	0x02ea0460,
 	0x00000000,
-	0x2014c500,
-	0x9800a000,
-	0x0b0082c6,
-	0x20b088a0,
-	0xc00b0002,
-	0xc000b0d0,
-	0x2c340a04,
-	0x02880430,
+	0x00009c00,
+	0xb7002dc0,
+	0x0af00250,
+	0x0035002d,
+	0x400bf002,
+	0x1400b600,
+	0x2d800870,
+	0x02c00020,
 	0x00000000,
-	0xa815a500,
-	0xcba132a0,
-	0x0db803ec,
-	0x00fb0032,
-	0xe0079003,
-	0xe808fb00,
-	0x3ec00c98,
-	0x03aa0460,
+	0x2014cc00,
+	0xb3002cc0,
+	0x491e0243,
+	0x00b01028,
+	0x000b1102,
+	0x8800b008,
+	0x2c800a30,
+	0x02c80430,
+	0x00000000,
+	0xa815ac00,
+	0xfb003fc0,
+	0x2ebc836f,
+	0x80f3801e,
+	0x000f9003,
+	0x2800f900,
+	0x3e800cb0,
+	0x03ea0460,
+	0x00000000,
+	0x8000ec00,
+	0xfb003ec0,
+	0x2fb003a5,
+	0x00f9003e,
+	0x100f8403,
+	0xe100fb00,
+	0x3e900fb0,
+	0x03e00030,
 	0x00000000,
-	0x8000e101,
-	0xfa403ea0,
-	0x039503e8,
-	0x04fa403e,
-	0x1487b107,
-	0xe940fb08,
-	0x3ec20f81,
-	0x82e00030,
-	0x00000000,
-	0x0110f420,
-	0xff0037e0,
-	0x0ff813fe,
-	0x00fd202b,
-	0x800fd803,
-	0x390cff12,
-	0x3fc40fd8,
+	0x0110fc00,
+	0xff003fc0,
+	0x0dea03fe,
+	0xa0cd0033,
+	0xc00cd003,
+	0x3400fc00,
+	0x3fa40ff0,
 	0x03c04430,
 	0x00000000,
-	0x81046380,
-	0xf88022d8,
-	0x0b9422e9,
-	0x20b00022,
-	0x100b2002,
-	0x2b80bb00,
-	0x2ec00b88,
+	0x81046c00,
+	0xbb006ec0,
+	0x08ac02c7,
+	0x8088c020,
+	0xb80d0883,
+	0x6300b980,
+	0x2e800bb0,
 	0x02e04010,
 	0x00000000,
-	0x80052200,
-	0xbac02604,
-	0x8bb602e0,
-	0x41bb0822,
-	0x4a0b8202,
-	0x2400b80b,
-	0x2e02cbb2,
+	0x80052c00,
+	0xbb022cc0,
+	0x098002e8,
+	0x008a802a,
+	0x0848a202,
+	0x28a0b920,
+	0x2e800bb0,
 	0x02e00040,
 	0x00000000,
-	0x08040008,
-	0xb2002000,
-	0x0b3022c0,
-	0x01ba0020,
-	0x000b900a,
-	0x04003000,
-	0x2c000b10,
+	0x08040c00,
+	0xb3002cc0,
+	0x080006e0,
+	0x00800020,
+	0x0009800a,
+	0x4000b200,
+	0x2c800b30,
 	0x02c20100,
 	0x00000000,
-	0x000d6400,
-	0xfb003600,
-	0x0fb003e0,
-	0x00f90032,
-	0x000f8003,
-	0x20007800,
-	0x3e000fa0,
+	0x000d6c00,
+	0xbb002fc0,
+	0x0d8003e8,
+	0x00c8003a,
+	0x400ca003,
+	0x2400f800,
+	0x3e800fb0,
 	0x03c00350,
 	0x00000000,
-	0xa01df400,
-	0xee00bf00,
-	0x0fd003f0,
-	0x00fc0037,
-	0x000fc001,
-	0xf000fc00,
-	0x3d000f40,
-	0x23e80670,
+	0xa01dfc00,
+	0xff003fc0,
+	0x0f4003f0,
+	0x007c003f,
+	0x000f4023,
+	0xb000fc00,
+	0x3f800ff0,
+	0x03e80670,
 	0x00000000,
 	0x00c54103,
 	0x7040dc10,
 	0x37040dc1,
 	0x037040dc,
-	0x1077040d,
-	0xc1017041,
+	0x1037040d,
+	0xc1037040,
 	0xdc103704,
-	0x1dc03100,
+	0x0dc03100,
 	0x00000000,
 	0x00c54405,
 	0x71015c40,
 	0x571015c4,
 	0x0571015c,
-	0x41771015,
+	0x40571015,
 	0xc4057100,
-	0x48404710,
+	0x1c405210,
 	0x15c03150,
 	0x00000000,
 	0x00800201,
@@ -7902,24 +7902,24 @@ const DWORD FpgaImage[] = {
 	0x20120804,
 	0x82012080,
 	0x48201208,
-	0x04802000,
+	0x04802100,
 	0x00000000,
 	0x00800001,
 	0x60005800,
 	0x16000580,
 	0x01600058,
-	0x00140005,
-	0x80056001,
-	0x50001700,
-	0x15802000,
+	0x00160005,
+	0x80056000,
+	0x5c001400,
+	0x05802000,
 	0x00000000,
 	0x00c54805,
 	0x72015c80,
-	0x572015c8,
+	0x472011c8,
 	0x0572015c,
-	0x80572015,
-	0xc8057201,
-	0x54805520,
+	0x80472011,
+	0xc8047200,
+	0x54805720,
 	0x15c03150,
 	0x00000000,
 	0x00c54000,
@@ -7927,7 +7927,7 @@ const DWORD FpgaImage[] = {
 	0x06000180,
 	0x00600018,
 	0x00060001,
-	0x80006000,
+	0x80006001,
 	0x08000600,
 	0x01803100,
 	0x00000000,
@@ -7944,10 +7944,10 @@ const DWORD FpgaImage[] = {
 	0x428150a0,
 	0x5428150a,
 	0x05428150,
-	0xa0142815,
-	0x02014080,
+	0xa0542815,
+	0x02014081,
 	0x50b0542c,
-	0x05003150,
+	0x15001150,
 	0x00000000,
 	0x00800c01,
 	0x530055c0,
@@ -7960,28 +7960,28 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00800000,
 	0x40001000,
-	0x04004100,
+	0x04000100,
 	0x00400010,
-	0x01040001,
-	0x08104000,
+	0x00040001,
+	0x08004000,
 	0x00000100,
-	0x00412010,
+	0x40412010,
 	0x00000000,
 	0x00c56002,
 	0x08008200,
 	0x20800820,
 	0x02080082,
-	0x01208008,
-	0x20022801,
+	0x00208008,
+	0x20020801,
 	0x82002180,
 	0x08413150,
 	0x00000000,
-	0x00c54001,
+	0x00c54005,
 	0x60015900,
-	0x56000580,
-	0x05600259,
+	0x56001580,
+	0x05600159,
 	0x00564015,
-	0x80076401,
+	0x80056401,
 	0x48005600,
 	0x15803100,
 	0x00000000,
@@ -7989,26 +7989,26 @@ const DWORD FpgaImage[] = {
 	0x6000d800,
 	0x36000d80,
 	0x036000d8,
-	0x00160005,
-	0x88016003,
-	0xd8003600,
+	0x00160015,
+	0x88016000,
+	0xd800b600,
 	0x0d803100,
 	0x00000000,
 	0x00c54204,
 	0x30810c20,
 	0x430810c2,
 	0x0430810c,
-	0x20430810,
+	0x20430818,
 	0x42043080,
-	0x8c204308,
+	0x0c214308,
 	0x10c03150,
 	0x00000000,
 	0x00800000,
 	0x30000c00,
 	0x030000c0,
-	0x0010000c,
-	0x00010000,
-	0xc0103204,
+	0x0030000c,
+	0x00030000,
+	0x40103204,
 	0x0c000300,
 	0x00c02000,
 	0x00000000,
@@ -8019,60 +8019,60 @@ const DWORD FpgaImage[] = {
 	0x20130804,
 	0xc30532c0,
 	0x4c201308,
-	0x04c02110,
+	0x04c02010,
 	0x00000000,
 	0x00c54205,
 	0x60815820,
 	0x56081582,
 	0x05608158,
-	0x20570815,
-	0x830560c1,
+	0x20560815,
+	0x830560c0,
 	0x58205608,
-	0x15803050,
+	0x15803150,
 	0x00000000,
 	0x00c54200,
 	0x20800820,
 	0x02080082,
 	0x00208008,
 	0x20020800,
-	0x82003080,
-	0x08200208,
-	0x00803000,
+	0x82003081,
+	0x18200308,
+	0x00803100,
 	0x00000000,
-	0x00c44204,
+	0x00c54204,
 	0x60811820,
 	0x46081182,
 	0x04608118,
 	0x20460811,
 	0x82043481,
-	0x0d204648,
+	0x09204648,
 	0x11803100,
 	0x00000000,
 	0x00c56005,
-	0x58011600,
+	0x58015600,
 	0x55801560,
 	0x05580156,
-	0x00518015,
-	0x60011800,
-	0x42005580,
+	0x00558001,
+	0x60011801,
+	0x42005180,
 	0x15403150,
 	0x00000000,
-	0x00400601,
+	0x00000601,
 	0x41805060,
 	0x14180506,
 	0x01418050,
 	0x60141805,
 	0x06015180,
 	0x54601418,
-	0x05002000,
+	0x05000000,
 	0x00000000,
 	0x00800201,
 	0x00804020,
 	0x10080402,
 	0x01008040,
-	0x21500814,
+	0x20500814,
 	0x02010480,
-	0x49211048,
+	0x41211048,
 	0x04002000,
 	0x00000000,
 	0x00c54603,
@@ -8081,34 +8081,34 @@ const DWORD FpgaImage[] = {
 	0x035180d4,
 	0x6035180d,
 	0x46025181,
-	0x94603518,
+	0x9c603518,
 	0x0d403150,
 	0x00000000,
 	0x00c54605,
-	0x71815c60,
-	0x571805c6,
+	0x71805c60,
+	0x571815c6,
 	0x0571815c,
 	0x60571815,
 	0xc6077181,
 	0x5c605718,
 	0x15c03100,
 	0x00000000,
-	0x00454617,
+	0x00454603,
 	0x7180dc60,
 	0x37180dc6,
 	0x037180dc,
 	0x6037180d,
-	0xc6017181,
+	0xc6017180,
 	0xdc603718,
-	0x0dc01100,
+	0x1dc01100,
 	0x00000000,
 	0x00454605,
 	0x71815c60,
 	0x571815c6,
 	0x0571815c,
 	0x60571815,
-	0xc6047180,
-	0x08605718,
+	0xc6147180,
+	0x0c605718,
 	0x15c01150,
 	0x00000000,
 	0x00000201,
@@ -8117,25 +8117,25 @@ const DWORD FpgaImage[] = {
 	0x01208048,
 	0x20120804,
 	0x82013084,
-	0x48201208,
+	0x58201208,
 	0x04800000,
 	0x00000000,
-	0x00000605,
-	0x61805860,
+	0x00000601,
+	0x61805060,
 	0x16180586,
 	0x01618058,
 	0x60161805,
-	0x86056181,
-	0x08601618,
-	0x05800000,
+	0x86056180,
+	0x48601618,
+	0x15800000,
 	0x00000000,
-	0x00454001,
+	0x00454005,
 	0x70015c00,
 	0x570015c0,
 	0x0570015c,
-	0x00430014,
+	0x00530010,
 	0xc0057000,
-	0x4c015700,
+	0x4c004700,
 	0x15c01150,
 	0x00000000,
 	0x00454200,
@@ -8143,45 +8143,45 @@ const DWORD FpgaImage[] = {
 	0x06080182,
 	0x00608018,
 	0x20020800,
-	0x82006080,
-	0x08200608,
+	0x82006081,
+	0x18200608,
 	0x01801100,
 	0x00000000,
-	0x00454200,
+	0x00454204,
 	0x20810820,
 	0x42081082,
 	0x04208108,
 	0x20460811,
-	0x8a140080,
-	0x18204208,
-	0x10801100,
+	0x82042081,
+	0x08204208,
+	0x10800100,
 	0x00000000,
-	0x00454201,
+	0x00454205,
 	0x40815020,
 	0x54081502,
 	0x05408150,
 	0x30550c15,
-	0x420140c0,
+	0x420140c1,
 	0x54205408,
-	0x15001150,
+	0x05001150,
 	0x00000000,
 	0x00000301,
 	0x50c05430,
 	0x150c0543,
 	0x0150c054,
 	0x30150c05,
-	0x4b015080,
+	0x43015280,
 	0x54201508,
-	0x05400000,
+	0x05400040,
 	0x00000000,
 	0x00000800,
 	0x42001080,
 	0x04200108,
 	0x00420010,
 	0x00040001,
-	0x00004000,
-	0x10800620,
-	0x01000000,
+	0x08104000,
+	0x10800420,
+	0x01800000,
 	0x00000000,
 	0x00454202,
 	0x00808020,
@@ -8189,13 +8189,13 @@ const DWORD FpgaImage[] = {
 	0x02008080,
 	0xa0202808,
 	0x02020081,
-	0x88202008,
+	0x80202208,
 	0x08001150,
 	0x00000000,
 	0x00454005,
 	0x60015800,
-	0x56002580,
-	0x05600158,
+	0x56001580,
+	0x05600058,
 	0x00560015,
 	0x80076001,
 	0x58005600,
@@ -8205,36 +8205,36 @@ const DWORD FpgaImage[] = {
 	0x6000d800,
 	0x36000d80,
 	0x036000d8,
-	0x0036001d,
-	0x80016001,
-	0xd8007600,
+	0x0076000d,
+	0x80017000,
+	0xc8007600,
 	0x0d800000,
 	0x00000000,
 	0x00000004,
 	0x30010c00,
 	0x430010c0,
 	0x0430010c,
-	0x00430058,
-	0xc0047000,
-	0x08104300,
+	0x00630010,
+	0xc0046000,
+	0x08004300,
 	0x10c00000,
 	0x00000000,
 	0x00000000,
 	0x30000c40,
 	0x030000c0,
-	0x0010000c,
+	0x0030000c,
 	0x00030000,
 	0xd0002400,
 	0x08000300,
 	0x00c00000,
 	0x00000000,
 	0x00000501,
-	0x31404c50,
+	0x31404c70,
 	0x131404c5,
-	0x1131404c,
+	0x0131404c,
 	0x50131404,
 	0xc5053100,
-	0x48505310,
+	0x48405310,
 	0x04c00000,
 	0x00000000,
 	0x00002305,
@@ -8242,16 +8242,16 @@ const DWORD FpgaImage[] = {
 	0x568c15a3,
 	0x0568c15a,
 	0x30568c15,
-	0xa30568c1,
+	0xa30548c0,
 	0x5a30568c,
 	0x15800000,
 	0x00000000,
 	0x00000000,
-	0x20000850,
+	0x20000840,
 	0x02000080,
 	0x00200008,
 	0x80022000,
-	0x90002400,
+	0x90002601,
 	0x08000200,
 	0x00800000,
 	0x00000000,
@@ -8259,18 +8259,18 @@ const DWORD FpgaImage[] = {
 	0x62111880,
 	0x46211188,
 	0x44621118,
-	0x04460151,
-	0x80446015,
+	0x04460111,
+	0x88446015,
 	0x18844621,
 	0x11800000,
 	0x00000000,
 	0x00000045,
 	0x50115404,
-	0x55011540,
-	0x45501154,
-	0x04550105,
+	0x55011140,
+	0x45501114,
+	0x04150111,
 	0x40415011,
-	0x54041501,
+	0x14041501,
 	0x15400000,
 	0x00000000,
 	0x00000821,
@@ -8279,34 +8279,34 @@ const DWORD FpgaImage[] = {
 	0x21420850,
 	0x82152085,
 	0x4821420c,
-	0x50821420,
+	0x54821420,
 	0x85000000,
 	0x00000000,
 	0x00000a01,
 	0x028040a0,
 	0x1028040a,
 	0x01028040,
-	0xa1102840,
-	0x0a000280,
+	0xa0002840,
+	0x0a010280,
 	0x00a01028,
 	0x04000000,
 	0x00000000,
 	0x00000c03,
-	0x5300d4c0,
+	0x1300d4c0,
 	0x35300d4c,
 	0x035300d4,
-	0xc0203008,
-	0x4c031305,
-	0xc4c03530,
+	0xc0213008,
+	0x4c035301,
+	0x84c03530,
 	0x0d400000,
 	0x00000000,
-	0x00000804,
-	0x72005c80,
-	0x572005c8,
+	0x00000801,
+	0x62015c80,
+	0x572015c8,
 	0x0172015c,
 	0x80572015,
 	0xc8077201,
-	0x1c805720,
+	0x5c805720,
 	0x15c00000,
 	0x00000000,
 	0x00002318,
@@ -8365,19 +8365,19 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00000102,
 	0x70409c10,
-	0x270409c1,
-	0x0270409c,
-	0x10670409,
+	0x270401c1,
+	0x0270401c,
+	0x10270409,
 	0xc1027040,
 	0x9c102714,
-	0x09c00000,
+	0x49c00000,
 	0x00000000,
 	0x00000405,
 	0x71015c40,
-	0x571015c4,
-	0x0571015c,
-	0x40571015,
-	0xc4057101,
+	0x571005c4,
+	0x0571005c,
+	0x41571015,
+	0xc4157101,
 	0x5c405710,
 	0x15c00000,
 	0x00000000,
@@ -8394,7 +8394,7 @@ const DWORD FpgaImage[] = {
 	0x60001800,
 	0x06000180,
 	0x00600018,
-	0x00460001,
+	0x00060001,
 	0x80006000,
 	0x18000600,
 	0x01800000,
@@ -8403,9 +8403,9 @@ const DWORD FpgaImage[] = {
 	0x72011c80,
 	0x472011c8,
 	0x0472011c,
-	0x80072011,
+	0x80472011,
 	0xc8047201,
-	0x1c804728,
+	0x1c804720,
 	0x11c00000,
 	0x00000000,
 	0x00000000,
@@ -8415,25 +8415,25 @@ const DWORD FpgaImage[] = {
 	0x00060001,
 	0x80006000,
 	0x18000600,
-	0x01800000,
+	0x01000000,
 	0x00000000,
 	0x00000804,
 	0x22010880,
 	0x42201088,
 	0x04220108,
-	0x80022010,
+	0x80422010,
 	0x88042201,
-	0x08804260,
+	0x00804268,
 	0x10800000,
 	0x00000000,
 	0x00002a04,
 	0x4a8112a0,
 	0x44a8112a,
 	0x044a8112,
-	0xa004a811,
-	0x2a044a81,
+	0xa044a811,
+	0x2a044a85,
 	0x12a044a8,
-	0x11000000,
+	0x51000000,
 	0x00000000,
 	0x08c00c00,
 	0x530014c0,
@@ -8446,26 +8446,26 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00c00000,
 	0x40001000,
-	0x04004100,
+	0x04000100,
 	0x00400010,
-	0x00040001,
-	0x00004000,
+	0x01040001,
+	0x00104000,
 	0x10000440,
 	0x01003000,
 	0x00000000,
 	0x08c04002,
 	0x00008000,
-	0x20000800,
-	0x02000080,
+	0x20000000,
+	0x02000000,
 	0x00200008,
 	0x00020000,
 	0x80002000,
 	0x08003000,
 	0x00000000,
-	0x08c04000,
+	0x08c04004,
 	0x60011800,
-	0x46001180,
-	0x04600118,
+	0x46001980,
+	0x04600198,
 	0x00460011,
 	0x80046001,
 	0x18004600,
@@ -8475,19 +8475,19 @@ const DWORD FpgaImage[] = {
 	0x60009800,
 	0x26000980,
 	0x02600098,
-	0x00460009,
+	0x00260009,
 	0x80026000,
 	0x98002600,
-	0x09820000,
+	0x01820000,
 	0x00000000,
 	0x40454204,
 	0x30810c20,
 	0x430810c2,
 	0x0430810c,
-	0x20030810,
+	0x20430810,
 	0xc2043081,
 	0x0c204308,
-	0x10c01150,
+	0x00c01150,
 	0x00000000,
 	0x40000000,
 	0x30000c00,
@@ -8502,16 +8502,16 @@ const DWORD FpgaImage[] = {
 	0x30800c20,
 	0x030800c2,
 	0x0030800c,
-	0x20430800,
+	0x20030800,
 	0xc2003080,
 	0x0c200308,
-	0x00c00000,
+	0x00c01000,
 	0x00000000,
 	0x40454204,
 	0x60811820,
 	0x46081182,
 	0x04608118,
-	0x20060811,
+	0x20460811,
 	0x82046081,
 	0x18204608,
 	0x11801150,
@@ -8529,7 +8529,7 @@ const DWORD FpgaImage[] = {
 	0x60811820,
 	0x46081182,
 	0x04608118,
-	0x20060811,
+	0x20460811,
 	0x82046081,
 	0x18204608,
 	0x11800000,
@@ -8538,7 +8538,7 @@ const DWORD FpgaImage[] = {
 	0x50011400,
 	0x45001140,
 	0x04500114,
-	0x00050011,
+	0x00450011,
 	0x40045001,
 	0x14004500,
 	0x11421150,
@@ -8552,32 +8552,32 @@ const DWORD FpgaImage[] = {
 	0x10600418,
 	0x01000000,
 	0x00000000,
-	0x48000201,
+	0x48010201,
 	0x00804020,
-	0x10084402,
+	0x10080402,
 	0x01008040,
 	0x20100804,
-	0x02010084,
+	0x02010080,
 	0x40201008,
-	0x04000000,
+	0x14000000,
 	0x00000000,
 	0x40454603,
 	0x5180d460,
 	0x35180d46,
 	0x035180d4,
-	0x6015180d,
+	0x6035180d,
 	0x46035180,
 	0xd4603518,
-	0x0d401150,
+	0x05401150,
 	0x00000000,
-	0x00014600,
+	0x00014604,
 	0x71811c60,
 	0x471811c6,
 	0x0471811c,
-	0x60671811,
+	0x60471811,
 	0xc6047181,
 	0x1c604718,
-	0x11c00000,
+	0x31c00000,
 	0x00000000,
 	0x40014602,
 	0x71809c60,
@@ -8585,7 +8585,7 @@ const DWORD FpgaImage[] = {
 	0x0271809c,
 	0x60271809,
 	0xc6027180,
-	0xcc602718,
+	0x9c602718,
 	0x09c00000,
 	0x00000000,
 	0x50454605,
@@ -8594,7 +8594,7 @@ const DWORD FpgaImage[] = {
 	0x0571815c,
 	0x60571815,
 	0xc6057181,
-	0x4c605718,
+	0x5c605718,
 	0x15c21150,
 	0x00000000,
 	0x40000201,
@@ -8613,7 +8613,7 @@ const DWORD FpgaImage[] = {
 	0x60061801,
 	0x86006180,
 	0x18600618,
-	0x01800100,
+	0x01800000,
 	0x00000000,
 	0x00456004,
 	0x78011e00,
@@ -8638,7 +8638,7 @@ const DWORD FpgaImage[] = {
 	0x42081082,
 	0x04208108,
 	0x20420810,
-	0x82042081,
+	0x82040081,
 	0x08204208,
 	0x10800000,
 	0x00000000,
@@ -8690,14 +8690,14 @@ const DWORD FpgaImage[] = {
 	0x40014002,
 	0x60009800,
 	0x26000980,
-	0x02600098,
+	0x02600198,
 	0x00260009,
 	0x80026000,
 	0x98002600,
 	0x09800000,
 	0x00000000,
 	0x40456004,
-	0x38010e00,
+	0x38010e01,
 	0x438010e0,
 	0x0438010e,
 	0x00438010,
@@ -8717,7 +8717,7 @@ const DWORD FpgaImage[] = {
 	0x40000500,
 	0x31400c50,
 	0x031400c5,
-	0x0031400c,
+	0x0031410c,
 	0x50031400,
 	0xc5003140,
 	0x0c500314,
@@ -8726,7 +8726,7 @@ const DWORD FpgaImage[] = {
 	0x40454304,
 	0x60c11830,
 	0x460c1183,
-	0x0460c118,
+	0x0460c018,
 	0x30460c11,
 	0x830460c1,
 	0x1830460c,
@@ -8744,7 +8744,7 @@ const DWORD FpgaImage[] = {
 	0x40014844,
 	0x62111884,
 	0x46211188,
-	0x44621118,
+	0x44621018,
 	0x84462111,
 	0x88446211,
 	0x18844621,
@@ -8753,7 +8753,7 @@ const DWORD FpgaImage[] = {
 	0x40454044,
 	0x50111404,
 	0x45011140,
-	0x44501114,
+	0x44501014,
 	0x04450111,
 	0x40445011,
 	0x14044501,
@@ -8768,8 +8768,8 @@ const DWORD FpgaImage[] = {
 	0x10820420,
 	0x01000000,
 	0x00000000,
-	0x00000a01,
-	0x028040a0,
+	0x00040a01,
+	0x028040a1,
 	0x1028040a,
 	0x01028040,
 	0xa0102804,
@@ -8782,17 +8782,17 @@ const DWORD FpgaImage[] = {
 	0x35340d4d,
 	0x035340d4,
 	0xd035340d,
-	0x4d031340,
-	0xc4d03534,
+	0x4d035340,
+	0xd4d03534,
 	0x0d401150,
 	0x00000000,
-	0x40014804,
+	0x40010804,
 	0x72011c80,
 	0x472011c8,
 	0x0472011c,
 	0x80472011,
-	0xc8053201,
-	0x4c804720,
+	0xc8047201,
+	0x1c804720,
 	0x11c00000,
 	0x00000000,
 	0x00002318,
@@ -8860,38 +8860,38 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00000004,
 	0x00010000,
-	0x40001008,
-	0x04020100,
-	0x80402010,
-	0x08040201,
-	0x00804020,
+	0x40001000,
+	0x04000100,
+	0x00400010,
+	0x00040001,
+	0x00004000,
 	0x10000000,
 	0x00000000,
 	0x00000084,
-	0x00210008,
-	0x40021000,
-	0x84002100,
-	0x08400210,
-	0x00840021,
-	0x00084002,
+	0x00210088,
+	0x40221008,
+	0x84022100,
+	0x88402210,
+	0x08840221,
+	0x00884022,
 	0x10000000,
 	0x00000000,
 	0x00000804,
 	0x02010080,
 	0x40201008,
 	0x04020100,
-	0x00400010,
-	0x00040201,
-	0x00804020,
+	0x80402010,
+	0x08040001,
+	0x00004000,
 	0x10000000,
 	0x00000000,
 	0x00000880,
 	0x02200088,
 	0x00220008,
 	0x80022000,
-	0x08000200,
-	0x00800020,
-	0xcc080002,
+	0x88002200,
+	0x08800220,
+	0x00883302,
 	0x00000000,
 	0x00000000,
 	0x08000200,
@@ -8918,7 +8918,7 @@ const DWORD FpgaImage[] = {
 	0x00020000,
 	0x80002000,
 	0x08000200,
-	0xcc800020,
+	0x00803320,
 	0x00020000,
 	0x00000000,
 	0x08000a84,
@@ -8954,7 +8954,7 @@ const DWORD FpgaImage[] = {
 	0x073001cc,
 	0x0073001c,
 	0xc0073001,
-	0x00007300,
+	0xcc007300,
 	0x1cc20400,
 	0x00000000,
 	0x08000084,
@@ -8963,7 +8963,7 @@ const DWORD FpgaImage[] = {
 	0x84002100,
 	0x08400210,
 	0x00873021,
-	0x00084002,
+	0xcc084002,
 	0x10020000,
 	0x00000000,
 	0x00000200,
@@ -8971,7 +8971,7 @@ const DWORD FpgaImage[] = {
 	0x00080002,
 	0x00008000,
 	0x20000800,
-	0x02040080,
+	0x02040081,
 	0x00200008,
 	0x00000000,
 	0x00000000,
@@ -8980,7 +8980,7 @@ const DWORD FpgaImage[] = {
 	0x00020000,
 	0x80002000,
 	0x08000200,
-	0x00840020,
+	0x00840021,
 	0x00080002,
 	0x00000000,
 	0x00000000,
@@ -9097,7 +9097,7 @@ const DWORD FpgaImage[] = {
 	0x400a1002,
 	0x8400a100,
 	0x28400a10,
-	0x028730a1,
+	0x028400a1,
 	0x0028400a,
 	0x10000000,
 	0x00000000,
@@ -9124,16 +9124,16 @@ const DWORD FpgaImage[] = {
 	0x40001000,
 	0x04000100,
 	0x00400010,
-	0x00073001,
+	0x00040001,
 	0x00004000,
 	0x10000000,
 	0x00000000,
-	0x00000880,
+	0x00000080,
 	0x02200088,
 	0x00220008,
-	0x80002000,
-	0x88000200,
-	0x08833220,
+	0x80022000,
+	0x08002200,
+	0x08800220,
 	0x00880022,
 	0x00000000,
 	0x00000000,
@@ -9160,17 +9160,17 @@ const DWORD FpgaImage[] = {
 	0x00200008,
 	0x00020000,
 	0x80002000,
-	0x08033200,
+	0x08000200,
 	0x00800020,
 	0x00020000,
 	0x00000000,
 	0x08000a84,
 	0x02a100a8,
-	0x402a100a,
+	0x732a100a,
 	0x8402a100,
-	0xa8402a10,
+	0xa8732a10,
 	0x0a8732a1,
-	0xcca8402a,
+	0x00a8402a,
 	0x10020000,
 	0x00000000,
 	0x08000804,
@@ -10512,7 +10512,7 @@ const DWORD FpgaImage[] = {
 	0x00000000,
 	0x00000000,
 	0x30000001,
-	0x000004f0,
+	0x00008769,
 	0x30008001,
 	0x00000003,
 	0x30004009,
diff --git a/fpga/lo_read.v b/fpga/lo_read.v
index d7b45cb5..8dce4dda 100644
--- a/fpga/lo_read.v
+++ b/fpga/lo_read.v
@@ -1,8 +1,7 @@
 //-----------------------------------------------------------------------------
 // The way that we connect things in low-frequency read mode. In this case
-// we are generating the 134 kHz or 125 kHz carrier, and running the
-// unmodulated carrier at that frequency. The A/D samples at that same rate,
-// and the result is serialized.
+// we are generating the unmodulated low frequency carrier.
+// The A/D samples at that same rate and the result is serialized.
 //
 // Jonathan Westhues, April 2006
 //-----------------------------------------------------------------------------
@@ -24,54 +23,81 @@ module lo_read(
     output ssp_frame, ssp_din, ssp_clk;
     input cross_hi, cross_lo;
     output dbg;
-    input lo_is_125khz;
+    input lo_is_125khz; // redundant signal, no longer used anywhere
     input [7:0] divisor;
 
-// The low-frequency RFID stuff. This is relatively simple, because most
-// of the work happens on the ARM, and we just pass samples through. The
-// PCK0 must be divided down to generate the A/D clock, and from there by
-// a factor of 8 to generate the carrier (that we apply to the coil drivers).
-//
-// This is also where we decode the received synchronous serial port words,
-// to determine how to drive the output enables.
-
-// PCK0 will run at (PLL clock) / 4, or 24 MHz. That means that we can do
-// 125 kHz by dividing by a further factor of (8*12*2), or ~134 kHz by
-// dividing by a factor of (8*11*2) (for 136 kHz, ~2% error, tolerable).
-
 reg [7:0] to_arm_shiftreg;
 reg [7:0] pck_divider;
-reg [6:0] ssp_divider;
 reg ant_lo;
 
+// this task runs on the rising egde of pck0 clock (24Mhz) and creates ant_lo
+// which is high for (divisor+1) pck0 cycles and low for the same duration
+// ant_lo is therefore a 50% duty cycle clock signal with a frequency of
+// 12Mhz/(divisor+1) which drives the antenna as well as the ADC clock adc_clk
 always @(posedge pck0)
 begin
-	if(pck_divider == 8'd0)
+	if(pck_divider == divisor[7:0])
 		begin
-			pck_divider <= divisor[7:0];
+			pck_divider <= 8'd0;
 			ant_lo = !ant_lo;
-			if(ant_lo == 1'b0)
-			begin
-			    ssp_divider <= 7'b0011111;
-				to_arm_shiftreg <= adc_d;
-			end
 		end
 	else
 	begin
-		pck_divider <= pck_divider - 1;
-		if(ssp_divider[6] == 1'b0)
-		begin
-			if (ssp_divider[1:0] == 1'b11) to_arm_shiftreg[7:1] <= to_arm_shiftreg[6:0];
-			ssp_divider <= ssp_divider - 1;
-		end
+		pck_divider <= pck_divider + 1;
+	end
+end
+
+// this task also runs at pck0 frequency (24Mhz) and is used to serialize
+// the ADC output which is then clocked into the ARM SSP.
+
+// because ant_lo always transitions when pck_divider = 0 we use the
+// pck_divider counter to sync our other signals off it
+// we read the ADC value when pck_divider=7 and shift it out on counts 8..15
+always @(posedge pck0)
+begin
+	if((pck_divider == 8'd7) && !ant_lo)
+        to_arm_shiftreg <= adc_d;
+    else
+	begin
+        to_arm_shiftreg[7:1] <= to_arm_shiftreg[6:0];
+		// simulation showed a glitch occuring due to the LSB of the shifter
+		// not being set as we shift bits out
+		// this ensures the ssp_din remains low after a transfer and suppresses
+		// the glitch that would occur when the last data shifted out ended in
+		// a 1 bit and the next data shifted out started with a 0 bit
+        to_arm_shiftreg[0] <= 1'b0;
 	end
 end
 
-assign ssp_din = to_arm_shiftreg[7];
-assign ssp_clk = pck_divider[1];
-assign ssp_frame = ~ssp_divider[5];
+// ADC samples on falling edge of adc_clk, data available on the rising edge
+
+// example of ssp transfer of binary value 1100101
+// start of transfer is indicated by the rise of the ssp_frame signal
+// ssp_din changes on the rising edge of the ssp_clk clock and is clocked into
+// the ARM by the falling edge of ssp_clk
+//             _______________________________
+// ssp_frame__|                               |__
+//             _______         ___     ___
+// ssp_din  __|       |_______|   |___|   |______
+//         _   _   _   _   _   _   _   _   _   _
+// ssp_clk  |_| |_| |_| |_| |_| |_| |_| |_| |_| |_
+
+// serialized SSP data is gated by ant_lo to suppress unwanted signal
+assign ssp_din = to_arm_shiftreg[7] && !ant_lo;
+// SSP clock always runs at 24Mhz
+assign ssp_clk = pck0;
+// SSP frame is gated by ant_lo and goes high when pck_divider=8..15
+assign ssp_frame = (pck_divider[7:3] == 5'd1) && !ant_lo;
+// unused signals tied low
 assign pwr_hi = 1'b0;
+assign pwr_oe1 = 1'b0;
+assign pwr_oe2 = 1'b0;
+assign pwr_oe3 = 1'b0;
+assign pwr_oe4 = 1'b0;
+// this is the antenna driver signal
 assign pwr_lo = ant_lo;
+// ADC clock out of phase with antenna driver
 assign adc_clk = ~ant_lo;
+// ADC clock also routed to debug pin
 assign dbg = adc_clk;
 endmodule
diff --git a/fpga/testbed_lo_read.v b/fpga/testbed_lo_read.v
index f7712832..cb0f119c 100644
--- a/fpga/testbed_lo_read.v
+++ b/fpga/testbed_lo_read.v
@@ -1,4 +1,3 @@
-`include "lo_read_org.v"
 `include "lo_read.v"
 /*
 	pck0			- input main 24Mhz clock (PLL / 4)
@@ -38,7 +37,7 @@ module testbed_lo_read;
 	wire ssp_frame;
 	wire ssp_din;
 	wire ssp_clk;
-	wire ssp_dout;
+	reg ssp_dout;
 	wire pwr_hi;
 	wire pwr_oe1;
 	wire pwr_oe2;
@@ -48,47 +47,25 @@ module testbed_lo_read;
 	wire cross_hi;
 	wire dbg;
 
-	lo_read_org #(5,10) dut1(
+	lo_read #(5,10) dut(
 	.pck0(pck0),
-	.ck_1356meg(ack_1356meg),
-	.ck_1356megb(ack_1356megb),
-	.pwr_lo(apwr_lo),
-	.pwr_hi(apwr_hi),
-	.pwr_oe1(apwr_oe1),
-	.pwr_oe2(apwr_oe2),
-	.pwr_oe3(apwr_oe3),
-	.pwr_oe4(apwr_oe4),
+	.ck_1356meg(ck_1356meg),
+	.ck_1356megb(ck_1356megb),
+	.pwr_lo(pwr_lo),
+	.pwr_hi(pwr_hi),
+	.pwr_oe1(pwr_oe1),
+	.pwr_oe2(pwr_oe2),
+	.pwr_oe3(pwr_oe3),
+	.pwr_oe4(pwr_oe4),
 	.adc_d(adc_d),
 	.adc_clk(adc_clk),
-	.ssp_frame(assp_frame),
-	.ssp_din(assp_din),
-	.ssp_dout(assp_dout),
-	.ssp_clk(assp_clk),
-	.cross_hi(across_hi),
-	.cross_lo(across_lo),
-	.dbg(adbg),
-	.lo_is_125khz(lo_is_125khz)
-	);
-
-	lo_read #(5,10) dut2(
-	.pck0(pck0),
-	.ck_1356meg(bck_1356meg),
-	.ck_1356megb(bck_1356megb),
-	.pwr_lo(bpwr_lo),
-	.pwr_hi(bpwr_hi),
-	.pwr_oe1(bpwr_oe1),
-	.pwr_oe2(bpwr_oe2),
-	.pwr_oe3(bpwr_oe3),
-	.pwr_oe4(bpwr_oe4),
-	.adc_d(adc_d),
-	.adc_clk(badc_clk),
-	.ssp_frame(bssp_frame),
-	.ssp_din(bssp_din),
-	.ssp_dout(bssp_dout),
-	.ssp_clk(bssp_clk),
-	.cross_hi(bcross_hi),
-	.cross_lo(bcross_lo),
-	.dbg(bdbg),
+	.ssp_frame(ssp_frame),
+	.ssp_din(ssp_din),
+	.ssp_dout(ssp_dout),
+	.ssp_clk(ssp_clk),
+	.cross_hi(cross_hi),
+	.cross_lo(cross_lo),
+	.dbg(dbg),
 	.lo_is_125khz(lo_is_125khz),
 	.divisor(divisor)
 	);
@@ -111,8 +88,9 @@ module testbed_lo_read;
 		// init inputs
 		pck0 = 0;
 		adc_d = 0;
+		ssp_dout = 0;
 		lo_is_125khz = 1;
-		divisor=255;  //min 19, 95=125Khz, max 255
+		divisor = 255;  //min 16, 95=125Khz, max 255
 
 		// simulate 4 A/D cycles at 125Khz
 		for (i = 0 ;  i < 8 ;  i = i + 1) begin