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Commit | Line | Data |
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377c0242 | 1 | -- J.STELZNER\r |
2 | -- INFORMATIK-3 LABOR\r | |
3 | -- 23.08.2006\r | |
4 | -- File: CONFIG_10H.VHD\r | |
5 | \r | |
6 | library IEEE;\r | |
7 | use IEEE.std_logic_1164.all;\r | |
8 | \r | |
9 | entity CONFIG_10H is\r | |
10 | port\r | |
11 | (\r | |
12 | PCI_CLOCK :in std_logic;\r | |
13 | PCI_RSTn :in std_logic;\r | |
14 | AD_REG :in std_logic_vector(31 downto 0);\r | |
15 | CBE_REGn :in std_logic_vector( 3 downto 0);\r | |
16 | CONF_WR_10H :in std_logic;\r | |
17 | CONF_DATA_10H :out std_logic_vector(31 downto 0)\r | |
18 | );\r | |
19 | end entity CONFIG_10H;\r | |
20 | \r | |
21 | architecture CONFIG_10H_DESIGN of CONFIG_10H is\r | |
22 | \r | |
23 | signal CONF_BAS_ADDR_REG :std_logic_vector(31 downto 0);\r | |
24 | \r | |
25 | begin\r | |
26 | \r | |
27 | --*******************************************************************\r | |
28 | --***** PCI Configuration Space Header "BASE ADDRESS REGISTER" ******\r | |
29 | --*******************************************************************\r | |
30 | \r | |
31 | CONF_BAS_ADDR_REG(1 downto 0) <= "01" ;-- Base Address Register for "I/O"\r | |
32 | CONF_BAS_ADDR_REG(3 downto 2) <= "00" ;-- IO Bereich = 16 BYTE\r | |
33 | \r | |
34 | process (PCI_CLOCK,PCI_RSTn) \r | |
35 | begin\r | |
36 | \r | |
37 | -- if PCI_RSTn = '0' then CONF_BAS_ADDR_REG(31 downto 2) <= (others =>'0');\r | |
38 | if PCI_RSTn = '0' then CONF_BAS_ADDR_REG(31 downto 4) <= (others =>'0');\r | |
39 | \r | |
40 | elsif (PCI_CLOCK'event and PCI_CLOCK = '1') then\r | |
41 | \r | |
42 | if CONF_WR_10H = '1'and CBE_REGn(3) = '0' then \r | |
43 | \r | |
44 | CONF_BAS_ADDR_REG(31 downto 24) <= AD_REG(31 downto 24);\r | |
45 | \r | |
46 | else CONF_BAS_ADDR_REG(31 downto 24) <= CONF_BAS_ADDR_REG(31 downto 24);\r | |
47 | end if;\r | |
48 | \r | |
49 | if CONF_WR_10H = '1'and CBE_REGn(2) = '0' then \r | |
50 | \r | |
51 | CONF_BAS_ADDR_REG(23 downto 16) <= AD_REG(23 downto 16);\r | |
52 | \r | |
53 | else CONF_BAS_ADDR_REG(23 downto 16) <= CONF_BAS_ADDR_REG(23 downto 16);\r | |
54 | end if;\r | |
55 | \r | |
56 | if CONF_WR_10H = '1'and CBE_REGn(1) = '0' then \r | |
57 | \r | |
58 | CONF_BAS_ADDR_REG(15 downto 8) <= AD_REG(15 downto 8);\r | |
59 | \r | |
60 | else CONF_BAS_ADDR_REG(15 downto 8) <= CONF_BAS_ADDR_REG(15 downto 8);\r | |
61 | end if;\r | |
62 | \r | |
63 | -- if CONF_WR_10H = '1'and CBE_REGn(0) = '0' then \r | |
64 | --\r | |
65 | -- CONF_BAS_ADDR_REG( 7 downto 2) <= AD_REG( 7 downto 2);\r | |
66 | --\r | |
67 | -- else CONF_BAS_ADDR_REG( 7 downto 2) <= CONF_BAS_ADDR_REG( 7 downto 2);\r | |
68 | -- end if;\r | |
69 | \r | |
70 | if CONF_WR_10H = '1'and CBE_REGn(0) = '0' then \r | |
71 | \r | |
72 | CONF_BAS_ADDR_REG( 7 downto 4) <= AD_REG( 7 downto 4);\r | |
73 | \r | |
74 | else CONF_BAS_ADDR_REG( 7 downto 4) <= CONF_BAS_ADDR_REG( 7 downto 4);\r | |
75 | end if;\r | |
76 | \r | |
77 | \r | |
78 | end if;\r | |
79 | \r | |
80 | end process;\r | |
81 | \r | |
82 | CONF_DATA_10H <= CONF_BAS_ADDR_REG;\r | |
83 | \r | |
84 | end architecture CONFIG_10H_DESIGN;\r | |
85 | \r | |
86 | \r | |
87 | \r |