From: michael Date: Sat, 10 Mar 2007 11:27:06 +0000 (+0000) Subject: it synthesizes X-Git-Url: http://git.zerfleddert.de/cgi-bin/gitweb.cgi/raggedstone/commitdiff_plain/62946980498edfd27323457258b1520c24a4b9ad?ds=sidebyside it synthesizes --- diff --git a/dhwk/Makefile b/dhwk/Makefile index 0bf5c98..b3cd515 100644 --- a/dhwk/Makefile +++ b/dhwk/Makefile @@ -1,3 +1,3 @@ -PROJECT := raggedstone +PROJECT := dhwk include ../common/Makefile.common diff --git a/dhwk/source/top.vhd b/dhwk/source/top.vhd index 2dc252a..e0ad093 100644 --- a/dhwk/source/top.vhd +++ b/dhwk/source/top.vhd @@ -8,7 +8,7 @@ USE ieee.std_logic_1164.ALL; USE ieee.numeric_std.ALL; -entity TOP is +entity dhwk is Port ( KONST_1 : In std_logic; PCI_CBEn : In std_logic_vector (3 downto 0); PCI_CLOCK : In std_logic; @@ -51,9 +51,9 @@ entity TOP is TB_IDSEL : Out std_logic; TB_nDEVSEL : Out std_logic; TB_nINTA : Out std_logic ); -end TOP; +end dhwk; -architecture SCHEMATIC of TOP is +architecture SCHEMATIC of dhwk is SIGNAL gnd : std_logic := '0'; SIGNAL vcc : std_logic := '1';