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1### UCF file for FPGA-MOONCRST on XC2S200E
2#
3#---------- MasterClock 18.432MHz ----------
4NET "I_CLK_125M" LOC = "F13" | IOSTANDARD = LVCMOS33;
5#-------------------------------------------
6#---------- SW I/F -------------------------
7NET "I_PSW<0>" LOC = "K19" | IOSTANDARD = LVTTL | PULLUP;
8NET "I_PSW<1>" LOC = "F22" | IOSTANDARD = LVTTL | PULLUP;
9NET "I_PSW<2>" LOC = "G22" | IOSTANDARD = LVTTL | PULLUP;
10NET "I_PSW<3>" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP;
11NET "I_PSW<4>" LOC = "F23" | IOSTANDARD = LVTTL | PULLUP;
12#-------------------------------------------
13#--------- EEPROM I/F ----------------------
14#NET "I_ROM_DB<0>" LOC = "P70";
15#NET "I_ROM_DB<1>" LOC = "P68";
16#NET "I_ROM_DB<2>" LOC = "P63";
17#NET "I_ROM_DB<3>" LOC = "P58";
18#NET "I_ROM_DB<4>" LOC = "P60";
19#NET "I_ROM_DB<5>" LOC = "P62";
20#NET "I_ROM_DB<6>" LOC = "P57";
21#NET "I_ROM_DB<7>" LOC = "P59";
22#NET "O_ROM_AB<0>" LOC = "P71";
23#NET "O_ROM_AB<1>" LOC = "P74";
24#NET "O_ROM_AB<2>" LOC = "P73";
25#NET "O_ROM_AB<3>" LOC = "P75";
26#NET "O_ROM_AB<4>" LOC = "P81";
27#NET "O_ROM_AB<5>" LOC = "P82";
28#NET "O_ROM_AB<6>" LOC = "P84";
29#NET "O_ROM_AB<7>" LOC = "P86";
30#NET "O_ROM_AB<8>" LOC = "P89";
31#NET "O_ROM_AB<9>" LOC = "P87";
32#NET "O_ROM_AB<10>" LOC = "P64";
33#NET "O_ROM_AB<11>" LOC = "P83";
34#NET "O_ROM_AB<12>" LOC = "P88";
35#NET "O_ROM_AB<13>" LOC = "P95";
36#NET "O_ROM_AB<14>" LOC = "P97";
37#NET "O_ROM_AB<15>" LOC = "P93";
38#NET "O_ROM_AB<16>" LOC = "P96";
39#NET "O_ROM_AB<17>" LOC = "P98";
40#NET "O_ROM_AB<18>" LOC = "P94";
41#NET "O_ROM_CSn" LOC = "P61";
42#NET "O_ROM_OEn" LOC = "P69";
43#NET "O_ROM_WEn" LOC = "P100";
44#-------------------------------------------
45#--------- SOUND I/F -----------------------
46NET "O_SOUND_OUT_L" LOC = "AA22" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8;
47NET "O_SOUND_OUT_R" LOC = "V19" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8;
48#-------------------------------------------
49#--------- VIDEO I/F -----------------------
50NET "O_VGA_R<4>" LOC = "V18" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
51NET "O_VGA_R<3>" LOC = "F24" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
52NET "O_VGA_R<2>" LOC = "F25" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
53NET "O_VGA_R<1>" LOC = "K20" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
54NET "O_VGA_R<0>" LOC = "L20" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
55NET "O_VGA_G<4>" LOC = "T17" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
56NET "O_VGA_G<3>" LOC = "J22" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
57NET "O_VGA_G<2>" LOC = "J23" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
58NET "O_VGA_G<1>" LOC = "M18" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
59NET "O_VGA_G<0>" LOC = "M19" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
60NET "O_VGA_B<4>" LOC = "Y25" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
61NET "O_VGA_B<3>" LOC = "G24" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
62NET "O_VGA_B<2>" LOC = "G23" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
63NET "O_VGA_B<1>" LOC = "K21" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
64NET "O_VGA_B<0>" LOC = "L22" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
65
66NET "O_VGA_H_SYNCn" LOC = "K26" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
67NET "O_VGA_V_SYNCn" LOC = "K25" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
68
69
70#-------------------------------------------
71#
72#---------- Build-in ROM -------------------------------------------------------------------------------
73#INST "col_rom00" INIT_00 = c6077600f007f6000700000007a0c00007c4c0003f07d8003fc01600f6000000;
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