X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/linexec-j720/blobdiff_plain/77a37381836de85306ad128def744d879c38f95a..c5f1f439f689ac322fc715b979e343c93e8b8ec3:/asm/asm-wince.asm diff --git a/asm/asm-wince.asm b/asm/asm-wince.asm index a34be6e..0cf3fad 100644 --- a/asm/asm-wince.asm +++ b/asm/asm-wince.asm @@ -1,99 +1,99 @@ - TTL C:\pocket\test\asm.cpp - - AREA |.drectve|, DRECTVE - DCB "-defaultlib:coredll.lib " - DCB "-defaultlib:corelibc.lib " - - EXPORT |?do_it@@YAXXZ| ; do_it - AREA |.pdata|, PDATA -|$T222| DCD |?do_it@@YAXXZ| - DCD 0x40000100 - AREA |.text|, CODE -|?do_it@@YAXXZ| PROC ; do_it -|$M220| - - mcr p15, 0, r0, c7, c5, 0 ;/* invalidate i cache & BTB */ - ; CPWAIT r0 - mrc p15, 0, r0, c2, c0, 0 - mov r0, r0 - sub pc, pc, #4 - ; ldr r9, =0xa1300100 - - mov r9, r1 ; add r9, r1, #0x100 - ldr r5, =0xa0000100 ; ldr r5, =0xa0000100 - ldr r7, =0xa0100000 -label ldr r8, [r9] - str r8, [r5] - add r9, r9, #4 - add r5, r5, #4 - cmp r5, r7 - blt label - -crash b crash - - MOV r4, #0xA0000000 - add r2,r4,#0x8000 - - mov r11,r2 - ldr r10,=337 - -; mcr p15, 0, r0, c7, c10, 4 ;/* drain the write buffer*/ - -; CPWAIT r0 -; mrc p15, 0, r0, c2, c0, 0 -; mov r0, r0 -; sub pc, pc, #4 - - - mcr p15, 0, r0, c8, c7, 0x00 ;/* invalidate I+D TLB */ -; CPWAIT r0 - mrc p15, 0, r0, c2, c0, 0 - mov r0, r0 - sub pc, pc, #4 - -; //; they skipped this, unnecessary? seems like we need to do this - mcr p15, 0, r0, c7, c5, 0 ;/* invalidate i cache & BTB */ - -; S bit set, p and d bit set (no 26 bit mode) -; mov r3, #0x120 ; xscale says p needs to be 0 ??? -; mcr p15, 0, r3, c1, c0, 0 ;/* disable the MMU */ - -; CPWAIT r0 -; mrc p15, 0, r0, c2, c0, 0 -; mov r0, r0 -; sub pc, pc, #4 - - -; /*; make sure the pipeline is emptied*/ - mov r0,#0 - mov r0,r0 - mov r0,r0 - mov r0,r0 - -; /* zero PID in Process ID Virtual Address Map register. */ -; mov r0, #0 - mcr p15, 0, r0, c13, c0, 0 - - -; CPWAIT r0 - mrc p15, 0, r0, c2, c0, 0 - mov r0, r0 - sub pc, pc, #4 - -; ldr r5, =0xA00512F5 -; ldr r8, =0xefef0000 -; str r8, [r5] - - - mov r0, #0 - mov r1, r10 - ldr r2, [r2, #0] - mov r2, #0 - mov pc, r11 - - -|$M221| - - ENDP ; |?do_it@@YAXXZ|, do_it - - END + TTL C:\pocket\test\asm.cpp + + AREA |.drectve|, DRECTVE + DCB "-defaultlib:coredll.lib " + DCB "-defaultlib:corelibc.lib " + + EXPORT |?do_it@@YAXXZ| ; do_it + AREA |.pdata|, PDATA +|$T222| DCD |?do_it@@YAXXZ| + DCD 0x40000100 + AREA |.text|, CODE +|?do_it@@YAXXZ| PROC ; do_it +|$M220| + + mcr p15, 0, r0, c7, c5, 0 ;/* invalidate i cache & BTB */ + ; CPWAIT r0 + mrc p15, 0, r0, c2, c0, 0 + mov r0, r0 + sub pc, pc, #4 + ; ldr r9, =0xa1300100 + + mov r9, r1 ; add r9, r1, #0x100 + ldr r5, =0xa0000100 ; ldr r5, =0xa0000100 + ldr r7, =0xa0100000 +label ldr r8, [r9] + str r8, [r5] + add r9, r9, #4 + add r5, r5, #4 + cmp r5, r7 + blt label + +crash b crash + + MOV r4, #0xA0000000 + add r2,r4,#0x8000 + + mov r11,r2 + ldr r10,=337 + +; mcr p15, 0, r0, c7, c10, 4 ;/* drain the write buffer*/ + +; CPWAIT r0 +; mrc p15, 0, r0, c2, c0, 0 +; mov r0, r0 +; sub pc, pc, #4 + + + mcr p15, 0, r0, c8, c7, 0x00 ;/* invalidate I+D TLB */ +; CPWAIT r0 + mrc p15, 0, r0, c2, c0, 0 + mov r0, r0 + sub pc, pc, #4 + +; //; they skipped this, unnecessary? seems like we need to do this + mcr p15, 0, r0, c7, c5, 0 ;/* invalidate i cache & BTB */ + +; S bit set, p and d bit set (no 26 bit mode) +; mov r3, #0x120 ; xscale says p needs to be 0 ??? +; mcr p15, 0, r3, c1, c0, 0 ;/* disable the MMU */ + +; CPWAIT r0 +; mrc p15, 0, r0, c2, c0, 0 +; mov r0, r0 +; sub pc, pc, #4 + + +; /*; make sure the pipeline is emptied*/ + mov r0,#0 + mov r0,r0 + mov r0,r0 + mov r0,r0 + +; /* zero PID in Process ID Virtual Address Map register. */ +; mov r0, #0 + mcr p15, 0, r0, c13, c0, 0 + + +; CPWAIT r0 + mrc p15, 0, r0, c2, c0, 0 + mov r0, r0 + sub pc, pc, #4 + +; ldr r5, =0xA00512F5 +; ldr r8, =0xefef0000 +; str r8, [r5] + + + mov r0, #0 + mov r1, r10 + ldr r2, [r2, #0] + mov r2, #0 + mov pc, r11 + + +|$M221| + + ENDP ; |?do_it@@YAXXZ|, do_it + + END