]> git.zerfleddert.de Git - proxmark3-svn/blame - armsrc/iso14443a.c
added initial test to emulate memory of mf ul tag
[proxmark3-svn] / armsrc / iso14443a.c
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15c4dc5a 1//-----------------------------------------------------------------------------
b62a5a84 2// Merlok - June 2011, 2012
15c4dc5a 3// Gerhard de Koning Gans - May 2008
534983d7 4// Hagen Fritsch - June 2010
bd20f8f4 5//
6// This code is licensed to you under the terms of the GNU GPL, version 2 or,
7// at your option, any later version. See the LICENSE.txt file for the text of
8// the license.
15c4dc5a 9//-----------------------------------------------------------------------------
bd20f8f4 10// Routines to support ISO 14443 type A.
11//-----------------------------------------------------------------------------
12
e30c654b 13#include "proxmark3.h"
15c4dc5a 14#include "apps.h"
f7e3ed82 15#include "util.h"
9ab7a6c7 16#include "string.h"
902cb3c0 17#include "cmd.h"
9ab7a6c7 18
15c4dc5a 19#include "iso14443crc.h"
534983d7 20#include "iso14443a.h"
20f9a2a1
M
21#include "crapto1.h"
22#include "mifareutil.h"
15c4dc5a 23
534983d7 24static uint32_t iso14a_timeout;
d19929cb 25uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
1e262141 26int traceLen = 0;
27int rsamples = 0;
28int tracing = TRUE;
29uint8_t trigger = 0;
b0127e65 30// the block number for the ISO14443-4 PCB
31static uint8_t iso14_pcb_blocknum = 0;
15c4dc5a 32
8f51ddb0 33// CARD TO READER - manchester
72934aa3 34// Sequence D: 11110000 modulation with subcarrier during first half
35// Sequence E: 00001111 modulation with subcarrier during second half
36// Sequence F: 00000000 no modulation with subcarrier
8f51ddb0 37// READER TO CARD - miller
72934aa3 38// Sequence X: 00001100 drop after half a period
39// Sequence Y: 00000000 no drop
40// Sequence Z: 11000000 drop at start
41#define SEC_D 0xf0
42#define SEC_E 0x0f
43#define SEC_F 0x00
44#define SEC_X 0x0c
45#define SEC_Y 0x00
46#define SEC_Z 0xc0
15c4dc5a 47
1e262141 48const uint8_t OddByteParity[256] = {
15c4dc5a 49 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
50 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
51 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
52 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
53 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
54 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
55 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
56 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
57 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
58 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
59 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
60 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
61 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
62 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
63 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
64 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
65};
66
1e262141 67
902cb3c0 68void iso14a_set_trigger(bool enable) {
534983d7 69 trigger = enable;
70}
71
902cb3c0 72void iso14a_clear_trace() {
73 memset(trace, 0x44, TRACE_SIZE);
8556b852
M
74 traceLen = 0;
75}
d19929cb 76
902cb3c0 77void iso14a_set_tracing(bool enable) {
8556b852
M
78 tracing = enable;
79}
d19929cb 80
b0127e65 81void iso14a_set_timeout(uint32_t timeout) {
82 iso14a_timeout = timeout;
83}
8556b852 84
15c4dc5a 85//-----------------------------------------------------------------------------
86// Generate the parity value for a byte sequence
e30c654b 87//
15c4dc5a 88//-----------------------------------------------------------------------------
20f9a2a1
M
89byte_t oddparity (const byte_t bt)
90{
91 return OddByteParity[bt];
92}
93
f7e3ed82 94uint32_t GetParity(const uint8_t * pbtCmd, int iLen)
15c4dc5a 95{
96 int i;
f7e3ed82 97 uint32_t dwPar = 0;
72934aa3 98
15c4dc5a 99 // Generate the encrypted data
100 for (i = 0; i < iLen; i++) {
101 // Save the encrypted parity bit
102 dwPar |= ((OddByteParity[pbtCmd[i]]) << i);
103 }
104 return dwPar;
105}
106
534983d7 107void AppendCrc14443a(uint8_t* data, int len)
15c4dc5a 108{
109 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
110}
111
1e262141 112// The function LogTrace() is also used by the iClass implementation in iClass.c
5cd9ec01 113int RAMFUNC LogTrace(const uint8_t * btBytes, int iLen, int iSamples, uint32_t dwParity, int bReader)
15c4dc5a 114{
115 // Return when trace is full
81cd0474 116 if (traceLen >= TRACE_SIZE) return FALSE;
e30c654b 117
15c4dc5a 118 // Trace the random, i'm curious
119 rsamples += iSamples;
120 trace[traceLen++] = ((rsamples >> 0) & 0xff);
121 trace[traceLen++] = ((rsamples >> 8) & 0xff);
122 trace[traceLen++] = ((rsamples >> 16) & 0xff);
123 trace[traceLen++] = ((rsamples >> 24) & 0xff);
124 if (!bReader) {
125 trace[traceLen - 1] |= 0x80;
126 }
127 trace[traceLen++] = ((dwParity >> 0) & 0xff);
128 trace[traceLen++] = ((dwParity >> 8) & 0xff);
129 trace[traceLen++] = ((dwParity >> 16) & 0xff);
130 trace[traceLen++] = ((dwParity >> 24) & 0xff);
131 trace[traceLen++] = iLen;
132 memcpy(trace + traceLen, btBytes, iLen);
133 traceLen += iLen;
134 return TRUE;
135}
136
15c4dc5a 137//-----------------------------------------------------------------------------
138// The software UART that receives commands from the reader, and its state
139// variables.
140//-----------------------------------------------------------------------------
b62a5a84 141static tUart Uart;
15c4dc5a 142
6c1e2d95 143static RAMFUNC int MillerDecoding(int bit)
15c4dc5a 144{
9f693930 145 //int error = 0;
15c4dc5a 146 int bitright;
147
148 if(!Uart.bitBuffer) {
149 Uart.bitBuffer = bit ^ 0xFF0;
150 return FALSE;
151 }
152 else {
153 Uart.bitBuffer <<= 4;
154 Uart.bitBuffer ^= bit;
155 }
156
f7e3ed82 157 int EOC = FALSE;
15c4dc5a 158
159 if(Uart.state != STATE_UNSYNCD) {
160 Uart.posCnt++;
161
162 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
163 bit = 0x00;
164 }
165 else {
166 bit = 0x01;
167 }
168 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
169 bitright = 0x00;
170 }
171 else {
172 bitright = 0x01;
173 }
174 if(bit != bitright) { bit = bitright; }
175
176 if(Uart.posCnt == 1) {
177 // measurement first half bitperiod
178 if(!bit) {
179 Uart.drop = DROP_FIRST_HALF;
180 }
181 }
182 else {
183 // measurement second half bitperiod
184 if(!bit & (Uart.drop == DROP_NONE)) {
185 Uart.drop = DROP_SECOND_HALF;
186 }
187 else if(!bit) {
188 // measured a drop in first and second half
189 // which should not be possible
190 Uart.state = STATE_ERROR_WAIT;
9f693930 191 //error = 0x01;
15c4dc5a 192 }
193
194 Uart.posCnt = 0;
195
196 switch(Uart.state) {
197 case STATE_START_OF_COMMUNICATION:
198 Uart.shiftReg = 0;
199 if(Uart.drop == DROP_SECOND_HALF) {
200 // error, should not happen in SOC
201 Uart.state = STATE_ERROR_WAIT;
9f693930 202 //error = 0x02;
15c4dc5a 203 }
204 else {
205 // correct SOC
206 Uart.state = STATE_MILLER_Z;
207 }
208 break;
209
210 case STATE_MILLER_Z:
211 Uart.bitCnt++;
212 Uart.shiftReg >>= 1;
213 if(Uart.drop == DROP_NONE) {
214 // logic '0' followed by sequence Y
215 // end of communication
216 Uart.state = STATE_UNSYNCD;
217 EOC = TRUE;
218 }
219 // if(Uart.drop == DROP_FIRST_HALF) {
220 // Uart.state = STATE_MILLER_Z; stay the same
221 // we see a logic '0' }
222 if(Uart.drop == DROP_SECOND_HALF) {
223 // we see a logic '1'
224 Uart.shiftReg |= 0x100;
225 Uart.state = STATE_MILLER_X;
226 }
227 break;
228
229 case STATE_MILLER_X:
230 Uart.shiftReg >>= 1;
231 if(Uart.drop == DROP_NONE) {
232 // sequence Y, we see a '0'
233 Uart.state = STATE_MILLER_Y;
234 Uart.bitCnt++;
235 }
236 if(Uart.drop == DROP_FIRST_HALF) {
237 // Would be STATE_MILLER_Z
238 // but Z does not follow X, so error
239 Uart.state = STATE_ERROR_WAIT;
9f693930 240 //error = 0x03;
15c4dc5a 241 }
242 if(Uart.drop == DROP_SECOND_HALF) {
243 // We see a '1' and stay in state X
244 Uart.shiftReg |= 0x100;
245 Uart.bitCnt++;
246 }
247 break;
248
249 case STATE_MILLER_Y:
250 Uart.bitCnt++;
251 Uart.shiftReg >>= 1;
252 if(Uart.drop == DROP_NONE) {
253 // logic '0' followed by sequence Y
254 // end of communication
255 Uart.state = STATE_UNSYNCD;
256 EOC = TRUE;
257 }
258 if(Uart.drop == DROP_FIRST_HALF) {
259 // we see a '0'
260 Uart.state = STATE_MILLER_Z;
261 }
262 if(Uart.drop == DROP_SECOND_HALF) {
263 // We see a '1' and go to state X
264 Uart.shiftReg |= 0x100;
265 Uart.state = STATE_MILLER_X;
266 }
267 break;
268
269 case STATE_ERROR_WAIT:
270 // That went wrong. Now wait for at least two bit periods
271 // and try to sync again
272 if(Uart.drop == DROP_NONE) {
273 Uart.highCnt = 6;
274 Uart.state = STATE_UNSYNCD;
275 }
276 break;
277
278 default:
279 Uart.state = STATE_UNSYNCD;
280 Uart.highCnt = 0;
281 break;
282 }
283
284 Uart.drop = DROP_NONE;
285
286 // should have received at least one whole byte...
287 if((Uart.bitCnt == 2) && EOC && (Uart.byteCnt > 0)) {
288 return TRUE;
289 }
290
291 if(Uart.bitCnt == 9) {
292 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
293 Uart.byteCnt++;
294
295 Uart.parityBits <<= 1;
296 Uart.parityBits ^= ((Uart.shiftReg >> 8) & 0x01);
297
298 if(EOC) {
299 // when End of Communication received and
300 // all data bits processed..
301 return TRUE;
302 }
303 Uart.bitCnt = 0;
304 }
305
306 /*if(error) {
307 Uart.output[Uart.byteCnt] = 0xAA;
308 Uart.byteCnt++;
309 Uart.output[Uart.byteCnt] = error & 0xFF;
310 Uart.byteCnt++;
311 Uart.output[Uart.byteCnt] = 0xAA;
312 Uart.byteCnt++;
313 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
314 Uart.byteCnt++;
315 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
316 Uart.byteCnt++;
317 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
318 Uart.byteCnt++;
319 Uart.output[Uart.byteCnt] = 0xAA;
320 Uart.byteCnt++;
321 return TRUE;
322 }*/
323 }
324
325 }
326 else {
327 bit = Uart.bitBuffer & 0xf0;
328 bit >>= 4;
329 bit ^= 0x0F;
330 if(bit) {
331 // should have been high or at least (4 * 128) / fc
332 // according to ISO this should be at least (9 * 128 + 20) / fc
333 if(Uart.highCnt == 8) {
334 // we went low, so this could be start of communication
335 // it turns out to be safer to choose a less significant
336 // syncbit... so we check whether the neighbour also represents the drop
337 Uart.posCnt = 1; // apparently we are busy with our first half bit period
338 Uart.syncBit = bit & 8;
339 Uart.samples = 3;
340 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
341 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
342 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
343 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
344 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
2f2d9fc5 345 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
15c4dc5a 346 Uart.syncBit = 8;
347
348 // the first half bit period is expected in next sample
349 Uart.posCnt = 0;
350 Uart.samples = 3;
351 }
352 }
353 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
354
355 Uart.syncBit <<= 4;
356 Uart.state = STATE_START_OF_COMMUNICATION;
357 Uart.drop = DROP_FIRST_HALF;
358 Uart.bitCnt = 0;
359 Uart.byteCnt = 0;
360 Uart.parityBits = 0;
9f693930 361 //error = 0;
15c4dc5a 362 }
363 else {
364 Uart.highCnt = 0;
365 }
366 }
367 else {
368 if(Uart.highCnt < 8) {
369 Uart.highCnt++;
370 }
371 }
372 }
373
374 return FALSE;
375}
376
377//=============================================================================
378// ISO 14443 Type A - Manchester
379//=============================================================================
b62a5a84 380static tDemod Demod;
15c4dc5a 381
6c1e2d95 382static RAMFUNC int ManchesterDecoding(int v)
15c4dc5a 383{
384 int bit;
385 int modulation;
9f693930 386 //int error = 0;
15c4dc5a 387
388 if(!Demod.buff) {
389 Demod.buff = 1;
390 Demod.buffer = v;
391 return FALSE;
392 }
393 else {
394 bit = Demod.buffer;
395 Demod.buffer = v;
396 }
397
398 if(Demod.state==DEMOD_UNSYNCD) {
399 Demod.output[Demod.len] = 0xfa;
400 Demod.syncBit = 0;
401 //Demod.samples = 0;
402 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
2f2d9fc5 403
404 if(bit & 0x08) {
405 Demod.syncBit = 0x08;
15c4dc5a 406 }
15c4dc5a 407
2f2d9fc5 408 if(bit & 0x04) {
409 if(Demod.syncBit) {
410 bit <<= 4;
411 }
412 Demod.syncBit = 0x04;
413 }
15c4dc5a 414
2f2d9fc5 415 if(bit & 0x02) {
416 if(Demod.syncBit) {
417 bit <<= 2;
15c4dc5a 418 }
2f2d9fc5 419 Demod.syncBit = 0x02;
15c4dc5a 420 }
15c4dc5a 421
593924e7 422 if(bit & 0x01 && Demod.syncBit) {
2f2d9fc5 423 Demod.syncBit = 0x01;
424 }
425
15c4dc5a 426 if(Demod.syncBit) {
427 Demod.len = 0;
428 Demod.state = DEMOD_START_OF_COMMUNICATION;
429 Demod.sub = SUB_FIRST_HALF;
430 Demod.bitCount = 0;
431 Demod.shiftReg = 0;
432 Demod.parityBits = 0;
433 Demod.samples = 0;
434 if(Demod.posCount) {
534983d7 435 if(trigger) LED_A_OFF();
15c4dc5a 436 switch(Demod.syncBit) {
437 case 0x08: Demod.samples = 3; break;
438 case 0x04: Demod.samples = 2; break;
439 case 0x02: Demod.samples = 1; break;
440 case 0x01: Demod.samples = 0; break;
441 }
442 }
9f693930 443 //error = 0;
15c4dc5a 444 }
445 }
446 else {
447 //modulation = bit & Demod.syncBit;
448 modulation = ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
449
450 Demod.samples += 4;
451
452 if(Demod.posCount==0) {
453 Demod.posCount = 1;
454 if(modulation) {
455 Demod.sub = SUB_FIRST_HALF;
456 }
457 else {
458 Demod.sub = SUB_NONE;
459 }
460 }
461 else {
462 Demod.posCount = 0;
463 if(modulation && (Demod.sub == SUB_FIRST_HALF)) {
464 if(Demod.state!=DEMOD_ERROR_WAIT) {
465 Demod.state = DEMOD_ERROR_WAIT;
466 Demod.output[Demod.len] = 0xaa;
9f693930 467 //error = 0x01;
15c4dc5a 468 }
469 }
470 else if(modulation) {
471 Demod.sub = SUB_SECOND_HALF;
472 }
473
474 switch(Demod.state) {
475 case DEMOD_START_OF_COMMUNICATION:
476 if(Demod.sub == SUB_FIRST_HALF) {
477 Demod.state = DEMOD_MANCHESTER_D;
478 }
479 else {
480 Demod.output[Demod.len] = 0xab;
481 Demod.state = DEMOD_ERROR_WAIT;
9f693930 482 //error = 0x02;
15c4dc5a 483 }
484 break;
485
486 case DEMOD_MANCHESTER_D:
487 case DEMOD_MANCHESTER_E:
488 if(Demod.sub == SUB_FIRST_HALF) {
489 Demod.bitCount++;
490 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
491 Demod.state = DEMOD_MANCHESTER_D;
492 }
493 else if(Demod.sub == SUB_SECOND_HALF) {
494 Demod.bitCount++;
495 Demod.shiftReg >>= 1;
496 Demod.state = DEMOD_MANCHESTER_E;
497 }
498 else {
499 Demod.state = DEMOD_MANCHESTER_F;
500 }
501 break;
502
503 case DEMOD_MANCHESTER_F:
504 // Tag response does not need to be a complete byte!
505 if(Demod.len > 0 || Demod.bitCount > 0) {
506 if(Demod.bitCount > 0) {
507 Demod.shiftReg >>= (9 - Demod.bitCount);
508 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
509 Demod.len++;
510 // No parity bit, so just shift a 0
511 Demod.parityBits <<= 1;
512 }
513
514 Demod.state = DEMOD_UNSYNCD;
515 return TRUE;
516 }
517 else {
518 Demod.output[Demod.len] = 0xad;
519 Demod.state = DEMOD_ERROR_WAIT;
9f693930 520 //error = 0x03;
15c4dc5a 521 }
522 break;
523
524 case DEMOD_ERROR_WAIT:
525 Demod.state = DEMOD_UNSYNCD;
526 break;
527
528 default:
529 Demod.output[Demod.len] = 0xdd;
530 Demod.state = DEMOD_UNSYNCD;
531 break;
532 }
533
534 if(Demod.bitCount>=9) {
535 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
536 Demod.len++;
537
538 Demod.parityBits <<= 1;
539 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
540
541 Demod.bitCount = 0;
542 Demod.shiftReg = 0;
543 }
544
545 /*if(error) {
546 Demod.output[Demod.len] = 0xBB;
547 Demod.len++;
548 Demod.output[Demod.len] = error & 0xFF;
549 Demod.len++;
550 Demod.output[Demod.len] = 0xBB;
551 Demod.len++;
552 Demod.output[Demod.len] = bit & 0xFF;
553 Demod.len++;
554 Demod.output[Demod.len] = Demod.buffer & 0xFF;
555 Demod.len++;
556 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
557 Demod.len++;
558 Demod.output[Demod.len] = 0xBB;
559 Demod.len++;
560 return TRUE;
561 }*/
562
563 }
564
565 } // end (state != UNSYNCED)
566
567 return FALSE;
568}
569
570//=============================================================================
571// Finally, a `sniffer' for ISO 14443 Type A
572// Both sides of communication!
573//=============================================================================
574
575//-----------------------------------------------------------------------------
576// Record the sequence of commands sent by the reader to the tag, with
577// triggering so that we start recording at the point that the tag is moved
578// near the reader.
579//-----------------------------------------------------------------------------
5cd9ec01
M
580void RAMFUNC SnoopIso14443a(uint8_t param) {
581 // param:
582 // bit 0 - trigger from first card answer
583 // bit 1 - trigger from first reader 7-bit request
584
585 LEDsoff();
586 // init trace buffer
d19929cb 587 iso14a_clear_trace();
5cd9ec01
M
588
589 // We won't start recording the frames that we acquire until we trigger;
590 // a good trigger condition to get started is probably when we see a
591 // response from the tag.
592 // triggered == FALSE -- to wait first for card
593 int triggered = !(param & 0x03);
594
595 // The command (reader -> tag) that we're receiving.
15c4dc5a 596 // The length of a received command will in most cases be no more than 18 bytes.
597 // So 32 should be enough!
5cd9ec01
M
598 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
599 // The response (tag -> reader) that we're receiving.
600 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
15c4dc5a 601
5cd9ec01
M
602 // As we receive stuff, we copy it from receivedCmd or receivedResponse
603 // into trace, along with its length and other annotations.
604 //uint8_t *trace = (uint8_t *)BigBuf;
605
606 // The DMA buffer, used to stream samples from the FPGA
607 int8_t *dmaBuf = ((int8_t *)BigBuf) + DMA_BUFFER_OFFSET;
608 int8_t *data = dmaBuf;
609 int maxDataLen = 0;
610 int dataLen = 0;
15c4dc5a 611
5cd9ec01
M
612 // Set up the demodulator for tag -> reader responses.
613 Demod.output = receivedResponse;
614 Demod.len = 0;
615 Demod.state = DEMOD_UNSYNCD;
15c4dc5a 616
5cd9ec01
M
617 // Set up the demodulator for the reader -> tag commands
618 memset(&Uart, 0, sizeof(Uart));
619 Uart.output = receivedCmd;
620 Uart.byteCntMax = 32; // was 100 (greg)//////////////////
621 Uart.state = STATE_UNSYNCD;
15c4dc5a 622
5cd9ec01
M
623 // Setup for the DMA.
624 FpgaSetupSsc();
625 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
15c4dc5a 626
5cd9ec01
M
627 // And put the FPGA in the appropriate mode
628 // Signal field is off with the appropriate LED
629 LED_D_OFF();
630 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
631 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
7e758047 632
5cd9ec01
M
633 // Count of samples received so far, so that we can include timing
634 // information in the trace buffer.
635 rsamples = 0;
636 // And now we loop, receiving samples.
637 while(true) {
638 if(BUTTON_PRESS()) {
639 DbpString("cancelled by button");
640 goto done;
641 }
15c4dc5a 642
5cd9ec01
M
643 LED_A_ON();
644 WDT_HIT();
15c4dc5a 645
5cd9ec01
M
646 int register readBufDataP = data - dmaBuf;
647 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
648 if (readBufDataP <= dmaBufDataP){
649 dataLen = dmaBufDataP - readBufDataP;
650 } else {
651 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP + 1;
652 }
653 // test for length of buffer
654 if(dataLen > maxDataLen) {
655 maxDataLen = dataLen;
656 if(dataLen > 400) {
657 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
658 goto done;
659 }
660 }
661 if(dataLen < 1) continue;
662
663 // primary buffer was stopped( <-- we lost data!
664 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
665 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
666 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
5cd9ec01
M
667 }
668 // secondary buffer sets as primary, secondary buffer was stopped
669 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
670 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
671 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
672 }
673
674 LED_A_OFF();
675
676 rsamples += 4;
677 if(MillerDecoding((data[0] & 0xF0) >> 4)) {
678 LED_C_ON();
679
680 // check - if there is a short 7bit request from reader
681 if ((!triggered) && (param & 0x02) && (Uart.byteCnt == 1) && (Uart.bitCnt = 9)) triggered = TRUE;
682
683 if(triggered) {
684 if (!LogTrace(receivedCmd, Uart.byteCnt, 0 - Uart.samples, Uart.parityBits, TRUE)) break;
685 }
686 /* And ready to receive another command. */
687 Uart.state = STATE_UNSYNCD;
688 /* And also reset the demod code, which might have been */
689 /* false-triggered by the commands from the reader. */
690 Demod.state = DEMOD_UNSYNCD;
691 LED_B_OFF();
692 }
693
694 if(ManchesterDecoding(data[0] & 0x0F)) {
695 LED_B_ON();
696
697 if (!LogTrace(receivedResponse, Demod.len, 0 - Demod.samples, Demod.parityBits, FALSE)) break;
698
699 if ((!triggered) && (param & 0x01)) triggered = TRUE;
700
701 // And ready to receive another response.
702 memset(&Demod, 0, sizeof(Demod));
703 Demod.output = receivedResponse;
704 Demod.state = DEMOD_UNSYNCD;
705 LED_C_OFF();
706 }
707
708 data++;
709 if(data > dmaBuf + DMA_BUFFER_SIZE) {
710 data = dmaBuf;
711 }
712 } // main cycle
713
714 DbpString("COMMAND FINISHED");
15c4dc5a 715
15c4dc5a 716done:
5cd9ec01
M
717 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
718 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.byteCnt=%x", maxDataLen, Uart.state, Uart.byteCnt);
719 Dbprintf("Uart.byteCntMax=%x, traceLen=%x, Uart.output[0]=%08x", Uart.byteCntMax, traceLen, (int)Uart.output[0]);
720 LEDsoff();
15c4dc5a 721}
722
15c4dc5a 723//-----------------------------------------------------------------------------
724// Prepare tag messages
725//-----------------------------------------------------------------------------
8f51ddb0 726static void CodeIso14443aAsTagPar(const uint8_t *cmd, int len, uint32_t dwParity)
15c4dc5a 727{
8f51ddb0 728 int i;
15c4dc5a 729
8f51ddb0 730 ToSendReset();
15c4dc5a 731
732 // Correction bit, might be removed when not needed
733 ToSendStuffBit(0);
734 ToSendStuffBit(0);
735 ToSendStuffBit(0);
736 ToSendStuffBit(0);
737 ToSendStuffBit(1); // 1
738 ToSendStuffBit(0);
739 ToSendStuffBit(0);
740 ToSendStuffBit(0);
8f51ddb0 741
15c4dc5a 742 // Send startbit
72934aa3 743 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 744
8f51ddb0
M
745 for(i = 0; i < len; i++) {
746 int j;
747 uint8_t b = cmd[i];
15c4dc5a 748
749 // Data bits
15c4dc5a 750 for(j = 0; j < 8; j++) {
15c4dc5a 751 if(b & 1) {
72934aa3 752 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 753 } else {
72934aa3 754 ToSend[++ToSendMax] = SEC_E;
8f51ddb0
M
755 }
756 b >>= 1;
757 }
15c4dc5a 758
0014cb46 759 // Get the parity bit
8f51ddb0
M
760 if ((dwParity >> i) & 0x01) {
761 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 762 } else {
72934aa3 763 ToSend[++ToSendMax] = SEC_E;
15c4dc5a 764 }
8f51ddb0 765 }
15c4dc5a 766
8f51ddb0
M
767 // Send stopbit
768 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 769
8f51ddb0
M
770 // Convert from last byte pos to length
771 ToSendMax++;
8f51ddb0
M
772}
773
774static void CodeIso14443aAsTag(const uint8_t *cmd, int len){
775 CodeIso14443aAsTagPar(cmd, len, GetParity(cmd, len));
15c4dc5a 776}
777
778//-----------------------------------------------------------------------------
779// This is to send a NACK kind of answer, its only 3 bits, I know it should be 4
780//-----------------------------------------------------------------------------
8f51ddb0 781static void CodeStrangeAnswerAsTag()
15c4dc5a 782{
783 int i;
784
785 ToSendReset();
786
787 // Correction bit, might be removed when not needed
788 ToSendStuffBit(0);
789 ToSendStuffBit(0);
790 ToSendStuffBit(0);
791 ToSendStuffBit(0);
792 ToSendStuffBit(1); // 1
793 ToSendStuffBit(0);
794 ToSendStuffBit(0);
795 ToSendStuffBit(0);
796
797 // Send startbit
72934aa3 798 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 799
800 // 0
72934aa3 801 ToSend[++ToSendMax] = SEC_E;
15c4dc5a 802
803 // 0
72934aa3 804 ToSend[++ToSendMax] = SEC_E;
15c4dc5a 805
806 // 1
72934aa3 807 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 808
809 // Send stopbit
72934aa3 810 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 811
812 // Flush the buffer in FPGA!!
813 for(i = 0; i < 5; i++) {
72934aa3 814 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 815 }
816
817 // Convert from last byte pos to length
818 ToSendMax++;
8f51ddb0 819}
15c4dc5a 820
8f51ddb0
M
821static void Code4bitAnswerAsTag(uint8_t cmd)
822{
823 int i;
824
825 ToSendReset();
826
827 // Correction bit, might be removed when not needed
828 ToSendStuffBit(0);
829 ToSendStuffBit(0);
830 ToSendStuffBit(0);
831 ToSendStuffBit(0);
832 ToSendStuffBit(1); // 1
833 ToSendStuffBit(0);
834 ToSendStuffBit(0);
835 ToSendStuffBit(0);
836
837 // Send startbit
838 ToSend[++ToSendMax] = SEC_D;
839
840 uint8_t b = cmd;
841 for(i = 0; i < 4; i++) {
842 if(b & 1) {
843 ToSend[++ToSendMax] = SEC_D;
844 } else {
845 ToSend[++ToSendMax] = SEC_E;
846 }
847 b >>= 1;
848 }
849
850 // Send stopbit
851 ToSend[++ToSendMax] = SEC_F;
852
853 // Flush the buffer in FPGA!!
854 for(i = 0; i < 5; i++) {
855 ToSend[++ToSendMax] = SEC_F;
856 }
857
858 // Convert from last byte pos to length
859 ToSendMax++;
15c4dc5a 860}
861
862//-----------------------------------------------------------------------------
863// Wait for commands from reader
864// Stop when button is pressed
865// Or return TRUE when command is captured
866//-----------------------------------------------------------------------------
f7e3ed82 867static int GetIso14443aCommandFromReader(uint8_t *received, int *len, int maxLen)
15c4dc5a 868{
869 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
870 // only, since we are receiving, not transmitting).
871 // Signal field is off with the appropriate LED
872 LED_D_OFF();
873 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
874
875 // Now run a `software UART' on the stream of incoming samples.
876 Uart.output = received;
877 Uart.byteCntMax = maxLen;
878 Uart.state = STATE_UNSYNCD;
879
880 for(;;) {
881 WDT_HIT();
882
883 if(BUTTON_PRESS()) return FALSE;
884
885 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
886 AT91C_BASE_SSC->SSC_THR = 0x00;
887 }
888 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 889 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 890 if(MillerDecoding((b & 0xf0) >> 4)) {
891 *len = Uart.byteCnt;
892 return TRUE;
893 }
894 if(MillerDecoding(b & 0x0f)) {
895 *len = Uart.byteCnt;
896 return TRUE;
897 }
898 }
899 }
900}
28afbd2b 901
9ca155ba 902static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, int correctionNeeded);
28afbd2b 903int EmSend4bitEx(uint8_t resp, int correctionNeeded);
904int EmSend4bit(uint8_t resp);
905int EmSendCmdExPar(uint8_t *resp, int respLen, int correctionNeeded, uint32_t par);
906int EmSendCmdExPar(uint8_t *resp, int respLen, int correctionNeeded, uint32_t par);
907int EmSendCmdEx(uint8_t *resp, int respLen, int correctionNeeded);
908int EmSendCmd(uint8_t *resp, int respLen);
909int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par);
15c4dc5a 910
911//-----------------------------------------------------------------------------
912// Main loop of simulated tag: receive commands from reader, decide what
913// response to send, and send it.
914//-----------------------------------------------------------------------------
28afbd2b 915void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
15c4dc5a 916{
81cd0474 917 // Enable and clear the trace
918 tracing = TRUE;
d19929cb 919 iso14a_clear_trace();
81cd0474 920
15c4dc5a 921 // This function contains the tag emulation
81cd0474 922 uint8_t sak;
923
924 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
925 uint8_t response1[2];
926
927 switch (tagType) {
928 case 1: { // MIFARE Classic
929 // Says: I am Mifare 1k - original line
930 response1[0] = 0x04;
931 response1[1] = 0x00;
932 sak = 0x08;
933 } break;
934 case 2: { // MIFARE Ultralight
935 // Says: I am a stupid memory tag, no crypto
936 response1[0] = 0x04;
937 response1[1] = 0x00;
938 sak = 0x00;
939 } break;
940 case 3: { // MIFARE DESFire
941 // Says: I am a DESFire tag, ph33r me
942 response1[0] = 0x04;
943 response1[1] = 0x03;
944 sak = 0x20;
945 } break;
946 case 4: { // ISO/IEC 14443-4
947 // Says: I am a javacard (JCOP)
948 response1[0] = 0x04;
949 response1[1] = 0x00;
950 sak = 0x28;
951 } break;
952 default: {
953 Dbprintf("Error: unkown tagtype (%d)",tagType);
954 return;
955 } break;
956 }
957
958 // The second response contains the (mandatory) first 24 bits of the UID
959 uint8_t response2[5];
960
961 // Check if the uid uses the (optional) part
962 uint8_t response2a[5];
963 if (uid_2nd) {
964 response2[0] = 0x88;
965 num_to_bytes(uid_1st,3,response2+1);
966 num_to_bytes(uid_2nd,4,response2a);
967 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
968
969 // Configure the ATQA and SAK accordingly
970 response1[0] |= 0x40;
971 sak |= 0x04;
972 } else {
973 num_to_bytes(uid_1st,4,response2);
974 // Configure the ATQA and SAK accordingly
975 response1[0] &= 0xBF;
976 sak &= 0xFB;
977 }
978
979 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
980 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
981
982 // Prepare the mandatory SAK (for 4 and 7 byte UID)
983 uint8_t response3[3];
984 response3[0] = sak;
985 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
986
987 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
988 uint8_t response3a[3];
989 response3a[0] = sak & 0xFB;
990 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
991
254b70a4 992 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
993 uint8_t response6[] = { 0x03, 0x3B, 0x00, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS
994 ComputeCrc14443(CRC_14443_A, response6, 3, &response6[3], &response6[4]);
81cd0474 995
254b70a4 996 uint8_t *resp;
997 int respLen;
15c4dc5a 998
81cd0474 999 // Longest possible response will be 16 bytes + 2 CRC = 18 bytes
15c4dc5a 1000 // This will need
1001 // 144 data bits (18 * 8)
1002 // 18 parity bits
1003 // 2 Start and stop
1004 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
1005 // 1 just for the case
1006 // ----------- +
1007 // 166
1008 //
1009 // 166 bytes, since every bit that needs to be send costs us a byte
1010 //
1011
254b70a4 1012 // Respond with card type
1013 uint8_t *resp1 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
1014 int resp1Len;
15c4dc5a 1015
254b70a4 1016 // Anticollision cascade1 - respond with uid
1017 uint8_t *resp2 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + 166);
1018 int resp2Len;
15c4dc5a 1019
254b70a4 1020 // Anticollision cascade2 - respond with 2nd half of uid if asked
1021 // we're only going to be asked if we set the 1st byte of the UID (during cascade1) to 0x88
1022 uint8_t *resp2a = (((uint8_t *)BigBuf) + 1140);
1023 int resp2aLen;
15c4dc5a 1024
254b70a4 1025 // Acknowledge select - cascade 1
1026 uint8_t *resp3 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*2));
1027 int resp3Len;
15c4dc5a 1028
254b70a4 1029 // Acknowledge select - cascade 2
1030 uint8_t *resp3a = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*3));
1031 int resp3aLen;
15c4dc5a 1032
254b70a4 1033 // Response to a read request - not implemented atm
1034 uint8_t *resp4 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*4));
28afbd2b 1035// int resp4Len;
15c4dc5a 1036
254b70a4 1037 // Authenticate response - nonce
1038 uint8_t *resp5 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*5));
1039 int resp5Len;
15c4dc5a 1040
254b70a4 1041 // Authenticate response - nonce
1042 uint8_t *resp6 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*6));
1043 int resp6Len;
15c4dc5a 1044
254b70a4 1045 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
1046 int len;
15c4dc5a 1047
1048 // To control where we are in the protocol
1049 int order = 0;
1050 int lastorder;
1051
1052 // Just to allow some checks
1053 int happened = 0;
1054 int happened2 = 0;
1055
81cd0474 1056 int cmdsRecvd = 0;
1057 uint8_t* respdata = NULL;
1058 int respsize = 0;
28afbd2b 1059// uint8_t nack = 0x04;
15c4dc5a 1060
81cd0474 1061 memset(receivedCmd, 0x44, RECV_CMD_SIZE);
15c4dc5a 1062
1063 // Prepare the responses of the anticollision phase
1064 // there will be not enough time to do this at the moment the reader sends it REQA
1065
1066 // Answer to request
1067 CodeIso14443aAsTag(response1, sizeof(response1));
254b70a4 1068 memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
15c4dc5a 1069
1070 // Send our UID (cascade 1)
1071 CodeIso14443aAsTag(response2, sizeof(response2));
254b70a4 1072 memcpy(resp2, ToSend, ToSendMax); resp2Len = ToSendMax;
15c4dc5a 1073
1074 // Answer to select (cascade1)
1075 CodeIso14443aAsTag(response3, sizeof(response3));
254b70a4 1076 memcpy(resp3, ToSend, ToSendMax); resp3Len = ToSendMax;
15c4dc5a 1077
1078 // Send the cascade 2 2nd part of the uid
1079 CodeIso14443aAsTag(response2a, sizeof(response2a));
254b70a4 1080 memcpy(resp2a, ToSend, ToSendMax); resp2aLen = ToSendMax;
15c4dc5a 1081
1082 // Answer to select (cascade 2)
1083 CodeIso14443aAsTag(response3a, sizeof(response3a));
254b70a4 1084 memcpy(resp3a, ToSend, ToSendMax); resp3aLen = ToSendMax;
15c4dc5a 1085
1086 // Strange answer is an example of rare message size (3 bits)
8f51ddb0 1087 CodeStrangeAnswerAsTag();
28afbd2b 1088 memcpy(resp4, ToSend, ToSendMax);// resp4Len = ToSendMax;
15c4dc5a 1089
1090 // Authentication answer (random nonce)
1091 CodeIso14443aAsTag(response5, sizeof(response5));
254b70a4 1092 memcpy(resp5, ToSend, ToSendMax); resp5Len = ToSendMax;
15c4dc5a 1093
254b70a4 1094 // dummy ATS (pseudo-ATR), answer to RATS
1095 CodeIso14443aAsTag(response6, sizeof(response6));
1096 memcpy(resp6, ToSend, ToSendMax); resp6Len = ToSendMax;
15c4dc5a 1097
254b70a4 1098 // We need to listen to the high-frequency, peak-detected path.
1099 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1100 FpgaSetupSsc();
15c4dc5a 1101
254b70a4 1102 cmdsRecvd = 0;
15c4dc5a 1103
254b70a4 1104 LED_A_ON();
1105 for(;;) {
1106
81cd0474 1107 if(!GetIso14443aCommandFromReader(receivedCmd, &len, RECV_CMD_SIZE)) {
254b70a4 1108 DbpString("button press");
1109 break;
1110 }
28afbd2b 1111
1112 if (tracing) {
1113 LogTrace(receivedCmd,len, 0, Uart.parityBits, TRUE);
1114 }
1115
254b70a4 1116 // doob - added loads of debug strings so we can see what the reader is saying to us during the sim as hi14alist is not populated
1117 // Okay, look at the command now.
1118 lastorder = order;
1119 if(receivedCmd[0] == 0x26) { // Received a REQUEST
15c4dc5a 1120 resp = resp1; respLen = resp1Len; order = 1;
81cd0474 1121 respdata = response1;
1122 respsize = sizeof(response1);
254b70a4 1123 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
15c4dc5a 1124 resp = resp1; respLen = resp1Len; order = 6;
81cd0474 1125 respdata = response1;
1126 respsize = sizeof(response1);
254b70a4 1127 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
15c4dc5a 1128 resp = resp2; respLen = resp2Len; order = 2;
81cd0474 1129 respdata = response2;
1130 respsize = sizeof(response2);
254b70a4 1131 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
15c4dc5a 1132 resp = resp2a; respLen = resp2aLen; order = 20;
81cd0474 1133 respdata = response2a;
1134 respsize = sizeof(response2a);
254b70a4 1135 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
15c4dc5a 1136 resp = resp3; respLen = resp3Len; order = 3;
81cd0474 1137 respdata = response3;
1138 respsize = sizeof(response3);
254b70a4 1139 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
15c4dc5a 1140 resp = resp3a; respLen = resp3aLen; order = 30;
81cd0474 1141 respdata = response3a;
1142 respsize = sizeof(response3a);
254b70a4 1143 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
28afbd2b 1144// resp = resp4; respLen = resp4Len; order = 4; // Do nothing
1145// respdata = &nack;
1146// respsize = sizeof(nack); // 4-bit answer
1147 EmSendCmdEx(data+(4*receivedCmd[0]),16,false);
254b70a4 1148 Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
28afbd2b 1149 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1150 respLen = 0;
254b70a4 1151 } else if(receivedCmd[0] == 0x50) { // Received a HALT
17331e14 1152// DbpString("Reader requested we HALT!:");
254b70a4 1153 // Do not respond
1154 resp = resp1; respLen = 0; order = 0;
81cd0474 1155 respdata = NULL;
1156 respsize = 0;
254b70a4 1157 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
15c4dc5a 1158 resp = resp5; respLen = resp5Len; order = 7;
254b70a4 1159 respdata = response5;
1160 respsize = sizeof(response5);
1161 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1162 resp = resp6; respLen = resp6Len; order = 70;
1163 respdata = response6;
1164 respsize = sizeof(response6);
81cd0474 1165 } else {
17331e14 1166 if (order == 7 && len ==8) {
1167 uint32_t nr = bytes_to_num(receivedCmd,4);
1168 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1169 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1170 } else {
1171 // Never seen this command before
1172 Dbprintf("Received unknown command (len=%d):",len);
1173 Dbhexdump(len,receivedCmd,false);
1174 }
1175 // Do not respond
1176 resp = resp1; respLen = 0; order = 0;
1177 respdata = NULL;
1178 respsize = 0;
81cd0474 1179 }
15c4dc5a 1180
1181 // Count number of wakeups received after a halt
1182 if(order == 6 && lastorder == 5) { happened++; }
1183
1184 // Count number of other messages after a halt
1185 if(order != 6 && lastorder == 5) { happened2++; }
1186
1187 // Look at last parity bit to determine timing of answer
1188 if((Uart.parityBits & 0x01) || receivedCmd[0] == 0x52) {
1189 // 1236, so correction bit needed
9f693930 1190 //i = 0;
15c4dc5a 1191 }
1192
15c4dc5a 1193 if(cmdsRecvd > 999) {
1194 DbpString("1000 commands later...");
254b70a4 1195 break;
1196 } else {
15c4dc5a 1197 cmdsRecvd++;
1198 }
1199
81cd0474 1200 if(respLen > 0) {
81cd0474 1201 EmSendCmd14443aRaw(resp, respLen, receivedCmd[0] == 0x52);
1202 }
1203
1204 if (tracing) {
81cd0474 1205 if (respdata != NULL) {
1206 LogTrace(respdata,respsize, 0, SwapBits(GetParity(respdata,respsize),respsize), FALSE);
1207 }
4ab4336a 1208 if(traceLen > TRACE_SIZE) {
1209 DbpString("Trace full");
1210 break;
1211 }
81cd0474 1212 }
15c4dc5a 1213
81cd0474 1214 memset(receivedCmd, 0x44, RECV_CMD_SIZE);
254b70a4 1215 }
15c4dc5a 1216
1217 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1218 LED_A_OFF();
1219}
1220
1221//-----------------------------------------------------------------------------
1222// Transmit the command (to the tag) that was placed in ToSend[].
1223//-----------------------------------------------------------------------------
f7e3ed82 1224static void TransmitFor14443a(const uint8_t *cmd, int len, int *samples, int *wait)
15c4dc5a 1225{
1226 int c;
e30c654b 1227
15c4dc5a 1228 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
e30c654b 1229
15c4dc5a 1230 if (wait)
1231 if(*wait < 10)
1232 *wait = 10;
e30c654b 1233
15c4dc5a 1234 for(c = 0; c < *wait;) {
1235 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1236 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1237 c++;
1238 }
1239 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 1240 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 1241 (void)r;
1242 }
1243 WDT_HIT();
1244 }
e30c654b 1245
15c4dc5a 1246 c = 0;
1247 for(;;) {
1248 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1249 AT91C_BASE_SSC->SSC_THR = cmd[c];
1250 c++;
1251 if(c >= len) {
1252 break;
1253 }
1254 }
1255 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 1256 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 1257 (void)r;
1258 }
1259 WDT_HIT();
1260 }
1261 if (samples) *samples = (c + *wait) << 3;
1262}
1263
15c4dc5a 1264//-----------------------------------------------------------------------------
1265// Code a 7-bit command without parity bit
1266// This is especially for 0x26 and 0x52 (REQA and WUPA)
1267//-----------------------------------------------------------------------------
f7e3ed82 1268void ShortFrameFromReader(const uint8_t bt)
15c4dc5a 1269{
1270 int j;
1271 int last;
f7e3ed82 1272 uint8_t b;
15c4dc5a 1273
1274 ToSendReset();
1275
1276 // Start of Communication (Seq. Z)
72934aa3 1277 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1278 last = 0;
1279
1280 b = bt;
1281 for(j = 0; j < 7; j++) {
1282 if(b & 1) {
1283 // Sequence X
72934aa3 1284 ToSend[++ToSendMax] = SEC_X;
15c4dc5a 1285 last = 1;
1286 } else {
1287 if(last == 0) {
1288 // Sequence Z
72934aa3 1289 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1290 }
1291 else {
1292 // Sequence Y
72934aa3 1293 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1294 last = 0;
1295 }
1296 }
1297 b >>= 1;
1298 }
1299
1300 // End of Communication
1301 if(last == 0) {
1302 // Sequence Z
72934aa3 1303 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1304 }
1305 else {
1306 // Sequence Y
72934aa3 1307 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1308 last = 0;
1309 }
1310 // Sequence Y
72934aa3 1311 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1312
1313 // Just to be sure!
72934aa3 1314 ToSend[++ToSendMax] = SEC_Y;
1315 ToSend[++ToSendMax] = SEC_Y;
1316 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1317
1318 // Convert from last character reference to length
1319 ToSendMax++;
1320}
1321
1322//-----------------------------------------------------------------------------
1323// Prepare reader command to send to FPGA
e30c654b 1324//
15c4dc5a 1325//-----------------------------------------------------------------------------
f7e3ed82 1326void CodeIso14443aAsReaderPar(const uint8_t * cmd, int len, uint32_t dwParity)
15c4dc5a 1327{
1328 int i, j;
1329 int last;
f7e3ed82 1330 uint8_t b;
e30c654b 1331
15c4dc5a 1332 ToSendReset();
e30c654b 1333
15c4dc5a 1334 // Start of Communication (Seq. Z)
72934aa3 1335 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1336 last = 0;
e30c654b 1337
15c4dc5a 1338 // Generate send structure for the data bits
1339 for (i = 0; i < len; i++) {
1340 // Get the current byte to send
1341 b = cmd[i];
e30c654b 1342
15c4dc5a 1343 for (j = 0; j < 8; j++) {
1344 if (b & 1) {
1345 // Sequence X
72934aa3 1346 ToSend[++ToSendMax] = SEC_X;
15c4dc5a 1347 last = 1;
1348 } else {
1349 if (last == 0) {
1350 // Sequence Z
72934aa3 1351 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1352 } else {
1353 // Sequence Y
72934aa3 1354 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1355 last = 0;
1356 }
1357 }
1358 b >>= 1;
1359 }
e30c654b 1360
15c4dc5a 1361 // Get the parity bit
1362 if ((dwParity >> i) & 0x01) {
1363 // Sequence X
72934aa3 1364 ToSend[++ToSendMax] = SEC_X;
15c4dc5a 1365 last = 1;
1366 } else {
1367 if (last == 0) {
1368 // Sequence Z
72934aa3 1369 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1370 } else {
1371 // Sequence Y
72934aa3 1372 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1373 last = 0;
1374 }
1375 }
1376 }
e30c654b 1377
15c4dc5a 1378 // End of Communication
1379 if (last == 0) {
1380 // Sequence Z
72934aa3 1381 ToSend[++ToSendMax] = SEC_Z;
15c4dc5a 1382 } else {
1383 // Sequence Y
72934aa3 1384 ToSend[++ToSendMax] = SEC_Y;
15c4dc5a 1385 last = 0;
1386 }
1387 // Sequence Y
72934aa3 1388 ToSend[++ToSendMax] = SEC_Y;
e30c654b 1389
15c4dc5a 1390 // Just to be sure!
72934aa3 1391 ToSend[++ToSendMax] = SEC_Y;
1392 ToSend[++ToSendMax] = SEC_Y;
1393 ToSend[++ToSendMax] = SEC_Y;
e30c654b 1394
15c4dc5a 1395 // Convert from last character reference to length
1396 ToSendMax++;
1397}
1398
9ca155ba
M
1399//-----------------------------------------------------------------------------
1400// Wait for commands from reader
1401// Stop when button is pressed (return 1) or field was gone (return 2)
1402// Or return 0 when command is captured
1403//-----------------------------------------------------------------------------
1404static int EmGetCmd(uint8_t *received, int *len, int maxLen)
1405{
1406 *len = 0;
1407
1408 uint32_t timer = 0, vtime = 0;
1409 int analogCnt = 0;
1410 int analogAVG = 0;
1411
1412 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1413 // only, since we are receiving, not transmitting).
1414 // Signal field is off with the appropriate LED
1415 LED_D_OFF();
1416 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1417
1418 // Set ADC to read field strength
1419 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1420 AT91C_BASE_ADC->ADC_MR =
1421 ADC_MODE_PRESCALE(32) |
1422 ADC_MODE_STARTUP_TIME(16) |
1423 ADC_MODE_SAMPLE_HOLD_TIME(8);
1424 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1425 // start ADC
1426 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1427
1428 // Now run a 'software UART' on the stream of incoming samples.
1429 Uart.output = received;
1430 Uart.byteCntMax = maxLen;
1431 Uart.state = STATE_UNSYNCD;
1432
1433 for(;;) {
1434 WDT_HIT();
1435
1436 if (BUTTON_PRESS()) return 1;
1437
1438 // test if the field exists
1439 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1440 analogCnt++;
1441 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1442 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1443 if (analogCnt >= 32) {
1444 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1445 vtime = GetTickCount();
1446 if (!timer) timer = vtime;
1447 // 50ms no field --> card to idle state
1448 if (vtime - timer > 50) return 2;
1449 } else
1450 if (timer) timer = 0;
1451 analogCnt = 0;
1452 analogAVG = 0;
1453 }
1454 }
1455 // transmit none
1456 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1457 AT91C_BASE_SSC->SSC_THR = 0x00;
1458 }
1459 // receive and test the miller decoding
1460 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1461 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1462 if(MillerDecoding((b & 0xf0) >> 4)) {
1463 *len = Uart.byteCnt;
8f51ddb0 1464 if (tracing) LogTrace(received, *len, GetDeltaCountUS(), Uart.parityBits, TRUE);
9ca155ba
M
1465 return 0;
1466 }
1467 if(MillerDecoding(b & 0x0f)) {
1468 *len = Uart.byteCnt;
8f51ddb0 1469 if (tracing) LogTrace(received, *len, GetDeltaCountUS(), Uart.parityBits, TRUE);
9ca155ba
M
1470 return 0;
1471 }
1472 }
1473 }
1474}
1475
1476static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, int correctionNeeded)
1477{
1478 int i, u = 0;
1479 uint8_t b = 0;
1480
1481 // Modulate Manchester
1482 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1483 AT91C_BASE_SSC->SSC_THR = 0x00;
1484 FpgaSetupSsc();
1485
1486 // include correction bit
1487 i = 1;
1488 if((Uart.parityBits & 0x01) || correctionNeeded) {
1489 // 1236, so correction bit needed
1490 i = 0;
1491 }
1492
1493 // send cycle
1494 for(;;) {
1495 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1496 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1497 (void)b;
1498 }
1499 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1500 if(i > respLen) {
8f51ddb0 1501 b = 0xff; // was 0x00
9ca155ba
M
1502 u++;
1503 } else {
1504 b = resp[i];
1505 i++;
1506 }
1507 AT91C_BASE_SSC->SSC_THR = b;
1508
1509 if(u > 4) break;
1510 }
1511 if(BUTTON_PRESS()) {
1512 break;
1513 }
1514 }
1515
1516 return 0;
1517}
1518
8f51ddb0
M
1519int EmSend4bitEx(uint8_t resp, int correctionNeeded){
1520 Code4bitAnswerAsTag(resp);
0a39986e 1521 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
8f51ddb0 1522 if (tracing) LogTrace(&resp, 1, GetDeltaCountUS(), GetParity(&resp, 1), FALSE);
0a39986e 1523 return res;
9ca155ba
M
1524}
1525
8f51ddb0
M
1526int EmSend4bit(uint8_t resp){
1527 return EmSend4bitEx(resp, 0);
1528}
1529
1530int EmSendCmdExPar(uint8_t *resp, int respLen, int correctionNeeded, uint32_t par){
1531 CodeIso14443aAsTagPar(resp, respLen, par);
1532 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1533 if (tracing) LogTrace(resp, respLen, GetDeltaCountUS(), par, FALSE);
1534 return res;
1535}
1536
1537int EmSendCmdEx(uint8_t *resp, int respLen, int correctionNeeded){
1538 return EmSendCmdExPar(resp, respLen, correctionNeeded, GetParity(resp, respLen));
1539}
1540
1541int EmSendCmd(uint8_t *resp, int respLen){
1542 return EmSendCmdExPar(resp, respLen, 0, GetParity(resp, respLen));
1543}
1544
1545int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par){
1546 return EmSendCmdExPar(resp, respLen, 0, par);
9ca155ba
M
1547}
1548
15c4dc5a 1549//-----------------------------------------------------------------------------
1550// Wait a certain time for tag response
1551// If a response is captured return TRUE
1552// If it takes to long return FALSE
1553//-----------------------------------------------------------------------------
f7e3ed82 1554static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
15c4dc5a 1555{
1556 // buffer needs to be 512 bytes
1557 int c;
1558
1559 // Set FPGA mode to "reader listen mode", no modulation (listen
534983d7 1560 // only, since we are receiving, not transmitting).
1561 // Signal field is on with the appropriate LED
1562 LED_D_ON();
1563 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
15c4dc5a 1564
534983d7 1565 // Now get the answer from the card
1566 Demod.output = receivedResponse;
1567 Demod.len = 0;
1568 Demod.state = DEMOD_UNSYNCD;
15c4dc5a 1569
f7e3ed82 1570 uint8_t b;
15c4dc5a 1571 if (elapsed) *elapsed = 0;
1572
1573 c = 0;
1574 for(;;) {
534983d7 1575 WDT_HIT();
15c4dc5a 1576
534983d7 1577 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1578 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
15c4dc5a 1579 if (elapsed) (*elapsed)++;
534983d7 1580 }
1581 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1582 if(c < iso14a_timeout) { c++; } else { return FALSE; }
1583 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
72934aa3 1584 if(ManchesterDecoding((b>>4) & 0xf)) {
15c4dc5a 1585 *samples = ((c - 1) << 3) + 4;
1586 return TRUE;
1587 }
1588 if(ManchesterDecoding(b & 0x0f)) {
1589 *samples = c << 3;
1590 return TRUE;
1591 }
534983d7 1592 }
1593 }
15c4dc5a 1594}
1595
f7e3ed82 1596void ReaderTransmitShort(const uint8_t* bt)
15c4dc5a 1597{
1598 int wait = 0;
1599 int samples = 0;
1600
1601 ShortFrameFromReader(*bt);
e30c654b 1602
15c4dc5a 1603 // Select the card
e30c654b 1604 TransmitFor14443a(ToSend, ToSendMax, &samples, &wait);
1605
15c4dc5a 1606 // Store reader command in buffer
1607 if (tracing) LogTrace(bt,1,0,GetParity(bt,1),TRUE);
1608}
1609
f7e3ed82 1610void ReaderTransmitPar(uint8_t* frame, int len, uint32_t par)
15c4dc5a 1611{
1612 int wait = 0;
1613 int samples = 0;
e30c654b 1614
15c4dc5a 1615 // This is tied to other size changes
f7e3ed82 1616 // uint8_t* frame_addr = ((uint8_t*)BigBuf) + 2024;
15c4dc5a 1617 CodeIso14443aAsReaderPar(frame,len,par);
e30c654b 1618
15c4dc5a 1619 // Select the card
e30c654b 1620 TransmitFor14443a(ToSend, ToSendMax, &samples, &wait);
534983d7 1621 if(trigger)
1622 LED_A_ON();
e30c654b 1623
15c4dc5a 1624 // Store reader command in buffer
1625 if (tracing) LogTrace(frame,len,0,par,TRUE);
1626}
1627
1628
f7e3ed82 1629void ReaderTransmit(uint8_t* frame, int len)
15c4dc5a 1630{
1631 // Generate parity and redirect
1632 ReaderTransmitPar(frame,len,GetParity(frame,len));
1633}
1634
f7e3ed82 1635int ReaderReceive(uint8_t* receivedAnswer)
15c4dc5a 1636{
1637 int samples = 0;
20f9a2a1 1638 if (!GetIso14443aAnswerFromTag(receivedAnswer,160,&samples,0)) return FALSE;
15c4dc5a 1639 if (tracing) LogTrace(receivedAnswer,Demod.len,samples,Demod.parityBits,FALSE);
7e758047 1640 if(samples == 0) return FALSE;
1641 return Demod.len;
15c4dc5a 1642}
1643
f89c7050
M
1644int ReaderReceivePar(uint8_t* receivedAnswer, uint32_t * parptr)
1645{
1646 int samples = 0;
1647 if (!GetIso14443aAnswerFromTag(receivedAnswer,160,&samples,0)) return FALSE;
1648 if (tracing) LogTrace(receivedAnswer,Demod.len,samples,Demod.parityBits,FALSE);
1649 *parptr = Demod.parityBits;
1650 if(samples == 0) return FALSE;
1651 return Demod.len;
1652}
1653
7e758047 1654/* performs iso14443a anticolision procedure
534983d7 1655 * fills the uid pointer unless NULL
1656 * fills resp_data unless NULL */
79a73ab2 1657int iso14443a_select_card(byte_t* uid_ptr, iso14a_card_select_t* p_hi14a_card, uint32_t* cuid_ptr) {
20f9a2a1 1658 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
f7e3ed82 1659 uint8_t sel_all[] = { 0x93,0x20 };
1660 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
7e758047 1661 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
902cb3c0 1662 uint8_t* resp = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); // was 3560 - tied to other size changes
79a73ab2 1663 byte_t uid_resp[4];
1664 size_t uid_resp_len;
15c4dc5a 1665
534983d7 1666 uint8_t sak = 0x04; // cascade uid
1667 int cascade_level = 0;
7e758047 1668 int len;
79a73ab2 1669
7e758047 1670 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1671 ReaderTransmitShort(wupa);
1672 // Receive the ATQA
1673 if(!ReaderReceive(resp)) return 0;
902cb3c0 1674// Dbprintf("atqa: %02x %02x",resp[0],resp[1]);
1675
79a73ab2 1676 if(p_hi14a_card) {
1677 memcpy(p_hi14a_card->atqa, resp, 2);
1678 p_hi14a_card->uidlen = 0;
1679 memset(p_hi14a_card->uid,0,10);
1680 }
534983d7 1681
79a73ab2 1682 // clear uid
1683 if (uid_ptr) {
1684 memset(uid_ptr,0,10);
1685 }
1686
534983d7 1687 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
7e758047 1688 // which case we need to make a cascade 2 request and select - this is a long UID
534983d7 1689 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1690 for(; sak & 0x04; cascade_level++)
7e758047 1691 {
534983d7 1692 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1693 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1694
1695 // SELECT_ALL
1696 ReaderTransmit(sel_all,sizeof(sel_all));
1697 if (!ReaderReceive(resp)) return 0;
79a73ab2 1698
1699 // First backup the current uid
1700 memcpy(uid_resp,resp,4);
1701 uid_resp_len = 4;
1702 // Dbprintf("uid: %02x %02x %02x %02x",uid_resp[0],uid_resp[1],uid_resp[2],uid_resp[3]);
1703
20f9a2a1 1704 // calculate crypto UID
79a73ab2 1705 if(cuid_ptr) {
1706 *cuid_ptr = bytes_to_num(uid_resp, 4);
1707 }
e30c654b 1708
7e758047 1709 // Construct SELECT UID command
534983d7 1710 memcpy(sel_uid+2,resp,5);
1711 AppendCrc14443a(sel_uid,7);
1712 ReaderTransmit(sel_uid,sizeof(sel_uid));
1713
7e758047 1714 // Receive the SAK
1715 if (!ReaderReceive(resp)) return 0;
534983d7 1716 sak = resp[0];
79a73ab2 1717
1718 // Test if more parts of the uid are comming
1719 if ((sak & 0x04) && uid_resp[0] == 0x88) {
1720 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1721 // http://www.nxp.com/documents/application_note/AN10927.pdf
1722 memcpy(uid_ptr, uid_ptr + 1, 3);
1723 uid_resp_len = 3;
1724 }
1725
1726 if(uid_ptr) {
1727 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1728 }
1729
1730 if(p_hi14a_card) {
1731 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1732 p_hi14a_card->uidlen += uid_resp_len;
1733 }
7e758047 1734 }
79a73ab2 1735
1736 if(p_hi14a_card) {
1737 p_hi14a_card->sak = sak;
1738 p_hi14a_card->ats_len = 0;
20f9a2a1 1739 }
534983d7 1740
79a73ab2 1741 if( (sak & 0x20) == 0) {
7e758047 1742 return 2; // non iso14443a compliant tag
79a73ab2 1743 }
534983d7 1744
7e758047 1745 // Request for answer to select
5191b3d1 1746 AppendCrc14443a(rats, 2);
1747 ReaderTransmit(rats, sizeof(rats));
1748
1749 if (!(len = ReaderReceive(resp))) return 0;
1750
1751 if(p_hi14a_card) {
79a73ab2 1752 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1753 p_hi14a_card->ats_len = len;
534983d7 1754 }
20f9a2a1 1755
b0127e65 1756 // reset the PCB block number
1757 iso14_pcb_blocknum = 0;
7e758047 1758 return 1;
1759}
15c4dc5a 1760
7e758047 1761void iso14443a_setup() {
902cb3c0 1762 // Set up the synchronous serial port
1763 FpgaSetupSsc();
7e758047 1764 // Start from off (no field generated)
1765 // Signal field is off with the appropriate LED
1766 LED_D_OFF();
1767 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
902cb3c0 1768 SpinDelay(50);
15c4dc5a 1769
7e758047 1770 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
e30c654b 1771
7e758047 1772 // Now give it time to spin up.
1773 // Signal field is on with the appropriate LED
1774 LED_D_ON();
1775 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
902cb3c0 1776 SpinDelay(50);
534983d7 1777
1778 iso14a_timeout = 2048; //default
7e758047 1779}
15c4dc5a 1780
534983d7 1781int iso14_apdu(uint8_t * cmd, size_t cmd_len, void * data) {
1782 uint8_t real_cmd[cmd_len+4];
1783 real_cmd[0] = 0x0a; //I-Block
b0127e65 1784 // put block number into the PCB
1785 real_cmd[0] |= iso14_pcb_blocknum;
534983d7 1786 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1787 memcpy(real_cmd+2, cmd, cmd_len);
1788 AppendCrc14443a(real_cmd,cmd_len+2);
1789
1790 ReaderTransmit(real_cmd, cmd_len+4);
1791 size_t len = ReaderReceive(data);
b0127e65 1792 uint8_t * data_bytes = (uint8_t *) data;
1793 if (!len)
1794 return 0; //DATA LINK ERROR
1795 // if we received an I- or R(ACK)-Block with a block number equal to the
1796 // current block number, toggle the current block number
1797 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1798 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1799 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1800 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1801 {
1802 iso14_pcb_blocknum ^= 1;
1803 }
1804
534983d7 1805 return len;
1806}
1807
7e758047 1808//-----------------------------------------------------------------------------
1809// Read an ISO 14443a tag. Send out commands and store answers.
1810//
1811//-----------------------------------------------------------------------------
902cb3c0 1812void ReaderIso14443a(UsbCommand * c)
7e758047 1813{
534983d7 1814 iso14a_command_t param = c->arg[0];
1815 uint8_t * cmd = c->d.asBytes;
1816 size_t len = c->arg[1];
79a73ab2 1817 uint32_t arg0 = 0;
1818 byte_t buf[USB_CMD_DATA_SIZE];
902cb3c0 1819
1820 iso14a_clear_trace();
1821 iso14a_set_tracing(true);
e30c654b 1822
79a73ab2 1823 if(param & ISO14A_REQUEST_TRIGGER) {
1824 iso14a_set_trigger(1);
1825 }
15c4dc5a 1826
534983d7 1827 if(param & ISO14A_CONNECT) {
1828 iso14443a_setup();
79a73ab2 1829 arg0 = iso14443a_select_card(NULL,(iso14a_card_select_t*)buf,NULL);
1830 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(iso14a_card_select_t));
902cb3c0 1831// UsbSendPacket((void *)ack, sizeof(UsbCommand));
534983d7 1832 }
e30c654b 1833
534983d7 1834 if(param & ISO14A_SET_TIMEOUT) {
1835 iso14a_timeout = c->arg[2];
1836 }
e30c654b 1837
534983d7 1838 if(param & ISO14A_SET_TIMEOUT) {
1839 iso14a_timeout = c->arg[2];
1840 }
e30c654b 1841
534983d7 1842 if(param & ISO14A_APDU) {
902cb3c0 1843 arg0 = iso14_apdu(cmd, len, buf);
79a73ab2 1844 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
902cb3c0 1845// UsbSendPacket((void *)ack, sizeof(UsbCommand));
534983d7 1846 }
e30c654b 1847
534983d7 1848 if(param & ISO14A_RAW) {
1849 if(param & ISO14A_APPEND_CRC) {
1850 AppendCrc14443a(cmd,len);
1851 len += 2;
15c4dc5a 1852 }
534983d7 1853 ReaderTransmit(cmd,len);
902cb3c0 1854 arg0 = ReaderReceive(buf);
1855// UsbSendPacket((void *)ack, sizeof(UsbCommand));
79a73ab2 1856 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
534983d7 1857 }
15c4dc5a 1858
79a73ab2 1859 if(param & ISO14A_REQUEST_TRIGGER) {
1860 iso14a_set_trigger(0);
1861 }
15c4dc5a 1862
79a73ab2 1863 if(param & ISO14A_NO_DISCONNECT) {
534983d7 1864 return;
79a73ab2 1865 }
15c4dc5a 1866
15c4dc5a 1867 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1868 LEDsoff();
15c4dc5a 1869}
b0127e65 1870
15c4dc5a 1871//-----------------------------------------------------------------------------
1872// Read an ISO 14443a tag. Send out commands and store answers.
1873//
1874//-----------------------------------------------------------------------------
f7e3ed82 1875void ReaderMifare(uint32_t parameter)
15c4dc5a 1876{
15c4dc5a 1877 // Mifare AUTH
f7e3ed82 1878 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
f89c7050 1879 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
e30c654b 1880
902cb3c0 1881 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); // was 3560 - tied to other size changes
f89c7050
M
1882 traceLen = 0;
1883 tracing = false;
e30c654b 1884
7e758047 1885 iso14443a_setup();
e30c654b 1886
15c4dc5a 1887 LED_A_ON();
1888 LED_B_OFF();
1889 LED_C_OFF();
e30c654b 1890
f89c7050
M
1891 byte_t nt_diff = 0;
1892 LED_A_OFF();
1893 byte_t par = 0;
9f693930 1894 //byte_t par_mask = 0xff;
f89c7050
M
1895 byte_t par_low = 0;
1896 int led_on = TRUE;
50193c1e 1897 uint8_t uid[8];
f89c7050 1898 uint32_t cuid;
e30c654b 1899
f89c7050
M
1900 tracing = FALSE;
1901 byte_t nt[4] = {0,0,0,0};
f397b5cc 1902 byte_t nt_attacked[4], nt_noattack[4];
f89c7050
M
1903 byte_t par_list[8] = {0,0,0,0,0,0,0,0};
1904 byte_t ks_list[8] = {0,0,0,0,0,0,0,0};
f397b5cc 1905 num_to_bytes(parameter, 4, nt_noattack);
50193c1e 1906 int isOK = 0, isNULL = 0;
f397b5cc 1907
f89c7050
M
1908 while(TRUE)
1909 {
bfaecce6 1910 LED_C_OFF();
f89c7050 1911 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
5a9506ac 1912 SpinDelay(50);
f89c7050 1913 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
bfaecce6
M
1914 LED_C_ON();
1915 SpinDelay(2);
e30c654b 1916
f89c7050
M
1917 // Test if the action was cancelled
1918 if(BUTTON_PRESS()) {
1919 break;
1920 }
e30c654b 1921
f89c7050 1922 if(!iso14443a_select_card(uid, NULL, &cuid)) continue;
e30c654b 1923
f89c7050
M
1924 // Transmit MIFARE_CLASSIC_AUTH
1925 ReaderTransmit(mf_auth, sizeof(mf_auth));
15c4dc5a 1926
f89c7050
M
1927 // Receive the (16 bit) "random" nonce
1928 if (!ReaderReceive(receivedAnswer)) continue;
1929 memcpy(nt, receivedAnswer, 4);
e30c654b 1930
f89c7050
M
1931 // Transmit reader nonce and reader answer
1932 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar),par);
15c4dc5a 1933
f89c7050
M
1934 // Receive 4 bit answer
1935 if (ReaderReceive(receivedAnswer))
1936 {
f397b5cc
M
1937 if ( (parameter != 0) && (memcmp(nt, nt_noattack, 4) == 0) ) continue;
1938
423efacc 1939 isNULL = !(nt_attacked[0] == 0) && (nt_attacked[1] == 0) && (nt_attacked[2] == 0) && (nt_attacked[3] == 0);
50193c1e
M
1940 if ( (isNULL != 0 ) && (memcmp(nt, nt_attacked, 4) != 0) ) continue;
1941
f89c7050
M
1942 if (nt_diff == 0)
1943 {
1944 LED_A_ON();
1945 memcpy(nt_attacked, nt, 4);
9f693930 1946 //par_mask = 0xf8;
f89c7050
M
1947 par_low = par & 0x07;
1948 }
15c4dc5a 1949
f89c7050
M
1950 led_on = !led_on;
1951 if(led_on) LED_B_ON(); else LED_B_OFF();
1952 par_list[nt_diff] = par;
1953 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
e30c654b 1954
f89c7050
M
1955 // Test if the information is complete
1956 if (nt_diff == 0x07) {
1957 isOK = 1;
1958 break;
1959 }
1960
1961 nt_diff = (nt_diff + 1) & 0x07;
1962 mf_nr_ar[3] = nt_diff << 5;
1963 par = par_low;
1964 } else {
1965 if (nt_diff == 0)
1966 {
1967 par++;
1968 } else {
1969 par = (((par >> 3) + 1) << 3) | par_low;
1970 }
1971 }
1972 }
e30c654b 1973
f89c7050
M
1974 LogTrace(nt, 4, 0, GetParity(nt, 4), TRUE);
1975 LogTrace(par_list, 8, 0, GetParity(par_list, 8), TRUE);
1976 LogTrace(ks_list, 8, 0, GetParity(ks_list, 8), TRUE);
e30c654b 1977
902cb3c0 1978 byte_t buf[48];
1979// UsbCommand ack = {CMD_ACK, {isOK, 0, 0}};
1980 memcpy(buf + 0, uid, 4);
1981 memcpy(buf + 4, nt, 4);
1982 memcpy(buf + 8, par_list, 8);
1983 memcpy(buf + 16, ks_list, 8);
f89c7050
M
1984
1985 LED_B_ON();
902cb3c0 1986 cmd_send(CMD_ACK,isOK,0,0,buf,48);
1987// UsbSendPacket((uint8_t *)&ack, sizeof(UsbCommand));
f89c7050
M
1988 LED_B_OFF();
1989
1990 // Thats it...
15c4dc5a 1991 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1992 LEDsoff();
f89c7050
M
1993 tracing = TRUE;
1994
f397b5cc 1995 if (MF_DBGLEVEL >= 1) DbpString("COMMAND mifare FINISHED");
20f9a2a1
M
1996}
1997
20f9a2a1
M
1998
1999//-----------------------------------------------------------------------------
2000// MIFARE 1K simulate.
2001//
2002//-----------------------------------------------------------------------------
2003void Mifare1ksim(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
2004{
50193c1e 2005 int cardSTATE = MFEMUL_NOFIELD;
8556b852 2006 int _7BUID = 0;
9ca155ba 2007 int vHf = 0; // in mV
9f693930 2008 //int nextCycleTimeout = 0;
8f51ddb0 2009 int res;
51969283 2010// uint32_t timer = 0;
0a39986e
M
2011 uint32_t selTimer = 0;
2012 uint32_t authTimer = 0;
2013 uint32_t par = 0;
9ca155ba 2014 int len = 0;
8f51ddb0 2015 uint8_t cardWRBL = 0;
9ca155ba
M
2016 uint8_t cardAUTHSC = 0;
2017 uint8_t cardAUTHKEY = 0xff; // no authentication
9f693930 2018 //uint32_t cardRn = 0;
51969283 2019 uint32_t cardRr = 0;
9ca155ba 2020 uint32_t cuid = 0;
9f693930 2021 //uint32_t rn_enc = 0;
51969283 2022 uint32_t ans = 0;
0014cb46
M
2023 uint32_t cardINTREG = 0;
2024 uint8_t cardINTBLOCK = 0;
9ca155ba
M
2025 struct Crypto1State mpcs = {0, 0};
2026 struct Crypto1State *pcs;
2027 pcs = &mpcs;
2028
8f51ddb0
M
2029 uint8_t* receivedCmd = eml_get_bigbufptr_recbuf();
2030 uint8_t *response = eml_get_bigbufptr_sendbuf();
9ca155ba 2031
8556b852 2032 static uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
9ca155ba 2033
0a39986e
M
2034 static uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2035 static uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
9ca155ba 2036
0a39986e 2037 static uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
8556b852 2038 static uint8_t rSAK1[] = {0x04, 0xda, 0x17};
9ca155ba 2039
0014cb46
M
2040 static uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2041// static uint8_t rAUTH_NT[] = {0x1a, 0xac, 0xff, 0x4f};
0a39986e 2042 static uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
0014cb46 2043
0a39986e
M
2044 // clear trace
2045 traceLen = 0;
2046 tracing = true;
51969283
M
2047
2048 // Authenticate response - nonce
2049 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
9ca155ba 2050
8556b852
M
2051 // get UID from emul memory
2052 emlGetMemBt(receivedCmd, 7, 1);
2053 _7BUID = !(receivedCmd[0] == 0x00);
2054 if (!_7BUID) { // ---------- 4BUID
2055 rATQA[0] = 0x04;
2056
2057 emlGetMemBt(rUIDBCC1, 0, 4);
2058 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2059 } else { // ---------- 7BUID
2060 rATQA[0] = 0x44;
2061
2062 rUIDBCC1[0] = 0x88;
2063 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2064 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2065 emlGetMemBt(rUIDBCC2, 3, 4);
2066 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2067 }
2068
9ca155ba 2069// -------------------------------------- test area
50193c1e 2070
9ca155ba 2071// -------------------------------------- END test area
8f51ddb0
M
2072 // start mkseconds counter
2073 StartCountUS();
9ca155ba
M
2074
2075 // We need to listen to the high-frequency, peak-detected path.
2076 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2077 FpgaSetupSsc();
2078
2079 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2080 SpinDelay(200);
2081
0014cb46 2082 if (MF_DBGLEVEL >= 1) Dbprintf("Started. 7buid=%d", _7BUID);
8f51ddb0
M
2083 // calibrate mkseconds counter
2084 GetDeltaCountUS();
9ca155ba
M
2085 while (true) {
2086 WDT_HIT();
9ca155ba 2087
8f51ddb0
M
2088 if(BUTTON_PRESS()) {
2089 break;
2090 }
2091
9ca155ba
M
2092 // find reader field
2093 // Vref = 3300mV, and an 10:1 voltage divider on the input
2094 // can measure voltages up to 33000 mV
2095 if (cardSTATE == MFEMUL_NOFIELD) {
2096 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2097 if (vHf > MF_MINFIELDV) {
0014cb46 2098 cardSTATE_TO_IDLE();
9ca155ba
M
2099 LED_A_ON();
2100 }
2101 }
2102
2103 if (cardSTATE != MFEMUL_NOFIELD) {
81cd0474 2104 res = EmGetCmd(receivedCmd, &len, RECV_CMD_SIZE); // (+ nextCycleTimeout)
9ca155ba
M
2105 if (res == 2) {
2106 cardSTATE = MFEMUL_NOFIELD;
2107 LEDsoff();
2108 continue;
2109 }
2110 if(res) break;
2111 }
2112
9f693930 2113 //nextCycleTimeout = 0;
8f51ddb0 2114
9ca155ba 2115// if (len) Dbprintf("len:%d cmd: %02x %02x %02x %02x", len, receivedCmd[0], receivedCmd[1], receivedCmd[2], receivedCmd[3]);
0a39986e
M
2116
2117 if (len != 4 && cardSTATE != MFEMUL_NOFIELD) { // len != 4 <---- speed up the code 4 authentication
8f51ddb0 2118 // REQ or WUP request in ANY state and WUP in HALTED state
0a39986e
M
2119 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2120 selTimer = GetTickCount();
2121 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2122 cardSTATE = MFEMUL_SELECT1;
2123
2124 // init crypto block
2125 LED_B_OFF();
2126 LED_C_OFF();
2127 crypto1_destroy(pcs);
2128 cardAUTHKEY = 0xff;
2129 }
2130 }
9ca155ba 2131
50193c1e
M
2132 switch (cardSTATE) {
2133 case MFEMUL_NOFIELD:{
2134 break;
2135 }
9ca155ba 2136 case MFEMUL_HALTED:{
0a39986e 2137 break;
9ca155ba 2138 }
50193c1e
M
2139 case MFEMUL_IDLE:{
2140 break;
2141 }
2142 case MFEMUL_SELECT1:{
9ca155ba
M
2143 // select all
2144 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2145 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
0014cb46 2146 break;
9ca155ba
M
2147 }
2148
2149 // select card
0a39986e
M
2150 if (len == 9 &&
2151 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
8556b852
M
2152 if (!_7BUID)
2153 EmSendCmd(rSAK, sizeof(rSAK));
2154 else
2155 EmSendCmd(rSAK1, sizeof(rSAK1));
9ca155ba
M
2156
2157 cuid = bytes_to_num(rUIDBCC1, 4);
8556b852
M
2158 if (!_7BUID) {
2159 cardSTATE = MFEMUL_WORK;
0014cb46
M
2160 LED_B_ON();
2161 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2162 break;
8556b852
M
2163 } else {
2164 cardSTATE = MFEMUL_SELECT2;
2165 break;
2166 }
9ca155ba
M
2167 }
2168
50193c1e
M
2169 break;
2170 }
2171 case MFEMUL_SELECT2:{
0014cb46
M
2172 if (!len) break;
2173
8556b852 2174 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
9ca155ba 2175 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
8556b852
M
2176 break;
2177 }
9ca155ba 2178
8556b852
M
2179 // select 2 card
2180 if (len == 9 &&
2181 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2182 EmSendCmd(rSAK, sizeof(rSAK));
2183
2184 cuid = bytes_to_num(rUIDBCC2, 4);
2185 cardSTATE = MFEMUL_WORK;
2186 LED_B_ON();
0014cb46 2187 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
8556b852
M
2188 break;
2189 }
0014cb46
M
2190
2191 // i guess there is a command). go into the work state.
2192 if (len != 4) break;
2193 cardSTATE = MFEMUL_WORK;
2194 goto lbWORK;
50193c1e
M
2195 }
2196 case MFEMUL_AUTH1:{
9ca155ba 2197 if (len == 8) {
51969283 2198 // --- crypto
9f693930
GY
2199 //rn_enc = bytes_to_num(receivedCmd, 4);
2200 //cardRn = rn_enc ^ crypto1_word(pcs, rn_enc , 1);
51969283
M
2201 cardRr = bytes_to_num(&receivedCmd[4], 4) ^ crypto1_word(pcs, 0, 0);
2202 // test if auth OK
2203 if (cardRr != prng_successor(nonce, 64)){
0014cb46
M
2204 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED. cardRr=%08x, succ=%08x", cardRr, prng_successor(nonce, 64));
2205 cardSTATE_TO_IDLE();
51969283
M
2206 break;
2207 }
2208 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2209 num_to_bytes(ans, 4, rAUTH_AT);
2210 // --- crypto
2211 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
0a39986e
M
2212 cardSTATE = MFEMUL_AUTH2;
2213 } else {
0014cb46 2214 cardSTATE_TO_IDLE();
9ca155ba 2215 }
0a39986e 2216 if (cardSTATE != MFEMUL_AUTH2) break;
50193c1e
M
2217 }
2218 case MFEMUL_AUTH2:{
9ca155ba 2219 LED_C_ON();
0a39986e 2220 cardSTATE = MFEMUL_WORK;
0014cb46 2221 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED. sec=%d, key=%d time=%d", cardAUTHSC, cardAUTHKEY, GetTickCount() - authTimer);
50193c1e
M
2222 break;
2223 }
9ca155ba 2224 case MFEMUL_WORK:{
0014cb46 2225lbWORK: if (len == 0) break;
0a39986e 2226
51969283
M
2227 if (cardAUTHKEY == 0xff) {
2228 // first authentication
2229 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2230 authTimer = GetTickCount();
2231
2232 cardAUTHSC = receivedCmd[1] / 4; // received block num
2233 cardAUTHKEY = receivedCmd[0] - 0x60;
2234
2235 // --- crypto
2236 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2237 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2238 num_to_bytes(nonce, 4, rAUTH_AT);
2239 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2240 // --- crypto
2241
2242// last working revision
2243// EmSendCmd14443aRaw(resp1, resp1Len, 0);
2244// LogTrace(NULL, 0, GetDeltaCountUS(), 0, true);
2245
2246 cardSTATE = MFEMUL_AUTH1;
9f693930 2247 //nextCycleTimeout = 10;
51969283
M
2248 break;
2249 }
2250 } else {
2251 // decrypt seqence
2252 mf_crypto1_decrypt(pcs, receivedCmd, len);
2253
2254 // nested authentication
2255 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2256 authTimer = GetTickCount();
2257
2258 cardAUTHSC = receivedCmd[1] / 4; // received block num
2259 cardAUTHKEY = receivedCmd[0] - 0x60;
2260
2261 // --- crypto
2262 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2263 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2264 num_to_bytes(ans, 4, rAUTH_AT);
2265 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2266 // --- crypto
2267
2268 cardSTATE = MFEMUL_AUTH1;
9f693930 2269 //nextCycleTimeout = 10;
51969283
M
2270 break;
2271 }
2272 }
0a39986e 2273
8f51ddb0
M
2274 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2275 // BUT... ACK --> NACK
2276 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2277 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2278 break;
2279 }
2280
2281 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2282 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2283 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2284 break;
0a39986e
M
2285 }
2286
2287 // read block
2288 if (len == 4 && receivedCmd[0] == 0x30) {
51969283 2289 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
8f51ddb0
M
2290 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2291 break;
2292 }
2293 emlGetMem(response, receivedCmd[1], 1);
2294 AppendCrc14443a(response, 16);
2295 mf_crypto1_encrypt(pcs, response, 18, &par);
2296 EmSendCmdPar(response, 18, par);
0a39986e
M
2297 break;
2298 }
2299
2300 // write block
2301 if (len == 4 && receivedCmd[0] == 0xA0) {
51969283 2302 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
8f51ddb0
M
2303 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2304 break;
2305 }
2306 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
9f693930 2307 //nextCycleTimeout = 50;
8f51ddb0
M
2308 cardSTATE = MFEMUL_WRITEBL2;
2309 cardWRBL = receivedCmd[1];
0a39986e 2310 break;
9ca155ba 2311 }
8f51ddb0 2312
0014cb46
M
2313 // works with cardINTREG
2314
2315 // increment, decrement, restore
2316 if (len == 4 && (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2)) {
2317 if (receivedCmd[1] >= 16 * 4 ||
2318 receivedCmd[1] / 4 != cardAUTHSC ||
2319 emlCheckValBl(receivedCmd[1])) {
2320 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2321 break;
2322 }
2323 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2324 if (receivedCmd[0] == 0xC1)
2325 cardSTATE = MFEMUL_INTREG_INC;
2326 if (receivedCmd[0] == 0xC0)
2327 cardSTATE = MFEMUL_INTREG_DEC;
2328 if (receivedCmd[0] == 0xC2)
2329 cardSTATE = MFEMUL_INTREG_REST;
2330 cardWRBL = receivedCmd[1];
2331
2332 break;
2333 }
2334
2335
2336 // transfer
2337 if (len == 4 && receivedCmd[0] == 0xB0) {
2338 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
2339 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2340 break;
2341 }
2342
2343 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2344 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2345 else
2346 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2347
2348 break;
2349 }
2350
9ca155ba 2351 // halt
0a39986e 2352 if (len == 4 && (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00)) {
9ca155ba 2353 LED_B_OFF();
0a39986e 2354 LED_C_OFF();
0014cb46
M
2355 cardSTATE = MFEMUL_HALTED;
2356 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
0a39986e 2357 break;
9ca155ba 2358 }
51969283 2359
8f51ddb0
M
2360 // command not allowed
2361 if (len == 4) {
2362 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2363 break;
2364 }
51969283
M
2365
2366 // case break
2367 break;
8f51ddb0
M
2368 }
2369 case MFEMUL_WRITEBL2:{
2370 if (len == 18){
2371 mf_crypto1_decrypt(pcs, receivedCmd, len);
2372 emlSetMem(receivedCmd, cardWRBL, 1);
2373 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2374 cardSTATE = MFEMUL_WORK;
2375 break;
51969283 2376 } else {
0014cb46 2377 cardSTATE_TO_IDLE();
51969283 2378 break;
8f51ddb0 2379 }
8f51ddb0 2380 break;
50193c1e 2381 }
0014cb46
M
2382
2383 case MFEMUL_INTREG_INC:{
2384 mf_crypto1_decrypt(pcs, receivedCmd, len);
2385 memcpy(&ans, receivedCmd, 4);
2386 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2387 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2388 cardSTATE_TO_IDLE();
2389 break;
2390 }
2391 cardINTREG = cardINTREG + ans;
2392 cardSTATE = MFEMUL_WORK;
2393 break;
2394 }
2395 case MFEMUL_INTREG_DEC:{
2396 mf_crypto1_decrypt(pcs, receivedCmd, len);
2397 memcpy(&ans, receivedCmd, 4);
2398 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2399 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2400 cardSTATE_TO_IDLE();
2401 break;
2402 }
2403 cardINTREG = cardINTREG - ans;
2404 cardSTATE = MFEMUL_WORK;
2405 break;
2406 }
2407 case MFEMUL_INTREG_REST:{
2408 mf_crypto1_decrypt(pcs, receivedCmd, len);
2409 memcpy(&ans, receivedCmd, 4);
2410 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2411 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2412 cardSTATE_TO_IDLE();
2413 break;
2414 }
2415 cardSTATE = MFEMUL_WORK;
2416 break;
2417 }
50193c1e 2418 }
50193c1e
M
2419 }
2420
9ca155ba
M
2421 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2422 LEDsoff();
2423
0a39986e 2424 // add trace trailer
8f51ddb0 2425 memset(rAUTH_NT, 0x44, 4);
0a39986e
M
2426 LogTrace(rAUTH_NT, 4, 0, 0, TRUE);
2427
0014cb46 2428 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
15c4dc5a 2429}
b62a5a84
M
2430
2431//-----------------------------------------------------------------------------
2432// MIFARE sniffer.
2433//
2434//-----------------------------------------------------------------------------
5cd9ec01
M
2435void RAMFUNC SniffMifare(uint8_t param) {
2436 // param:
2437 // bit 0 - trigger from first card answer
2438 // bit 1 - trigger from first reader 7-bit request
39864b0b
M
2439
2440 // C(red) A(yellow) B(green)
b62a5a84
M
2441 LEDsoff();
2442 // init trace buffer
d19929cb 2443 iso14a_clear_trace();
b62a5a84 2444
b62a5a84
M
2445 // The command (reader -> tag) that we're receiving.
2446 // The length of a received command will in most cases be no more than 18 bytes.
2447 // So 32 should be enough!
2448 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2449 // The response (tag -> reader) that we're receiving.
2450 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
2451
2452 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2453 // into trace, along with its length and other annotations.
2454 //uint8_t *trace = (uint8_t *)BigBuf;
2455
2456 // The DMA buffer, used to stream samples from the FPGA
2457 int8_t *dmaBuf = ((int8_t *)BigBuf) + DMA_BUFFER_OFFSET;
5cd9ec01
M
2458 int8_t *data = dmaBuf;
2459 int maxDataLen = 0;
2460 int dataLen = 0;
b62a5a84
M
2461
2462 // Set up the demodulator for tag -> reader responses.
2463 Demod.output = receivedResponse;
2464 Demod.len = 0;
2465 Demod.state = DEMOD_UNSYNCD;
2466
2467 // Set up the demodulator for the reader -> tag commands
2468 memset(&Uart, 0, sizeof(Uart));
2469 Uart.output = receivedCmd;
2470 Uart.byteCntMax = 32; // was 100 (greg)//////////////////
2471 Uart.state = STATE_UNSYNCD;
2472
2473 // Setup for the DMA.
2474 FpgaSetupSsc();
b62a5a84
M
2475 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
2476
2477 // And put the FPGA in the appropriate mode
2478 // Signal field is off with the appropriate LED
2479 LED_D_OFF();
2480 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
2481 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
39864b0b
M
2482
2483 // init sniffer
2484 MfSniffInit();
2485 int sniffCounter = 0;
b62a5a84 2486
b62a5a84
M
2487 // And now we loop, receiving samples.
2488 while(true) {
5cd9ec01
M
2489 if(BUTTON_PRESS()) {
2490 DbpString("cancelled by button");
2491 goto done;
2492 }
2493
b62a5a84
M
2494 LED_A_ON();
2495 WDT_HIT();
39864b0b
M
2496
2497 if (++sniffCounter > 65) {
2498 if (MfSniffSend(2000)) {
55acbb2a 2499 FpgaEnableSscDma();
39864b0b
M
2500 }
2501 sniffCounter = 0;
2502 }
5cd9ec01
M
2503
2504 int register readBufDataP = data - dmaBuf;
2505 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
2506 if (readBufDataP <= dmaBufDataP){
2507 dataLen = dmaBufDataP - readBufDataP;
2508 } else {
2509 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP + 1;
2510 }
2511 // test for length of buffer
2512 if(dataLen > maxDataLen) {
2513 maxDataLen = dataLen;
2514 if(dataLen > 400) {
2515 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
b62a5a84
M
2516 goto done;
2517 }
2518 }
5cd9ec01 2519 if(dataLen < 1) continue;
b62a5a84 2520
5cd9ec01
M
2521 // primary buffer was stopped( <-- we lost data!
2522 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2523 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2524 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
55acbb2a 2525 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
2526 }
2527 // secondary buffer sets as primary, secondary buffer was stopped
2528 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2529 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
b62a5a84
M
2530 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2531 }
5cd9ec01
M
2532
2533 LED_A_OFF();
b62a5a84 2534
5cd9ec01 2535 if(MillerDecoding((data[0] & 0xF0) >> 4)) {
39864b0b 2536 LED_C_INV();
5cd9ec01 2537 // check - if there is a short 7bit request from reader
71d90e54 2538 if (MfSniffLogic(receivedCmd, Uart.byteCnt, Uart.parityBits, Uart.bitCnt, TRUE)) break;
5cd9ec01 2539
b62a5a84
M
2540 /* And ready to receive another command. */
2541 Uart.state = STATE_UNSYNCD;
39864b0b
M
2542
2543 /* And also reset the demod code */
b62a5a84 2544 Demod.state = DEMOD_UNSYNCD;
b62a5a84
M
2545 }
2546
5cd9ec01 2547 if(ManchesterDecoding(data[0] & 0x0F)) {
39864b0b 2548 LED_C_INV();
b62a5a84 2549
71d90e54 2550 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parityBits, Demod.bitCount, FALSE)) break;
b62a5a84
M
2551
2552 // And ready to receive another response.
2553 memset(&Demod, 0, sizeof(Demod));
2554 Demod.output = receivedResponse;
2555 Demod.state = DEMOD_UNSYNCD;
39864b0b
M
2556
2557 /* And also reset the uart code */
2558 Uart.state = STATE_UNSYNCD;
b62a5a84
M
2559 }
2560
5cd9ec01
M
2561 data++;
2562 if(data > dmaBuf + DMA_BUFFER_SIZE) {
2563 data = dmaBuf;
b62a5a84
M
2564 }
2565 } // main cycle
2566
2567 DbpString("COMMAND FINISHED");
2568
2569done:
55acbb2a 2570 FpgaDisableSscDma();
39864b0b
M
2571 MfSniffEnd();
2572
55acbb2a 2573 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.byteCnt=%x Uart.byteCntMax=%x", maxDataLen, Uart.state, Uart.byteCnt, Uart.byteCntMax);
b62a5a84
M
2574 LEDsoff();
2575}
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