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bd20f8f4 | 1 | //----------------------------------------------------------------------------- |
bd20f8f4 | 2 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, |
3 | // at your option, any later version. See the LICENSE.txt file for the text of | |
4 | // the license. | |
5 | //----------------------------------------------------------------------------- | |
d19929cb | 6 | // Hitag2 emulation (preliminary test version) |
bd20f8f4 | 7 | // |
d19929cb | 8 | // (c) 2009 Henryk Plötz <henryk@ploetzli.ch> |
9 | //----------------------------------------------------------------------------- | |
10 | // Hitag2 complete rewrite of the code | |
11 | // - Fixed modulation/encoding issues | |
12 | // - Rewrote code for transponder emulation | |
13 | // - Added snooping of transponder communication | |
14 | // - Added reader functionality | |
15 | // | |
16 | // (c) 2012 Roel Verdult | |
bd20f8f4 | 17 | //----------------------------------------------------------------------------- |
3742d905 | 18 | |
e30c654b | 19 | #include "proxmark3.h" |
3742d905 | 20 | #include "apps.h" |
f7e3ed82 | 21 | #include "util.h" |
3742d905 | 22 | #include "hitag2.h" |
9ab7a6c7 | 23 | #include "string.h" |
3742d905 | 24 | |
d19929cb | 25 | static bool bQuiet; |
26 | ||
27 | bool bCrypto; | |
bde10a50 | 28 | bool bAuthenticating; |
d19929cb | 29 | bool bPwd; |
ab4da50d | 30 | bool bSuccessful; |
3742d905 | 31 | |
47e18126 | 32 | int LogTraceHitag(const uint8_t * btBytes, int iBits, int iSamples, uint32_t dwParity, int bReader) |
33 | { | |
34 | // Return when trace is full | |
35 | if (traceLen >= TRACE_SIZE) return FALSE; | |
36 | ||
37 | // Trace the random, i'm curious | |
38 | rsamples += iSamples; | |
39 | trace[traceLen++] = ((rsamples >> 0) & 0xff); | |
40 | trace[traceLen++] = ((rsamples >> 8) & 0xff); | |
41 | trace[traceLen++] = ((rsamples >> 16) & 0xff); | |
42 | trace[traceLen++] = ((rsamples >> 24) & 0xff); | |
43 | if (!bReader) { | |
44 | trace[traceLen - 1] |= 0x80; | |
45 | } | |
46 | trace[traceLen++] = ((dwParity >> 0) & 0xff); | |
47 | trace[traceLen++] = ((dwParity >> 8) & 0xff); | |
48 | trace[traceLen++] = ((dwParity >> 16) & 0xff); | |
49 | trace[traceLen++] = ((dwParity >> 24) & 0xff); | |
50 | trace[traceLen++] = iBits; | |
51 | memcpy(trace + traceLen, btBytes, nbytes(iBits)); | |
52 | traceLen += nbytes(iBits); | |
53 | return TRUE; | |
54 | } | |
55 | ||
3742d905 | 56 | struct hitag2_tag { |
57 | uint32_t uid; | |
e30c654b | 58 | enum { |
d19929cb | 59 | TAG_STATE_RESET = 0x01, // Just powered up, awaiting GetSnr |
60 | TAG_STATE_ACTIVATING = 0x02 , // In activation phase (password mode), sent UID, awaiting reader password | |
61 | TAG_STATE_ACTIVATED = 0x03, // Activation complete, awaiting read/write commands | |
62 | TAG_STATE_WRITING = 0x04, // In write command, awaiting sector contents to be written | |
3742d905 | 63 | } state; |
64 | unsigned int active_sector; | |
d19929cb | 65 | byte_t crypto_active; |
66 | uint64_t cs; | |
67 | byte_t sectors[12][4]; | |
3742d905 | 68 | }; |
69 | ||
bde10a50 | 70 | static struct hitag2_tag tag = { |
d19929cb | 71 | .state = TAG_STATE_RESET, |
72 | .sectors = { // Password mode: | Crypto mode: | |
73 | [0] = { 0x02, 0x4e, 0x02, 0x20}, // UID | UID | |
74 | [1] = { 0x4d, 0x49, 0x4b, 0x52}, // Password RWD | 32 bit LSB key | |
75 | [2] = { 0x20, 0xf0, 0x4f, 0x4e}, // Reserved | 16 bit MSB key, 16 bit reserved | |
76 | [3] = { 0x0e, 0xaa, 0x48, 0x54}, // Configuration, password TAG | Configuration, password TAG | |
77 | [4] = { 0x46, 0x5f, 0x4f, 0x4b}, // Data: F_OK | |
78 | [5] = { 0x55, 0x55, 0x55, 0x55}, // Data: UUUU | |
79 | [6] = { 0xaa, 0xaa, 0xaa, 0xaa}, // Data: .... | |
80 | [7] = { 0x55, 0x55, 0x55, 0x55}, // Data: UUUU | |
81 | [8] = { 0x00, 0x00, 0x00, 0x00}, // RSK Low | |
82 | [9] = { 0x00, 0x00, 0x00, 0x00}, // RSK High | |
83 | [10] = { 0x00, 0x00, 0x00, 0x00}, // RCF | |
84 | [11] = { 0x00, 0x00, 0x00, 0x00}, // SYNC | |
85 | }, | |
3742d905 | 86 | }; |
87 | ||
d19929cb | 88 | //#define TRACE_LENGTH 3000 |
89 | //uint8_t *trace = (uint8_t *) BigBuf; | |
90 | //int traceLen = 0; | |
91 | //int rsamples = 0; | |
e30c654b | 92 | |
d19929cb | 93 | #define AUTH_TABLE_OFFSET FREE_BUFFER_OFFSET |
94 | #define AUTH_TABLE_LENGTH FREE_BUFFER_SIZE | |
95 | byte_t* auth_table = (byte_t *)BigBuf+AUTH_TABLE_OFFSET; | |
96 | size_t auth_table_pos = 0; | |
97 | size_t auth_table_len = AUTH_TABLE_LENGTH; | |
3742d905 | 98 | |
d19929cb | 99 | byte_t password[4]; |
100 | byte_t NrAr[8]; | |
bde10a50 | 101 | byte_t key[8]; |
102 | uint64_t cipher_state; | |
3742d905 | 103 | |
104 | /* Following is a modified version of cryptolib.com/ciphers/hitag2/ */ | |
105 | // Software optimized 48-bit Philips/NXP Mifare Hitag2 PCF7936/46/47/52 stream cipher algorithm by I.C. Wiener 2006-2007. | |
106 | // For educational purposes only. | |
107 | // No warranties or guarantees of any kind. | |
108 | // This code is released into the public domain by its author. | |
109 | ||
110 | // Basic macros: | |
111 | ||
112 | #define u8 uint8_t | |
113 | #define u32 uint32_t | |
114 | #define u64 uint64_t | |
115 | #define rev8(x) ((((x)>>7)&1)+((((x)>>6)&1)<<1)+((((x)>>5)&1)<<2)+((((x)>>4)&1)<<3)+((((x)>>3)&1)<<4)+((((x)>>2)&1)<<5)+((((x)>>1)&1)<<6)+(((x)&1)<<7)) | |
116 | #define rev16(x) (rev8 (x)+(rev8 (x>> 8)<< 8)) | |
117 | #define rev32(x) (rev16(x)+(rev16(x>>16)<<16)) | |
118 | #define rev64(x) (rev32(x)+(rev32(x>>32)<<32)) | |
119 | #define bit(x,n) (((x)>>(n))&1) | |
120 | #define bit32(x,n) ((((x)[(n)>>5])>>((n)))&1) | |
121 | #define inv32(x,i,n) ((x)[(i)>>5]^=((u32)(n))<<((i)&31)) | |
122 | #define rotl64(x, n) ((((u64)(x))<<((n)&63))+(((u64)(x))>>((0-(n))&63))) | |
123 | ||
124 | // Single bit Hitag2 functions: | |
125 | ||
126 | #define i4(x,a,b,c,d) ((u32)((((x)>>(a))&1)+(((x)>>(b))&1)*2+(((x)>>(c))&1)*4+(((x)>>(d))&1)*8)) | |
127 | ||
128 | static const u32 ht2_f4a = 0x2C79; // 0010 1100 0111 1001 | |
129 | static const u32 ht2_f4b = 0x6671; // 0110 0110 0111 0001 | |
130 | static const u32 ht2_f5c = 0x7907287B; // 0111 1001 0000 0111 0010 1000 0111 1011 | |
131 | ||
132 | static u32 _f20 (const u64 x) | |
133 | { | |
134 | u32 i5; | |
e30c654b | 135 | |
3742d905 | 136 | i5 = ((ht2_f4a >> i4 (x, 1, 2, 4, 5)) & 1)* 1 |
137 | + ((ht2_f4b >> i4 (x, 7,11,13,14)) & 1)* 2 | |
138 | + ((ht2_f4b >> i4 (x,16,20,22,25)) & 1)* 4 | |
139 | + ((ht2_f4b >> i4 (x,27,28,30,32)) & 1)* 8 | |
140 | + ((ht2_f4a >> i4 (x,33,42,43,45)) & 1)*16; | |
e30c654b | 141 | |
3742d905 | 142 | return (ht2_f5c >> i5) & 1; |
143 | } | |
144 | ||
145 | static u64 _hitag2_init (const u64 key, const u32 serial, const u32 IV) | |
146 | { | |
147 | u32 i; | |
148 | u64 x = ((key & 0xFFFF) << 32) + serial; | |
e30c654b | 149 | |
3742d905 | 150 | for (i = 0; i < 32; i++) |
151 | { | |
152 | x >>= 1; | |
153 | x += (u64) (_f20 (x) ^ (((IV >> i) ^ (key >> (i+16))) & 1)) << 47; | |
154 | } | |
155 | return x; | |
156 | } | |
157 | ||
158 | static u64 _hitag2_round (u64 *state) | |
159 | { | |
160 | u64 x = *state; | |
e30c654b | 161 | |
3742d905 | 162 | x = (x >> 1) + |
163 | ((((x >> 0) ^ (x >> 2) ^ (x >> 3) ^ (x >> 6) | |
164 | ^ (x >> 7) ^ (x >> 8) ^ (x >> 16) ^ (x >> 22) | |
165 | ^ (x >> 23) ^ (x >> 26) ^ (x >> 30) ^ (x >> 41) | |
166 | ^ (x >> 42) ^ (x >> 43) ^ (x >> 46) ^ (x >> 47)) & 1) << 47); | |
e30c654b | 167 | |
3742d905 | 168 | *state = x; |
169 | return _f20 (x); | |
170 | } | |
171 | ||
3742d905 | 172 | static u32 _hitag2_byte (u64 * x) |
173 | { | |
174 | u32 i, c; | |
e30c654b | 175 | |
3742d905 | 176 | for (i = 0, c = 0; i < 8; i++) c += (u32) _hitag2_round (x) << (i^7); |
177 | return c; | |
178 | } | |
179 | ||
d19929cb | 180 | int hitag2_reset(void) |
181 | { | |
182 | tag.state = TAG_STATE_RESET; | |
183 | tag.crypto_active = 0; | |
184 | return 0; | |
185 | } | |
3742d905 | 186 | |
d19929cb | 187 | int hitag2_init(void) |
188 | { | |
bde10a50 | 189 | // memcpy(&tag, &resetdata, sizeof(tag)); |
d19929cb | 190 | hitag2_reset(); |
191 | return 0; | |
192 | } | |
3742d905 | 193 | |
d19929cb | 194 | static void hitag2_cipher_reset(struct hitag2_tag *tag, const byte_t *iv) |
3742d905 | 195 | { |
bde10a50 | 196 | uint64_t key = ((uint64_t)tag->sectors[2][2]) | |
197 | ((uint64_t)tag->sectors[2][3] << 8) | | |
198 | ((uint64_t)tag->sectors[1][0] << 16) | | |
199 | ((uint64_t)tag->sectors[1][1] << 24) | | |
200 | ((uint64_t)tag->sectors[1][2] << 32) | | |
201 | ((uint64_t)tag->sectors[1][3] << 40); | |
202 | uint32_t uid = ((uint32_t)tag->sectors[0][0]) | | |
203 | ((uint32_t)tag->sectors[0][1] << 8) | | |
204 | ((uint32_t)tag->sectors[0][2] << 16) | | |
205 | ((uint32_t)tag->sectors[0][3] << 24); | |
3742d905 | 206 | uint32_t iv_ = (((uint32_t)(iv[0]))) | |
207 | (((uint32_t)(iv[1])) << 8) | | |
208 | (((uint32_t)(iv[2])) << 16) | | |
209 | (((uint32_t)(iv[3])) << 24); | |
d19929cb | 210 | tag->cs = _hitag2_init(rev64(key), rev32(uid), rev32(iv_)); |
3742d905 | 211 | } |
212 | ||
d19929cb | 213 | static int hitag2_cipher_authenticate(uint64_t* cs, const byte_t *authenticator_is) |
3742d905 | 214 | { |
d19929cb | 215 | byte_t authenticator_should[4]; |
216 | authenticator_should[0] = ~_hitag2_byte(cs); | |
217 | authenticator_should[1] = ~_hitag2_byte(cs); | |
218 | authenticator_should[2] = ~_hitag2_byte(cs); | |
219 | authenticator_should[3] = ~_hitag2_byte(cs); | |
220 | return (memcmp(authenticator_should, authenticator_is, 4) == 0); | |
3742d905 | 221 | } |
222 | ||
d19929cb | 223 | static int hitag2_cipher_transcrypt(uint64_t* cs, byte_t *data, unsigned int bytes, unsigned int bits) |
3742d905 | 224 | { |
225 | int i; | |
d19929cb | 226 | for(i=0; i<bytes; i++) data[i] ^= _hitag2_byte(cs); |
227 | for(i=0; i<bits; i++) data[bytes] ^= _hitag2_round(cs) << (7-i); | |
3742d905 | 228 | return 0; |
229 | } | |
d19929cb | 230 | |
231 | // Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK) | |
232 | // TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz | |
233 | // Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier) | |
234 | // T0 = TIMER_CLOCK1 / 125000 = 192 | |
235 | #define T0 192 | |
236 | ||
237 | #define SHORT_COIL() LOW(GPIO_SSC_DOUT) | |
238 | #define OPEN_COIL() HIGH(GPIO_SSC_DOUT) | |
239 | ||
240 | #define HITAG_FRAME_LEN 20 | |
241 | #define HITAG_T_STOP 36 /* T_EOF should be > 36 */ | |
242 | #define HITAG_T_LOW 8 /* T_LOW should be 4..10 */ | |
243 | #define HITAG_T_0_MIN 15 /* T[0] should be 18..22 */ | |
244 | #define HITAG_T_1_MIN 25 /* T[1] should be 26..30 */ | |
245 | //#define HITAG_T_EOF 40 /* T_EOF should be > 36 */ | |
246 | #define HITAG_T_EOF 80 /* T_EOF should be > 36 */ | |
247 | #define HITAG_T_WAIT_1 200 /* T_wresp should be 199..206 */ | |
248 | #define HITAG_T_WAIT_2 90 /* T_wresp should be 199..206 */ | |
249 | #define HITAG_T_WAIT_MAX 300 /* bit more than HITAG_T_WAIT_1 + HITAG_T_WAIT_2 */ | |
250 | ||
251 | #define HITAG_T_TAG_ONE_HALF_PERIOD 10 | |
252 | #define HITAG_T_TAG_TWO_HALF_PERIOD 25 | |
253 | #define HITAG_T_TAG_THREE_HALF_PERIOD 41 | |
254 | #define HITAG_T_TAG_FOUR_HALF_PERIOD 57 | |
255 | ||
256 | #define HITAG_T_TAG_HALF_PERIOD 16 | |
257 | #define HITAG_T_TAG_FULL_PERIOD 32 | |
258 | ||
259 | #define HITAG_T_TAG_CAPTURE_ONE_HALF 13 | |
260 | #define HITAG_T_TAG_CAPTURE_TWO_HALF 25 | |
261 | #define HITAG_T_TAG_CAPTURE_THREE_HALF 41 | |
262 | #define HITAG_T_TAG_CAPTURE_FOUR_HALF 57 | |
263 | ||
264 | ||
265 | static void hitag_send_bit(int bit) { | |
266 | LED_A_ON(); | |
267 | // Reset clock for the next bit | |
268 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG; | |
269 | ||
270 | // Fixed modulation, earlier proxmark version used inverted signal | |
271 | if(bit == 0) { | |
272 | // Manchester: Unloaded, then loaded |__--| | |
273 | LOW(GPIO_SSC_DOUT); | |
274 | while(AT91C_BASE_TC0->TC_CV < T0*HITAG_T_TAG_HALF_PERIOD); | |
275 | HIGH(GPIO_SSC_DOUT); | |
276 | while(AT91C_BASE_TC0->TC_CV < T0*HITAG_T_TAG_FULL_PERIOD); | |
277 | } else { | |
278 | // Manchester: Loaded, then unloaded |--__| | |
279 | HIGH(GPIO_SSC_DOUT); | |
280 | while(AT91C_BASE_TC0->TC_CV < T0*HITAG_T_TAG_HALF_PERIOD); | |
281 | LOW(GPIO_SSC_DOUT); | |
282 | while(AT91C_BASE_TC0->TC_CV < T0*HITAG_T_TAG_FULL_PERIOD); | |
283 | } | |
284 | LED_A_OFF(); | |
285 | } | |
286 | ||
287 | static void hitag_send_frame(const byte_t* frame, size_t frame_len) | |
288 | { | |
289 | // Send start of frame | |
290 | for(size_t i=0; i<5; i++) { | |
291 | hitag_send_bit(1); | |
292 | } | |
293 | ||
294 | // Send the content of the frame | |
295 | for(size_t i=0; i<frame_len; i++) { | |
296 | hitag_send_bit((frame[i/8] >> (7-(i%8)))&1); | |
297 | } | |
298 | ||
299 | // Drop the modulation | |
300 | LOW(GPIO_SSC_DOUT); | |
301 | } | |
302 | ||
303 | void hitag2_handle_reader_command(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) | |
304 | { | |
305 | byte_t rx_air[HITAG_FRAME_LEN]; | |
306 | ||
307 | // Copy the (original) received frame how it is send over the air | |
308 | memcpy(rx_air,rx,nbytes(rxlen)); | |
309 | ||
310 | if(tag.crypto_active) { | |
311 | hitag2_cipher_transcrypt(&(tag.cs),rx,rxlen/8,rxlen%8); | |
312 | } | |
313 | ||
314 | // Reset the transmission frame length | |
315 | *txlen = 0; | |
316 | ||
317 | // Try to find out which command was send by selecting on length (in bits) | |
318 | switch (rxlen) { | |
319 | // Received 11000 from the reader, request for UID, send UID | |
320 | case 05: { | |
321 | // Always send over the air in the clear plaintext mode | |
322 | if(rx_air[0] != 0xC0) { | |
323 | // Unknown frame ? | |
324 | return; | |
325 | } | |
326 | *txlen = 32; | |
327 | memcpy(tx,tag.sectors[0],4); | |
328 | tag.crypto_active = 0; | |
329 | } | |
330 | break; | |
331 | ||
332 | // Read/Write command: ..xx x..y yy with yyy == ~xxx, xxx is sector number | |
333 | case 10: { | |
334 | unsigned int sector = (~( ((rx[0]<<2)&0x04) | ((rx[1]>>6)&0x03) ) & 0x07); | |
335 | // Verify complement of sector index | |
336 | if(sector != ((rx[0]>>3)&0x07)) { | |
337 | //DbpString("Transmission error (read/write)"); | |
338 | return; | |
339 | } | |
340 | ||
341 | switch (rx[0] & 0xC6) { | |
342 | // Read command: 11xx x00y | |
343 | case 0xC0: | |
344 | memcpy(tx,tag.sectors[sector],4); | |
345 | *txlen = 32; | |
346 | break; | |
347 | ||
348 | // Inverted Read command: 01xx x10y | |
349 | case 0x44: | |
350 | for (size_t i=0; i<4; i++) { | |
351 | tx[i] = tag.sectors[sector][i] ^ 0xff; | |
352 | } | |
353 | *txlen = 32; | |
354 | break; | |
355 | ||
356 | // Write command: 10xx x01y | |
357 | case 0x82: | |
358 | // Prepare write, acknowledge by repeating command | |
359 | memcpy(tx,rx,nbytes(rxlen)); | |
360 | *txlen = rxlen; | |
361 | tag.active_sector = sector; | |
362 | tag.state=TAG_STATE_WRITING; | |
363 | break; | |
364 | ||
365 | // Unknown command | |
366 | default: | |
367 | Dbprintf("Uknown command: %02x %02x",rx[0],rx[1]); | |
368 | return; | |
369 | break; | |
370 | } | |
371 | } | |
372 | break; | |
373 | ||
374 | // Writing data or Reader password | |
375 | case 32: { | |
376 | if(tag.state == TAG_STATE_WRITING) { | |
377 | // These are the sector contents to be written. We don't have to do anything else. | |
378 | memcpy(tag.sectors[tag.active_sector],rx,nbytes(rxlen)); | |
379 | tag.state=TAG_STATE_RESET; | |
380 | return; | |
381 | } else { | |
382 | // Received RWD password, respond with configuration and our password | |
383 | if(memcmp(rx,tag.sectors[1],4) != 0) { | |
384 | DbpString("Reader password is wrong"); | |
385 | return; | |
386 | } | |
387 | *txlen = 32; | |
388 | memcpy(tx,tag.sectors[3],4); | |
389 | } | |
390 | } | |
391 | break; | |
392 | ||
393 | // Received RWD authentication challenge and respnse | |
394 | case 64: { | |
395 | // Store the authentication attempt | |
396 | if (auth_table_len < (AUTH_TABLE_LENGTH-8)) { | |
397 | memcpy(auth_table+auth_table_len,rx,8); | |
398 | auth_table_len += 8; | |
399 | } | |
400 | ||
401 | // Reset the cipher state | |
402 | hitag2_cipher_reset(&tag,rx); | |
403 | // Check if the authentication was correct | |
404 | if(!hitag2_cipher_authenticate(&(tag.cs),rx+4)) { | |
405 | // The reader failed to authenticate, do nothing | |
406 | Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x Failed!",rx[0],rx[1],rx[2],rx[3],rx[4],rx[5],rx[6],rx[7]); | |
407 | return; | |
408 | } | |
409 | // Succesful, but commented out reporting back to the Host, this may delay to much. | |
410 | // Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x OK!",rx[0],rx[1],rx[2],rx[3],rx[4],rx[5],rx[6],rx[7]); | |
411 | ||
412 | // Activate encryption algorithm for all further communication | |
413 | tag.crypto_active = 1; | |
414 | ||
415 | // Use the tag password as response | |
416 | memcpy(tx,tag.sectors[3],4); | |
417 | *txlen = 32; | |
418 | } | |
419 | break; | |
420 | } | |
421 | ||
47e18126 | 422 | // LogTraceHitag(rx,rxlen,0,0,false); |
423 | // LogTraceHitag(tx,*txlen,0,0,true); | |
d19929cb | 424 | |
425 | if(tag.crypto_active) { | |
426 | hitag2_cipher_transcrypt(&(tag.cs), tx, *txlen/8, *txlen%8); | |
427 | } | |
428 | } | |
429 | ||
430 | static void hitag_reader_send_bit(int bit) { | |
431 | LED_A_ON(); | |
432 | // Reset clock for the next bit | |
433 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG; | |
434 | ||
435 | // Binary puls length modulation (BPLM) is used to encode the data stream | |
436 | // This means that a transmission of a one takes longer than that of a zero | |
437 | ||
438 | // Enable modulation, which means, drop the the field | |
439 | HIGH(GPIO_SSC_DOUT); | |
440 | ||
441 | // Wait for 4-10 times the carrier period | |
442 | while(AT91C_BASE_TC0->TC_CV < T0*6); | |
443 | // SpinDelayUs(8*8); | |
444 | ||
445 | // Disable modulation, just activates the field again | |
446 | LOW(GPIO_SSC_DOUT); | |
447 | ||
448 | if(bit == 0) { | |
449 | // Zero bit: |_-| | |
450 | while(AT91C_BASE_TC0->TC_CV < T0*22); | |
451 | // SpinDelayUs(16*8); | |
452 | } else { | |
453 | // One bit: |_--| | |
454 | while(AT91C_BASE_TC0->TC_CV < T0*28); | |
455 | // SpinDelayUs(22*8); | |
456 | } | |
457 | LED_A_OFF(); | |
458 | } | |
459 | ||
460 | static void hitag_reader_send_frame(const byte_t* frame, size_t frame_len) | |
461 | { | |
462 | // Send the content of the frame | |
463 | for(size_t i=0; i<frame_len; i++) { | |
464 | hitag_reader_send_bit((frame[i/8] >> (7-(i%8)))&1); | |
465 | } | |
466 | // Send EOF | |
467 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG; | |
468 | // Enable modulation, which means, drop the the field | |
469 | HIGH(GPIO_SSC_DOUT); | |
470 | // Wait for 4-10 times the carrier period | |
471 | while(AT91C_BASE_TC0->TC_CV < T0*6); | |
472 | // Disable modulation, just activates the field again | |
473 | LOW(GPIO_SSC_DOUT); | |
474 | } | |
475 | ||
ed7bd3a3 | 476 | size_t blocknr; |
477 | ||
d19929cb | 478 | bool hitag2_password(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) { |
479 | // Reset the transmission frame length | |
480 | *txlen = 0; | |
481 | ||
482 | // Try to find out which command was send by selecting on length (in bits) | |
483 | switch (rxlen) { | |
484 | // No answer, try to resurrect | |
485 | case 0: { | |
486 | // Stop if there is no answer (after sending password) | |
487 | if (bPwd) { | |
488 | DbpString("Password failed!"); | |
489 | return false; | |
490 | } | |
491 | *txlen = 5; | |
492 | memcpy(tx,"\xc0",nbytes(*txlen)); | |
493 | } break; | |
494 | ||
495 | // Received UID, tag password | |
496 | case 32: { | |
497 | if (!bPwd) { | |
498 | *txlen = 32; | |
499 | memcpy(tx,password,4); | |
500 | bPwd = true; | |
ab4da50d | 501 | memcpy(tag.sectors[blocknr],rx,4); |
502 | blocknr++; | |
d19929cb | 503 | } else { |
219a334d | 504 | |
505 | if(blocknr == 1){ | |
506 | //store password in block1, the TAG answers with Block3, but we need the password in memory | |
507 | memcpy(tag.sectors[blocknr],tx,4); | |
508 | }else{ | |
509 | memcpy(tag.sectors[blocknr],rx,4); | |
510 | } | |
511 | ||
512 | blocknr++; | |
513 | if (blocknr > 7) { | |
514 | DbpString("Read succesful!"); | |
ab4da50d | 515 | bSuccessful = true; |
219a334d | 516 | return false; |
517 | } | |
518 | *txlen = 10; | |
519 | tx[0] = 0xc0 | (blocknr << 3) | ((blocknr^7) >> 2); | |
520 | tx[1] = ((blocknr^7) << 6); | |
d19929cb | 521 | } |
522 | } break; | |
523 | ||
524 | // Unexpected response | |
bde10a50 | 525 | default: { |
d19929cb | 526 | Dbprintf("Uknown frame length: %d",rxlen); |
527 | return false; | |
528 | } break; | |
529 | } | |
530 | return true; | |
531 | } | |
532 | ||
bde10a50 | 533 | bool hitag2_crypto(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) { |
534 | // Reset the transmission frame length | |
535 | *txlen = 0; | |
536 | ||
537 | if(bCrypto) { | |
538 | hitag2_cipher_transcrypt(&cipher_state,rx,rxlen/8,rxlen%8); | |
539 | } | |
540 | ||
541 | // Try to find out which command was send by selecting on length (in bits) | |
542 | switch (rxlen) { | |
543 | // No answer, try to resurrect | |
544 | case 0: { | |
545 | // Stop if there is no answer while we are in crypto mode (after sending NrAr) | |
546 | if (bCrypto) { | |
fc8c5cdd | 547 | // Failed during authentication |
548 | if (bAuthenticating) { | |
549 | DbpString("Authentication failed!"); | |
550 | return false; | |
551 | } else { | |
552 | // Failed reading a block, could be (read/write) locked, skip block and re-authenticate | |
553 | if (blocknr == 1) { | |
ab6bf11f | 554 | // Write the low part of the key in memory |
fc8c5cdd | 555 | memcpy(tag.sectors[1],key+2,4); |
556 | } else if (blocknr == 2) { | |
ab6bf11f | 557 | // Write the high part of the key in memory |
fc8c5cdd | 558 | tag.sectors[2][0] = 0x00; |
559 | tag.sectors[2][1] = 0x00; | |
560 | tag.sectors[2][2] = key[0]; | |
561 | tag.sectors[2][3] = key[1]; | |
ab6bf11f | 562 | } else { |
563 | // Just put zero's in the memory (of the unreadable block) | |
564 | memset(tag.sectors[blocknr],0x00,4); | |
fc8c5cdd | 565 | } |
566 | blocknr++; | |
567 | bCrypto = false; | |
568 | } | |
569 | } else { | |
570 | *txlen = 5; | |
571 | memcpy(tx,"\xc0",nbytes(*txlen)); | |
572 | } | |
bde10a50 | 573 | } break; |
574 | ||
575 | // Received UID, crypto tag answer | |
576 | case 32: { | |
577 | if (!bCrypto) { | |
578 | uint64_t ui64key = key[0] | ((uint64_t)key[1]) << 8 | ((uint64_t)key[2]) << 16 | ((uint64_t)key[3]) << 24 | ((uint64_t)key[4]) << 32 | ((uint64_t)key[5]) << 40; | |
579 | uint32_t ui32uid = rx[0] | ((uint32_t)rx[1]) << 8 | ((uint32_t)rx[2]) << 16 | ((uint32_t)rx[3]) << 24; | |
580 | cipher_state = _hitag2_init(rev64(ui64key), rev32(ui32uid), 0); | |
581 | memset(tx,0x00,4); | |
582 | memset(tx+4,0xff,4); | |
583 | hitag2_cipher_transcrypt(&cipher_state,tx+4,4,0); | |
584 | *txlen = 64; | |
585 | bCrypto = true; | |
586 | bAuthenticating = true; | |
587 | } else { | |
588 | // Check if we received answer tag (at) | |
589 | if (bAuthenticating) { | |
590 | bAuthenticating = false; | |
591 | } else { | |
592 | // Store the received block | |
593 | memcpy(tag.sectors[blocknr],rx,4); | |
594 | blocknr++; | |
595 | } | |
596 | if (blocknr > 7) { | |
597 | DbpString("Read succesful!"); | |
ab4da50d | 598 | bSuccessful = true; |
bde10a50 | 599 | return false; |
600 | } | |
601 | *txlen = 10; | |
602 | tx[0] = 0xc0 | (blocknr << 3) | ((blocknr^7) >> 2); | |
603 | tx[1] = ((blocknr^7) << 6); | |
604 | } | |
605 | } break; | |
606 | ||
607 | // Unexpected response | |
608 | default: { | |
609 | Dbprintf("Uknown frame length: %d",rxlen); | |
610 | return false; | |
611 | } break; | |
612 | } | |
613 | ||
614 | ||
615 | if(bCrypto) { | |
616 | // We have to return now to avoid double encryption | |
617 | if (!bAuthenticating) { | |
618 | hitag2_cipher_transcrypt(&cipher_state,tx,*txlen/8,*txlen%8); | |
619 | } | |
620 | } | |
621 | ||
622 | return true; | |
623 | } | |
624 | ||
625 | ||
d19929cb | 626 | bool hitag2_authenticate(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) { |
627 | // Reset the transmission frame length | |
628 | *txlen = 0; | |
629 | ||
630 | // Try to find out which command was send by selecting on length (in bits) | |
631 | switch (rxlen) { | |
632 | // No answer, try to resurrect | |
633 | case 0: { | |
634 | // Stop if there is no answer while we are in crypto mode (after sending NrAr) | |
635 | if (bCrypto) { | |
636 | DbpString("Authentication failed!"); | |
637 | return false; | |
638 | } | |
639 | *txlen = 5; | |
640 | memcpy(tx,"\xc0",nbytes(*txlen)); | |
641 | } break; | |
642 | ||
643 | // Received UID, crypto tag answer | |
644 | case 32: { | |
645 | if (!bCrypto) { | |
646 | *txlen = 64; | |
647 | memcpy(tx,NrAr,8); | |
648 | bCrypto = true; | |
649 | } else { | |
bde10a50 | 650 | DbpString("Authentication succesful!"); |
d19929cb | 651 | // We are done... for now |
652 | return false; | |
653 | } | |
654 | } break; | |
655 | ||
656 | // Unexpected response | |
657 | default: { | |
658 | Dbprintf("Uknown frame length: %d",rxlen); | |
659 | return false; | |
660 | } break; | |
661 | } | |
662 | ||
663 | return true; | |
664 | } | |
665 | ||
666 | bool hitag2_test_auth_attempts(byte_t* rx, const size_t rxlen, byte_t* tx, size_t* txlen) { | |
667 | // Reset the transmission frame length | |
668 | *txlen = 0; | |
669 | ||
670 | // Try to find out which command was send by selecting on length (in bits) | |
671 | switch (rxlen) { | |
672 | // No answer, try to resurrect | |
673 | case 0: { | |
674 | // Stop if there is no answer while we are in crypto mode (after sending NrAr) | |
675 | if (bCrypto) { | |
43751d2a | 676 | Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x Failed, removed entry!",NrAr[0],NrAr[1],NrAr[2],NrAr[3],NrAr[4],NrAr[5],NrAr[6],NrAr[7]); |
677 | ||
678 | // Removing failed entry from authentiations table | |
679 | memcpy(auth_table+auth_table_pos,auth_table+auth_table_pos+8,8); | |
680 | auth_table_len -= 8; | |
681 | ||
682 | // Return if we reached the end of the authentiactions table | |
d19929cb | 683 | bCrypto = false; |
43751d2a | 684 | if (auth_table_pos == auth_table_len) { |
d19929cb | 685 | return false; |
686 | } | |
43751d2a | 687 | |
688 | // Copy the next authentication attempt in row (at the same position, b/c we removed last failed entry) | |
d19929cb | 689 | memcpy(NrAr,auth_table+auth_table_pos,8); |
690 | } | |
691 | *txlen = 5; | |
692 | memcpy(tx,"\xc0",nbytes(*txlen)); | |
693 | } break; | |
694 | ||
695 | // Received UID, crypto tag answer, or read block response | |
696 | case 32: { | |
697 | if (!bCrypto) { | |
698 | *txlen = 64; | |
699 | memcpy(tx,NrAr,8); | |
700 | bCrypto = true; | |
701 | } else { | |
702 | Dbprintf("auth: %02x%02x%02x%02x%02x%02x%02x%02x OK",NrAr[0],NrAr[1],NrAr[2],NrAr[3],NrAr[4],NrAr[5],NrAr[6],NrAr[7]); | |
703 | bCrypto = false; | |
704 | if ((auth_table_pos+8) == auth_table_len) { | |
705 | return false; | |
706 | } | |
707 | auth_table_pos += 8; | |
708 | memcpy(NrAr,auth_table+auth_table_pos,8); | |
709 | } | |
710 | } break; | |
711 | ||
712 | default: { | |
713 | Dbprintf("Uknown frame length: %d",rxlen); | |
714 | return false; | |
715 | } break; | |
716 | } | |
717 | ||
718 | return true; | |
719 | } | |
720 | ||
721 | void SnoopHitag(uint32_t type) { | |
722 | int frame_count; | |
723 | int response; | |
724 | int overflow; | |
725 | bool rising_edge; | |
726 | bool reader_frame; | |
727 | int lastbit; | |
728 | bool bSkip; | |
729 | int tag_sof; | |
730 | byte_t rx[HITAG_FRAME_LEN]; | |
731 | size_t rxlen=0; | |
732 | ||
733 | // Clean up trace and prepare it for storing frames | |
ed7bd3a3 | 734 | iso14a_set_tracing(TRUE); |
735 | iso14a_clear_trace(); | |
d19929cb | 736 | |
737 | auth_table_len = 0; | |
738 | auth_table_pos = 0; | |
739 | memset(auth_table, 0x00, AUTH_TABLE_LENGTH); | |
740 | ||
741 | DbpString("Starting Hitag2 snoop"); | |
742 | LED_D_ON(); | |
743 | ||
744 | // Set up eavesdropping mode, frequency divisor which will drive the FPGA | |
745 | // and analog mux selection. | |
7cc204bf | 746 | FpgaDownloadAndGo(FPGA_BITSTREAM_LF); |
d19929cb | 747 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT); |
748 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz | |
749 | SetAdcMuxFor(GPIO_MUXSEL_LOPKD); | |
750 | RELAY_OFF(); | |
751 | ||
752 | // Configure output pin that is connected to the FPGA (for modulating) | |
753 | AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; | |
754 | AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; | |
755 | ||
756 | // Disable modulation, we are going to eavesdrop, not modulate ;) | |
757 | LOW(GPIO_SSC_DOUT); | |
758 | ||
759 | // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the reader frames | |
760 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1); | |
761 | AT91C_BASE_PIOA->PIO_BSR = GPIO_SSC_FRAME; | |
762 | ||
763 | // Disable timer during configuration | |
764 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
765 | ||
766 | // Capture mode, defaul timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger, | |
767 | // external trigger rising edge, load RA on rising edge of TIOA. | |
768 | uint32_t t1_channel_mode = AT91C_TC_CLKS_TIMER_DIV1_CLOCK | AT91C_TC_ETRGEDG_BOTH | AT91C_TC_ABETRG | AT91C_TC_LDRA_BOTH; | |
769 | AT91C_BASE_TC1->TC_CMR = t1_channel_mode; | |
770 | ||
771 | // Enable and reset counter | |
772 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
773 | ||
774 | // Reset the received frame, frame count and timing info | |
775 | memset(rx,0x00,sizeof(rx)); | |
776 | frame_count = 0; | |
777 | response = 0; | |
778 | overflow = 0; | |
779 | reader_frame = false; | |
780 | lastbit = 1; | |
781 | bSkip = true; | |
782 | tag_sof = 4; | |
783 | ||
784 | while(!BUTTON_PRESS()) { | |
785 | // Watchdog hit | |
786 | WDT_HIT(); | |
787 | ||
788 | // Receive frame, watch for at most T0*EOF periods | |
789 | while (AT91C_BASE_TC1->TC_CV < T0*HITAG_T_EOF) { | |
790 | // Check if rising edge in modulation is detected | |
791 | if(AT91C_BASE_TC1->TC_SR & AT91C_TC_LDRAS) { | |
792 | // Retrieve the new timing values | |
793 | int ra = (AT91C_BASE_TC1->TC_RA/T0); | |
794 | ||
795 | // Find out if we are dealing with a rising or falling edge | |
796 | rising_edge = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_FRAME) > 0; | |
797 | ||
798 | // Shorter periods will only happen with reader frames | |
799 | if (!reader_frame && rising_edge && ra < HITAG_T_TAG_CAPTURE_ONE_HALF) { | |
800 | // Switch from tag to reader capture | |
801 | LED_C_OFF(); | |
802 | reader_frame = true; | |
803 | memset(rx,0x00,sizeof(rx)); | |
804 | rxlen = 0; | |
805 | } | |
806 | ||
807 | // Only handle if reader frame and rising edge, or tag frame and falling edge | |
808 | if (reader_frame != rising_edge) { | |
809 | overflow += ra; | |
810 | continue; | |
811 | } | |
812 | ||
813 | // Add the buffered timing values of earlier captured edges which were skipped | |
814 | ra += overflow; | |
815 | overflow = 0; | |
816 | ||
817 | if (reader_frame) { | |
818 | LED_B_ON(); | |
819 | // Capture reader frame | |
820 | if(ra >= HITAG_T_STOP) { | |
821 | if (rxlen != 0) { | |
822 | //DbpString("wierd0?"); | |
823 | } | |
824 | // Capture the T0 periods that have passed since last communication or field drop (reset) | |
825 | response = (ra - HITAG_T_LOW); | |
826 | } else if(ra >= HITAG_T_1_MIN ) { | |
827 | // '1' bit | |
828 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
829 | rxlen++; | |
830 | } else if(ra >= HITAG_T_0_MIN) { | |
831 | // '0' bit | |
832 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
833 | rxlen++; | |
834 | } else { | |
835 | // Ignore wierd value, is to small to mean anything | |
836 | } | |
837 | } else { | |
838 | LED_C_ON(); | |
839 | // Capture tag frame (manchester decoding using only falling edges) | |
840 | if(ra >= HITAG_T_EOF) { | |
841 | if (rxlen != 0) { | |
842 | //DbpString("wierd1?"); | |
843 | } | |
844 | // Capture the T0 periods that have passed since last communication or field drop (reset) | |
845 | // We always recieve a 'one' first, which has the falling edge after a half period |-_| | |
846 | response = ra-HITAG_T_TAG_HALF_PERIOD; | |
847 | } else if(ra >= HITAG_T_TAG_CAPTURE_FOUR_HALF) { | |
848 | // Manchester coding example |-_|_-|-_| (101) | |
849 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
850 | rxlen++; | |
851 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
852 | rxlen++; | |
853 | } else if(ra >= HITAG_T_TAG_CAPTURE_THREE_HALF) { | |
854 | // Manchester coding example |_-|...|_-|-_| (0...01) | |
855 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
856 | rxlen++; | |
857 | // We have to skip this half period at start and add the 'one' the second time | |
858 | if (!bSkip) { | |
859 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
860 | rxlen++; | |
861 | } | |
862 | lastbit = !lastbit; | |
863 | bSkip = !bSkip; | |
864 | } else if(ra >= HITAG_T_TAG_CAPTURE_TWO_HALF) { | |
865 | // Manchester coding example |_-|_-| (00) or |-_|-_| (11) | |
866 | if (tag_sof) { | |
867 | // Ignore bits that are transmitted during SOF | |
868 | tag_sof--; | |
869 | } else { | |
870 | // bit is same as last bit | |
871 | rx[rxlen / 8] |= lastbit << (7-(rxlen%8)); | |
872 | rxlen++; | |
873 | } | |
874 | } else { | |
875 | // Ignore wierd value, is to small to mean anything | |
876 | } | |
877 | } | |
878 | } | |
879 | } | |
880 | ||
881 | // Check if frame was captured | |
882 | if(rxlen > 0) { | |
883 | frame_count++; | |
47e18126 | 884 | if (!LogTraceHitag(rx,rxlen,response,0,reader_frame)) { |
d19929cb | 885 | DbpString("Trace full"); |
886 | break; | |
887 | } | |
888 | ||
889 | // Check if we recognize a valid authentication attempt | |
890 | if (nbytes(rxlen) == 8) { | |
891 | // Store the authentication attempt | |
892 | if (auth_table_len < (AUTH_TABLE_LENGTH-8)) { | |
893 | memcpy(auth_table+auth_table_len,rx,8); | |
894 | auth_table_len += 8; | |
895 | } | |
896 | } | |
897 | ||
898 | // Reset the received frame and response timing info | |
899 | memset(rx,0x00,sizeof(rx)); | |
900 | response = 0; | |
901 | reader_frame = false; | |
902 | lastbit = 1; | |
903 | bSkip = true; | |
904 | tag_sof = 4; | |
905 | overflow = 0; | |
906 | ||
907 | LED_B_OFF(); | |
908 | LED_C_OFF(); | |
909 | } else { | |
910 | // Save the timer overflow, will be 0 when frame was received | |
911 | overflow += (AT91C_BASE_TC1->TC_CV/T0); | |
912 | } | |
913 | // Reset the frame length | |
914 | rxlen = 0; | |
915 | // Reset the timer to restart while-loop that receives frames | |
916 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_SWTRG; | |
917 | } | |
918 | LED_A_ON(); | |
919 | LED_B_OFF(); | |
920 | LED_C_OFF(); | |
921 | LED_D_OFF(); | |
922 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
923 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; | |
924 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
925 | LED_A_OFF(); | |
926 | ||
927 | // Dbprintf("frame received: %d",frame_count); | |
928 | // Dbprintf("Authentication Attempts: %d",(auth_table_len/8)); | |
929 | // DbpString("All done"); | |
930 | } | |
931 | ||
932 | void SimulateHitagTag(bool tag_mem_supplied, byte_t* data) { | |
933 | int frame_count; | |
934 | int response; | |
935 | int overflow; | |
936 | byte_t rx[HITAG_FRAME_LEN]; | |
937 | size_t rxlen=0; | |
938 | byte_t tx[HITAG_FRAME_LEN]; | |
939 | size_t txlen=0; | |
940 | bool bQuitTraceFull = false; | |
941 | bQuiet = false; | |
942 | ||
943 | // Clean up trace and prepare it for storing frames | |
bde10a50 | 944 | iso14a_set_tracing(TRUE); |
945 | iso14a_clear_trace(); | |
d19929cb | 946 | auth_table_len = 0; |
947 | auth_table_pos = 0; | |
948 | memset(auth_table, 0x00, AUTH_TABLE_LENGTH); | |
949 | ||
950 | DbpString("Starting Hitag2 simulation"); | |
951 | LED_D_ON(); | |
952 | hitag2_init(); | |
953 | ||
954 | if (tag_mem_supplied) { | |
955 | DbpString("Loading hitag2 memory..."); | |
956 | memcpy((byte_t*)tag.sectors,data,48); | |
957 | } | |
958 | ||
959 | uint32_t block = 0; | |
960 | for (size_t i=0; i<12; i++) { | |
961 | for (size_t j=0; j<4; j++) { | |
962 | block <<= 8; | |
963 | block |= tag.sectors[i][j]; | |
964 | } | |
965 | Dbprintf("| %d | %08x |",i,block); | |
966 | } | |
967 | ||
968 | // Set up simulator mode, frequency divisor which will drive the FPGA | |
969 | // and analog mux selection. | |
7cc204bf | 970 | FpgaDownloadAndGo(FPGA_BITSTREAM_LF); |
d19929cb | 971 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT); |
972 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz | |
973 | SetAdcMuxFor(GPIO_MUXSEL_LOPKD); | |
974 | RELAY_OFF(); | |
975 | ||
976 | // Configure output pin that is connected to the FPGA (for modulating) | |
977 | AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; | |
978 | AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; | |
979 | ||
980 | // Disable modulation at default, which means release resistance | |
981 | LOW(GPIO_SSC_DOUT); | |
982 | ||
983 | // Enable Peripheral Clock for TIMER_CLOCK0, used to measure exact timing before answering | |
984 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0); | |
985 | ||
986 | // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the reader frames | |
987 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1); | |
988 | AT91C_BASE_PIOA->PIO_BSR = GPIO_SSC_FRAME; | |
989 | ||
990 | // Disable timer during configuration | |
991 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
992 | ||
3fe4ff4f | 993 | // Capture mode, default timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger, |
d19929cb | 994 | // external trigger rising edge, load RA on rising edge of TIOA. |
995 | AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK | AT91C_TC_ETRGEDG_RISING | AT91C_TC_ABETRG | AT91C_TC_LDRA_RISING; | |
996 | ||
d19929cb | 997 | // Reset the received frame, frame count and timing info |
998 | memset(rx,0x00,sizeof(rx)); | |
999 | frame_count = 0; | |
1000 | response = 0; | |
1001 | overflow = 0; | |
3fe4ff4f | 1002 | |
1003 | // Enable and reset counter | |
1004 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
d19929cb | 1005 | |
1006 | while(!BUTTON_PRESS()) { | |
1007 | // Watchdog hit | |
1008 | WDT_HIT(); | |
1009 | ||
1010 | // Receive frame, watch for at most T0*EOF periods | |
1011 | while (AT91C_BASE_TC1->TC_CV < T0*HITAG_T_EOF) { | |
1012 | // Check if rising edge in modulation is detected | |
1013 | if(AT91C_BASE_TC1->TC_SR & AT91C_TC_LDRAS) { | |
1014 | // Retrieve the new timing values | |
1015 | int ra = (AT91C_BASE_TC1->TC_RA/T0) + overflow; | |
1016 | overflow = 0; | |
1017 | ||
1018 | // Reset timer every frame, we have to capture the last edge for timing | |
1019 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
1020 | ||
1021 | LED_B_ON(); | |
1022 | ||
1023 | // Capture reader frame | |
1024 | if(ra >= HITAG_T_STOP) { | |
1025 | if (rxlen != 0) { | |
1026 | //DbpString("wierd0?"); | |
1027 | } | |
1028 | // Capture the T0 periods that have passed since last communication or field drop (reset) | |
1029 | response = (ra - HITAG_T_LOW); | |
1030 | } else if(ra >= HITAG_T_1_MIN ) { | |
1031 | // '1' bit | |
1032 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
1033 | rxlen++; | |
1034 | } else if(ra >= HITAG_T_0_MIN) { | |
1035 | // '0' bit | |
1036 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
1037 | rxlen++; | |
1038 | } else { | |
1039 | // Ignore wierd value, is to small to mean anything | |
1040 | } | |
1041 | } | |
1042 | } | |
1043 | ||
1044 | // Check if frame was captured | |
1045 | if(rxlen > 4) { | |
1046 | frame_count++; | |
1047 | if (!bQuiet) { | |
47e18126 | 1048 | if (!LogTraceHitag(rx,rxlen,response,0,true)) { |
d19929cb | 1049 | DbpString("Trace full"); |
1050 | if (bQuitTraceFull) { | |
1051 | break; | |
1052 | } else { | |
1053 | bQuiet = true; | |
1054 | } | |
1055 | } | |
1056 | } | |
1057 | ||
1058 | // Disable timer 1 with external trigger to avoid triggers during our own modulation | |
1059 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1060 | ||
1061 | // Process the incoming frame (rx) and prepare the outgoing frame (tx) | |
1062 | hitag2_handle_reader_command(rx,rxlen,tx,&txlen); | |
1063 | ||
1064 | // Wait for HITAG_T_WAIT_1 carrier periods after the last reader bit, | |
1065 | // not that since the clock counts since the rising edge, but T_Wait1 is | |
1066 | // with respect to the falling edge, we need to wait actually (T_Wait1 - T_Low) | |
1067 | // periods. The gap time T_Low varies (4..10). All timer values are in | |
1068 | // terms of T0 units | |
1069 | while(AT91C_BASE_TC0->TC_CV < T0*(HITAG_T_WAIT_1-HITAG_T_LOW)); | |
1070 | ||
1071 | // Send and store the tag answer (if there is any) | |
1072 | if (txlen) { | |
1073 | // Transmit the tag frame | |
1074 | hitag_send_frame(tx,txlen); | |
1075 | // Store the frame in the trace | |
1076 | if (!bQuiet) { | |
47e18126 | 1077 | if (!LogTraceHitag(tx,txlen,0,0,false)) { |
d19929cb | 1078 | DbpString("Trace full"); |
1079 | if (bQuitTraceFull) { | |
1080 | break; | |
1081 | } else { | |
1082 | bQuiet = true; | |
1083 | } | |
1084 | } | |
1085 | } | |
1086 | } | |
1087 | ||
1088 | // Reset the received frame and response timing info | |
1089 | memset(rx,0x00,sizeof(rx)); | |
1090 | response = 0; | |
1091 | ||
1092 | // Enable and reset external trigger in timer for capturing future frames | |
1093 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
1094 | LED_B_OFF(); | |
1095 | } | |
1096 | // Reset the frame length | |
1097 | rxlen = 0; | |
1098 | // Save the timer overflow, will be 0 when frame was received | |
1099 | overflow += (AT91C_BASE_TC1->TC_CV/T0); | |
1100 | // Reset the timer to restart while-loop that receives frames | |
1101 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_SWTRG; | |
1102 | } | |
1103 | LED_B_OFF(); | |
1104 | LED_D_OFF(); | |
1105 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1106 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; | |
1107 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
3fe4ff4f | 1108 | |
1109 | DbpString("Sim Stopped"); | |
1110 | ||
d19929cb | 1111 | } |
1112 | ||
1113 | void ReaderHitag(hitag_function htf, hitag_data* htd) { | |
1114 | int frame_count; | |
1115 | int response; | |
1116 | byte_t rx[HITAG_FRAME_LEN]; | |
1117 | size_t rxlen=0; | |
1118 | byte_t txbuf[HITAG_FRAME_LEN]; | |
1119 | byte_t* tx = txbuf; | |
1120 | size_t txlen=0; | |
1121 | int lastbit; | |
1122 | bool bSkip; | |
1123 | int reset_sof; | |
1124 | int tag_sof; | |
1125 | int t_wait = HITAG_T_WAIT_MAX; | |
1126 | bool bStop; | |
1127 | bool bQuitTraceFull = false; | |
ab4da50d | 1128 | |
7cc204bf | 1129 | FpgaDownloadAndGo(FPGA_BITSTREAM_LF); |
ab4da50d | 1130 | // Reset the return status |
1131 | bSuccessful = false; | |
1132 | ||
d19929cb | 1133 | // Clean up trace and prepare it for storing frames |
bde10a50 | 1134 | iso14a_set_tracing(TRUE); |
1135 | iso14a_clear_trace(); | |
d19929cb | 1136 | DbpString("Starting Hitag reader family"); |
1137 | ||
1138 | // Check configuration | |
1139 | switch(htf) { | |
1140 | case RHT2F_PASSWORD: { | |
bde10a50 | 1141 | Dbprintf("List identifier in password mode"); |
d19929cb | 1142 | memcpy(password,htd->pwd.password,4); |
2ed270a8 | 1143 | blocknr = 0; |
d19929cb | 1144 | bQuitTraceFull = false; |
1145 | bQuiet = false; | |
1146 | bPwd = false; | |
1147 | } break; | |
bde10a50 | 1148 | |
d19929cb | 1149 | case RHT2F_AUTHENTICATE: { |
bde10a50 | 1150 | DbpString("Authenticating using nr,ar pair:"); |
d19929cb | 1151 | memcpy(NrAr,htd->auth.NrAr,8); |
d19929cb | 1152 | Dbhexdump(8,NrAr,false); |
1153 | bQuiet = false; | |
1154 | bCrypto = false; | |
bde10a50 | 1155 | bAuthenticating = false; |
1156 | bQuitTraceFull = true; | |
1157 | } break; | |
1158 | ||
1159 | case RHT2F_CRYPTO: { | |
1160 | DbpString("Authenticating using key:"); | |
3fe4ff4f | 1161 | memcpy(key,htd->crypto.key,4); //HACK; 4 or 6?? I read both in the code. |
bde10a50 | 1162 | Dbhexdump(6,key,false); |
1163 | blocknr = 0; | |
1164 | bQuiet = false; | |
1165 | bCrypto = false; | |
1166 | bAuthenticating = false; | |
d19929cb | 1167 | bQuitTraceFull = true; |
1168 | } break; | |
1169 | ||
1170 | case RHT2F_TEST_AUTH_ATTEMPTS: { | |
1171 | Dbprintf("Testing %d authentication attempts",(auth_table_len/8)); | |
1172 | auth_table_pos = 0; | |
1173 | memcpy(NrAr,auth_table,8); | |
1174 | bQuitTraceFull = false; | |
1175 | bQuiet = false; | |
1176 | bCrypto = false; | |
1177 | } break; | |
1178 | ||
1179 | default: { | |
1180 | Dbprintf("Error, unknown function: %d",htf); | |
1181 | return; | |
1182 | } break; | |
1183 | } | |
1184 | ||
1185 | LED_D_ON(); | |
1186 | hitag2_init(); | |
1187 | ||
1188 | // Configure output and enable pin that is connected to the FPGA (for modulating) | |
1189 | AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; | |
1190 | AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; | |
1191 | ||
1192 | // Set fpga in edge detect with reader field, we can modulate as reader now | |
1193 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD); | |
1194 | ||
1195 | // Set Frequency divisor which will drive the FPGA and analog mux selection | |
1196 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz | |
1197 | SetAdcMuxFor(GPIO_MUXSEL_LOPKD); | |
1198 | RELAY_OFF(); | |
1199 | ||
1200 | // Disable modulation at default, which means enable the field | |
1201 | LOW(GPIO_SSC_DOUT); | |
1202 | ||
1203 | // Give it a bit of time for the resonant antenna to settle. | |
1204 | SpinDelay(30); | |
1205 | ||
1206 | // Enable Peripheral Clock for TIMER_CLOCK0, used to measure exact timing before answering | |
1207 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0); | |
1208 | ||
1209 | // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the tag frames | |
1210 | AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1); | |
1211 | AT91C_BASE_PIOA->PIO_BSR = GPIO_SSC_FRAME; | |
1212 | ||
1213 | // Disable timer during configuration | |
1214 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1215 | ||
1216 | // Capture mode, defaul timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger, | |
1217 | // external trigger rising edge, load RA on falling edge of TIOA. | |
1218 | AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK | AT91C_TC_ETRGEDG_FALLING | AT91C_TC_ABETRG | AT91C_TC_LDRA_FALLING; | |
1219 | ||
1220 | // Enable and reset counters | |
1221 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
1222 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
1223 | ||
1224 | // Reset the received frame, frame count and timing info | |
1225 | frame_count = 0; | |
1226 | response = 0; | |
1227 | lastbit = 1; | |
1228 | bStop = false; | |
1229 | ||
ab4da50d | 1230 | // Tag specific configuration settings (sof, timings, etc.) |
1231 | if (htf < 10){ | |
1232 | // hitagS settings | |
1233 | reset_sof = 1; | |
1234 | t_wait = 200; | |
1235 | DbpString("Configured for hitagS reader"); | |
1236 | } else if (htf < 20) { | |
1237 | // hitag1 settings | |
1238 | reset_sof = 1; | |
1239 | t_wait = 200; | |
1240 | DbpString("Configured for hitag1 reader"); | |
1241 | } else if (htf < 30) { | |
1242 | // hitag2 settings | |
1243 | reset_sof = 4; | |
1244 | t_wait = HITAG_T_WAIT_2; | |
1245 | DbpString("Configured for hitag2 reader"); | |
d19929cb | 1246 | } else { |
ab4da50d | 1247 | Dbprintf("Error, unknown hitag reader type: %d",htf); |
1248 | return; | |
1249 | } | |
d19929cb | 1250 | |
1251 | while(!bStop && !BUTTON_PRESS()) { | |
1252 | // Watchdog hit | |
1253 | WDT_HIT(); | |
1254 | ||
1255 | // Check if frame was captured and store it | |
1256 | if(rxlen > 0) { | |
1257 | frame_count++; | |
1258 | if (!bQuiet) { | |
47e18126 | 1259 | if (!LogTraceHitag(rx,rxlen,response,0,false)) { |
d19929cb | 1260 | DbpString("Trace full"); |
1261 | if (bQuitTraceFull) { | |
1262 | break; | |
1263 | } else { | |
1264 | bQuiet = true; | |
1265 | } | |
1266 | } | |
1267 | } | |
1268 | } | |
1269 | ||
1270 | // By default reset the transmission buffer | |
1271 | tx = txbuf; | |
1272 | switch(htf) { | |
1273 | case RHT2F_PASSWORD: { | |
1274 | bStop = !hitag2_password(rx,rxlen,tx,&txlen); | |
1275 | } break; | |
1276 | case RHT2F_AUTHENTICATE: { | |
1277 | bStop = !hitag2_authenticate(rx,rxlen,tx,&txlen); | |
1278 | } break; | |
bde10a50 | 1279 | case RHT2F_CRYPTO: { |
1280 | bStop = !hitag2_crypto(rx,rxlen,tx,&txlen); | |
1281 | } break; | |
d19929cb | 1282 | case RHT2F_TEST_AUTH_ATTEMPTS: { |
1283 | bStop = !hitag2_test_auth_attempts(rx,rxlen,tx,&txlen); | |
1284 | } break; | |
1285 | default: { | |
1286 | Dbprintf("Error, unknown function: %d",htf); | |
1287 | return; | |
1288 | } break; | |
1289 | } | |
1290 | ||
1291 | // Send and store the reader command | |
1292 | // Disable timer 1 with external trigger to avoid triggers during our own modulation | |
1293 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1294 | ||
1295 | // Wait for HITAG_T_WAIT_2 carrier periods after the last tag bit before transmitting, | |
1296 | // Since the clock counts since the last falling edge, a 'one' means that the | |
1297 | // falling edge occured halfway the period. with respect to this falling edge, | |
1298 | // we need to wait (T_Wait2 + half_tag_period) when the last was a 'one'. | |
1299 | // All timer values are in terms of T0 units | |
1300 | while(AT91C_BASE_TC0->TC_CV < T0*(t_wait+(HITAG_T_TAG_HALF_PERIOD*lastbit))); | |
1301 | ||
1302 | // Transmit the reader frame | |
1303 | hitag_reader_send_frame(tx,txlen); | |
1304 | ||
1305 | // Enable and reset external trigger in timer for capturing future frames | |
1306 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; | |
1307 | ||
1308 | // Add transmitted frame to total count | |
1309 | if(txlen > 0) { | |
1310 | frame_count++; | |
1311 | if (!bQuiet) { | |
1312 | // Store the frame in the trace | |
47e18126 | 1313 | if (!LogTraceHitag(tx,txlen,HITAG_T_WAIT_2,0,true)) { |
d19929cb | 1314 | if (bQuitTraceFull) { |
1315 | break; | |
1316 | } else { | |
1317 | bQuiet = true; | |
1318 | } | |
1319 | } | |
1320 | } | |
1321 | } | |
1322 | ||
1323 | // Reset values for receiving frames | |
1324 | memset(rx,0x00,sizeof(rx)); | |
1325 | rxlen = 0; | |
1326 | lastbit = 1; | |
1327 | bSkip = true; | |
1328 | tag_sof = reset_sof; | |
1329 | response = 0; | |
1330 | ||
1331 | // Receive frame, watch for at most T0*EOF periods | |
1332 | while (AT91C_BASE_TC1->TC_CV < T0*HITAG_T_WAIT_MAX) { | |
1333 | // Check if falling edge in tag modulation is detected | |
1334 | if(AT91C_BASE_TC1->TC_SR & AT91C_TC_LDRAS) { | |
1335 | // Retrieve the new timing values | |
1336 | int ra = (AT91C_BASE_TC1->TC_RA/T0); | |
1337 | ||
1338 | // Reset timer every frame, we have to capture the last edge for timing | |
1339 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG; | |
1340 | ||
1341 | LED_B_ON(); | |
1342 | ||
1343 | // Capture tag frame (manchester decoding using only falling edges) | |
1344 | if(ra >= HITAG_T_EOF) { | |
1345 | if (rxlen != 0) { | |
1346 | //DbpString("wierd1?"); | |
1347 | } | |
1348 | // Capture the T0 periods that have passed since last communication or field drop (reset) | |
1349 | // We always recieve a 'one' first, which has the falling edge after a half period |-_| | |
1350 | response = ra-HITAG_T_TAG_HALF_PERIOD; | |
1351 | } else if(ra >= HITAG_T_TAG_CAPTURE_FOUR_HALF) { | |
1352 | // Manchester coding example |-_|_-|-_| (101) | |
1353 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
1354 | rxlen++; | |
1355 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
1356 | rxlen++; | |
1357 | } else if(ra >= HITAG_T_TAG_CAPTURE_THREE_HALF) { | |
1358 | // Manchester coding example |_-|...|_-|-_| (0...01) | |
1359 | rx[rxlen / 8] |= 0 << (7-(rxlen%8)); | |
1360 | rxlen++; | |
1361 | // We have to skip this half period at start and add the 'one' the second time | |
1362 | if (!bSkip) { | |
1363 | rx[rxlen / 8] |= 1 << (7-(rxlen%8)); | |
1364 | rxlen++; | |
1365 | } | |
1366 | lastbit = !lastbit; | |
1367 | bSkip = !bSkip; | |
1368 | } else if(ra >= HITAG_T_TAG_CAPTURE_TWO_HALF) { | |
1369 | // Manchester coding example |_-|_-| (00) or |-_|-_| (11) | |
1370 | if (tag_sof) { | |
1371 | // Ignore bits that are transmitted during SOF | |
1372 | tag_sof--; | |
1373 | } else { | |
1374 | // bit is same as last bit | |
1375 | rx[rxlen / 8] |= lastbit << (7-(rxlen%8)); | |
1376 | rxlen++; | |
1377 | } | |
1378 | } else { | |
1379 | // Ignore wierd value, is to small to mean anything | |
1380 | } | |
1381 | } | |
1382 | ||
1383 | // We can break this loop if we received the last bit from a frame | |
1384 | if (AT91C_BASE_TC1->TC_CV > T0*HITAG_T_EOF) { | |
1385 | if (rxlen>0) break; | |
1386 | } | |
1387 | } | |
1388 | } | |
1389 | LED_B_OFF(); | |
1390 | LED_D_OFF(); | |
1391 | AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; | |
1392 | AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; | |
1393 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
ab4da50d | 1394 | Dbprintf("frame received: %d",frame_count); |
1395 | DbpString("All done"); | |
1396 | cmd_send(CMD_ACK,bSuccessful,0,0,(byte_t*)tag.sectors,48); | |
d19929cb | 1397 | } |