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cee5a30d | 1 | //----------------------------------------------------------------------------- |
2 | // Gerhard de Koning Gans - May 2008 | |
3 | // Hagen Fritsch - June 2010 | |
4 | // Gerhard de Koning Gans - May 2011 | |
1e262141 | 5 | // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation |
cee5a30d | 6 | // |
7 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
8 | // at your option, any later version. See the LICENSE.txt file for the text of | |
9 | // the license. | |
10 | //----------------------------------------------------------------------------- | |
11 | // Routines to support iClass. | |
12 | //----------------------------------------------------------------------------- | |
13 | // Based on ISO14443a implementation. Still in experimental phase. | |
14 | // Contribution made during a security research at Radboud University Nijmegen | |
15 | // | |
16 | // Please feel free to contribute and extend iClass support!! | |
17 | //----------------------------------------------------------------------------- | |
18 | // | |
cee5a30d | 19 | // FIX: |
20 | // ==== | |
21 | // We still have sometimes a demodulation error when snooping iClass communication. | |
22 | // The resulting trace of a read-block-03 command may look something like this: | |
23 | // | |
24 | // + 22279: : 0c 03 e8 01 | |
25 | // | |
26 | // ...with an incorrect answer... | |
27 | // | |
28 | // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc | |
29 | // | |
30 | // We still left the error signalling bytes in the traces like 0xbb | |
31 | // | |
32 | // A correct trace should look like this: | |
33 | // | |
34 | // + 21112: : 0c 03 e8 01 | |
35 | // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5 | |
36 | // | |
37 | //----------------------------------------------------------------------------- | |
38 | ||
39 | #include "proxmark3.h" | |
40 | #include "apps.h" | |
41 | #include "util.h" | |
42 | #include "string.h" | |
7e67e42f | 43 | #include "common.h" |
1e262141 | 44 | // Needed for CRC in emulation mode; |
45 | // same construction as in ISO 14443; | |
46 | // different initial value (CRC_ICLASS) | |
47 | #include "iso14443crc.h" | |
cee5a30d | 48 | |
1e262141 | 49 | static int timeout = 4096; |
cee5a30d | 50 | |
cee5a30d | 51 | |
1e262141 | 52 | static int SendIClassAnswer(uint8_t *resp, int respLen, int delay); |
cee5a30d | 53 | |
54 | //----------------------------------------------------------------------------- | |
55 | // The software UART that receives commands from the reader, and its state | |
56 | // variables. | |
57 | //----------------------------------------------------------------------------- | |
58 | static struct { | |
59 | enum { | |
60 | STATE_UNSYNCD, | |
61 | STATE_START_OF_COMMUNICATION, | |
62 | STATE_RECEIVING | |
63 | } state; | |
64 | uint16_t shiftReg; | |
65 | int bitCnt; | |
66 | int byteCnt; | |
67 | int byteCntMax; | |
68 | int posCnt; | |
69 | int nOutOfCnt; | |
70 | int OutOfCnt; | |
71 | int syncBit; | |
1e262141 | 72 | int parityBits; |
73 | int samples; | |
cee5a30d | 74 | int highCnt; |
75 | int swapper; | |
76 | int counter; | |
77 | int bitBuffer; | |
78 | int dropPosition; | |
79 | uint8_t *output; | |
80 | } Uart; | |
81 | ||
1e262141 | 82 | static RAMFUNC int OutOfNDecoding(int bit) |
cee5a30d | 83 | { |
9f693930 | 84 | //int error = 0; |
cee5a30d | 85 | int bitright; |
86 | ||
87 | if(!Uart.bitBuffer) { | |
88 | Uart.bitBuffer = bit ^ 0xFF0; | |
89 | return FALSE; | |
90 | } | |
91 | else { | |
92 | Uart.bitBuffer <<= 4; | |
93 | Uart.bitBuffer ^= bit; | |
94 | } | |
95 | ||
96 | /*if(Uart.swapper) { | |
97 | Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF; | |
98 | Uart.byteCnt++; | |
99 | Uart.swapper = 0; | |
100 | if(Uart.byteCnt > 15) { return TRUE; } | |
101 | } | |
102 | else { | |
103 | Uart.swapper = 1; | |
104 | }*/ | |
105 | ||
106 | if(Uart.state != STATE_UNSYNCD) { | |
107 | Uart.posCnt++; | |
108 | ||
109 | if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) { | |
110 | bit = 0x00; | |
111 | } | |
112 | else { | |
113 | bit = 0x01; | |
114 | } | |
115 | if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) { | |
116 | bitright = 0x00; | |
117 | } | |
118 | else { | |
119 | bitright = 0x01; | |
120 | } | |
121 | if(bit != bitright) { bit = bitright; } | |
122 | ||
123 | ||
124 | // So, now we only have to deal with *bit*, lets see... | |
125 | if(Uart.posCnt == 1) { | |
126 | // measurement first half bitperiod | |
127 | if(!bit) { | |
128 | // Drop in first half means that we are either seeing | |
129 | // an SOF or an EOF. | |
130 | ||
131 | if(Uart.nOutOfCnt == 1) { | |
132 | // End of Communication | |
133 | Uart.state = STATE_UNSYNCD; | |
134 | Uart.highCnt = 0; | |
135 | if(Uart.byteCnt == 0) { | |
136 | // Its not straightforward to show single EOFs | |
137 | // So just leave it and do not return TRUE | |
138 | Uart.output[Uart.byteCnt] = 0xf0; | |
139 | Uart.byteCnt++; | |
140 | ||
141 | // Calculate the parity bit for the client... | |
142 | Uart.parityBits = 1; | |
143 | } | |
144 | else { | |
145 | return TRUE; | |
146 | } | |
147 | } | |
148 | else if(Uart.state != STATE_START_OF_COMMUNICATION) { | |
149 | // When not part of SOF or EOF, it is an error | |
150 | Uart.state = STATE_UNSYNCD; | |
151 | Uart.highCnt = 0; | |
9f693930 | 152 | //error = 4; |
cee5a30d | 153 | } |
154 | } | |
155 | } | |
156 | else { | |
157 | // measurement second half bitperiod | |
158 | // Count the bitslot we are in... (ISO 15693) | |
159 | Uart.nOutOfCnt++; | |
160 | ||
161 | if(!bit) { | |
162 | if(Uart.dropPosition) { | |
163 | if(Uart.state == STATE_START_OF_COMMUNICATION) { | |
9f693930 | 164 | //error = 1; |
cee5a30d | 165 | } |
166 | else { | |
9f693930 | 167 | //error = 7; |
cee5a30d | 168 | } |
169 | // It is an error if we already have seen a drop in current frame | |
170 | Uart.state = STATE_UNSYNCD; | |
171 | Uart.highCnt = 0; | |
172 | } | |
173 | else { | |
174 | Uart.dropPosition = Uart.nOutOfCnt; | |
175 | } | |
176 | } | |
177 | ||
178 | Uart.posCnt = 0; | |
179 | ||
180 | ||
181 | if(Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) { | |
182 | Uart.nOutOfCnt = 0; | |
183 | ||
184 | if(Uart.state == STATE_START_OF_COMMUNICATION) { | |
185 | if(Uart.dropPosition == 4) { | |
186 | Uart.state = STATE_RECEIVING; | |
187 | Uart.OutOfCnt = 256; | |
188 | } | |
189 | else if(Uart.dropPosition == 3) { | |
190 | Uart.state = STATE_RECEIVING; | |
191 | Uart.OutOfCnt = 4; | |
192 | //Uart.output[Uart.byteCnt] = 0xdd; | |
193 | //Uart.byteCnt++; | |
194 | } | |
195 | else { | |
196 | Uart.state = STATE_UNSYNCD; | |
197 | Uart.highCnt = 0; | |
198 | } | |
199 | Uart.dropPosition = 0; | |
200 | } | |
201 | else { | |
202 | // RECEIVING DATA | |
203 | // 1 out of 4 | |
204 | if(!Uart.dropPosition) { | |
205 | Uart.state = STATE_UNSYNCD; | |
206 | Uart.highCnt = 0; | |
9f693930 | 207 | //error = 9; |
cee5a30d | 208 | } |
209 | else { | |
210 | Uart.shiftReg >>= 2; | |
211 | ||
212 | // Swap bit order | |
213 | Uart.dropPosition--; | |
214 | //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; } | |
215 | //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; } | |
216 | ||
217 | Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6); | |
218 | Uart.bitCnt += 2; | |
219 | Uart.dropPosition = 0; | |
220 | ||
221 | if(Uart.bitCnt == 8) { | |
222 | Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff); | |
223 | Uart.byteCnt++; | |
224 | ||
225 | // Calculate the parity bit for the client... | |
226 | Uart.parityBits <<= 1; | |
227 | Uart.parityBits ^= OddByteParity[(Uart.shiftReg & 0xff)]; | |
228 | ||
229 | Uart.bitCnt = 0; | |
230 | Uart.shiftReg = 0; | |
231 | } | |
232 | } | |
233 | } | |
234 | } | |
235 | else if(Uart.nOutOfCnt == Uart.OutOfCnt) { | |
236 | // RECEIVING DATA | |
237 | // 1 out of 256 | |
238 | if(!Uart.dropPosition) { | |
239 | Uart.state = STATE_UNSYNCD; | |
240 | Uart.highCnt = 0; | |
9f693930 | 241 | //error = 3; |
cee5a30d | 242 | } |
243 | else { | |
244 | Uart.dropPosition--; | |
245 | Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff); | |
246 | Uart.byteCnt++; | |
247 | ||
248 | // Calculate the parity bit for the client... | |
249 | Uart.parityBits <<= 1; | |
250 | Uart.parityBits ^= OddByteParity[(Uart.dropPosition & 0xff)]; | |
251 | ||
252 | Uart.bitCnt = 0; | |
253 | Uart.shiftReg = 0; | |
254 | Uart.nOutOfCnt = 0; | |
255 | Uart.dropPosition = 0; | |
256 | } | |
257 | } | |
258 | ||
259 | /*if(error) { | |
260 | Uart.output[Uart.byteCnt] = 0xAA; | |
261 | Uart.byteCnt++; | |
262 | Uart.output[Uart.byteCnt] = error & 0xFF; | |
263 | Uart.byteCnt++; | |
264 | Uart.output[Uart.byteCnt] = 0xAA; | |
265 | Uart.byteCnt++; | |
266 | Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF; | |
267 | Uart.byteCnt++; | |
268 | Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF; | |
269 | Uart.byteCnt++; | |
270 | Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF; | |
271 | Uart.byteCnt++; | |
272 | Uart.output[Uart.byteCnt] = 0xAA; | |
273 | Uart.byteCnt++; | |
274 | return TRUE; | |
275 | }*/ | |
276 | } | |
277 | ||
278 | } | |
279 | else { | |
280 | bit = Uart.bitBuffer & 0xf0; | |
281 | bit >>= 4; | |
282 | bit ^= 0x0F; // drops become 1s ;-) | |
283 | if(bit) { | |
284 | // should have been high or at least (4 * 128) / fc | |
285 | // according to ISO this should be at least (9 * 128 + 20) / fc | |
286 | if(Uart.highCnt == 8) { | |
287 | // we went low, so this could be start of communication | |
288 | // it turns out to be safer to choose a less significant | |
289 | // syncbit... so we check whether the neighbour also represents the drop | |
290 | Uart.posCnt = 1; // apparently we are busy with our first half bit period | |
291 | Uart.syncBit = bit & 8; | |
292 | Uart.samples = 3; | |
293 | if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; } | |
294 | else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; } | |
295 | if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; } | |
296 | else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; } | |
297 | if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0; | |
298 | if(Uart.syncBit && (Uart.bitBuffer & 8)) { | |
299 | Uart.syncBit = 8; | |
300 | ||
301 | // the first half bit period is expected in next sample | |
302 | Uart.posCnt = 0; | |
303 | Uart.samples = 3; | |
304 | } | |
305 | } | |
306 | else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; } | |
307 | ||
308 | Uart.syncBit <<= 4; | |
309 | Uart.state = STATE_START_OF_COMMUNICATION; | |
310 | Uart.bitCnt = 0; | |
311 | Uart.byteCnt = 0; | |
312 | Uart.parityBits = 0; | |
313 | Uart.nOutOfCnt = 0; | |
314 | Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256 | |
315 | Uart.dropPosition = 0; | |
316 | Uart.shiftReg = 0; | |
9f693930 | 317 | //error = 0; |
cee5a30d | 318 | } |
319 | else { | |
320 | Uart.highCnt = 0; | |
321 | } | |
322 | } | |
323 | else { | |
324 | if(Uart.highCnt < 8) { | |
325 | Uart.highCnt++; | |
326 | } | |
327 | } | |
328 | } | |
329 | ||
330 | return FALSE; | |
331 | } | |
332 | ||
333 | //============================================================================= | |
1e262141 | 334 | // Manchester |
cee5a30d | 335 | //============================================================================= |
336 | ||
337 | static struct { | |
338 | enum { | |
339 | DEMOD_UNSYNCD, | |
340 | DEMOD_START_OF_COMMUNICATION, | |
341 | DEMOD_START_OF_COMMUNICATION2, | |
342 | DEMOD_START_OF_COMMUNICATION3, | |
343 | DEMOD_SOF_COMPLETE, | |
344 | DEMOD_MANCHESTER_D, | |
345 | DEMOD_MANCHESTER_E, | |
346 | DEMOD_END_OF_COMMUNICATION, | |
347 | DEMOD_END_OF_COMMUNICATION2, | |
348 | DEMOD_MANCHESTER_F, | |
349 | DEMOD_ERROR_WAIT | |
350 | } state; | |
351 | int bitCount; | |
352 | int posCount; | |
353 | int syncBit; | |
354 | int parityBits; | |
355 | uint16_t shiftReg; | |
356 | int buffer; | |
357 | int buffer2; | |
358 | int buffer3; | |
359 | int buff; | |
360 | int samples; | |
361 | int len; | |
362 | enum { | |
363 | SUB_NONE, | |
364 | SUB_FIRST_HALF, | |
365 | SUB_SECOND_HALF, | |
366 | SUB_BOTH | |
367 | } sub; | |
368 | uint8_t *output; | |
369 | } Demod; | |
370 | ||
371 | static RAMFUNC int ManchesterDecoding(int v) | |
372 | { | |
373 | int bit; | |
374 | int modulation; | |
375 | int error = 0; | |
376 | ||
377 | bit = Demod.buffer; | |
378 | Demod.buffer = Demod.buffer2; | |
379 | Demod.buffer2 = Demod.buffer3; | |
380 | Demod.buffer3 = v; | |
381 | ||
382 | if(Demod.buff < 3) { | |
383 | Demod.buff++; | |
384 | return FALSE; | |
385 | } | |
386 | ||
387 | if(Demod.state==DEMOD_UNSYNCD) { | |
388 | Demod.output[Demod.len] = 0xfa; | |
389 | Demod.syncBit = 0; | |
390 | //Demod.samples = 0; | |
391 | Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part | |
cee5a30d | 392 | |
393 | if(bit & 0x08) { | |
394 | Demod.syncBit = 0x08; | |
395 | } | |
396 | ||
397 | if(bit & 0x04) { | |
398 | if(Demod.syncBit) { | |
399 | bit <<= 4; | |
400 | } | |
401 | Demod.syncBit = 0x04; | |
402 | } | |
403 | ||
404 | if(bit & 0x02) { | |
405 | if(Demod.syncBit) { | |
406 | bit <<= 2; | |
407 | } | |
408 | Demod.syncBit = 0x02; | |
409 | } | |
410 | ||
411 | if(bit & 0x01 && Demod.syncBit) { | |
412 | Demod.syncBit = 0x01; | |
413 | } | |
414 | ||
415 | if(Demod.syncBit) { | |
416 | Demod.len = 0; | |
417 | Demod.state = DEMOD_START_OF_COMMUNICATION; | |
418 | Demod.sub = SUB_FIRST_HALF; | |
419 | Demod.bitCount = 0; | |
420 | Demod.shiftReg = 0; | |
421 | Demod.parityBits = 0; | |
422 | Demod.samples = 0; | |
423 | if(Demod.posCount) { | |
424 | //if(trigger) LED_A_OFF(); // Not useful in this case... | |
425 | switch(Demod.syncBit) { | |
426 | case 0x08: Demod.samples = 3; break; | |
427 | case 0x04: Demod.samples = 2; break; | |
428 | case 0x02: Demod.samples = 1; break; | |
429 | case 0x01: Demod.samples = 0; break; | |
430 | } | |
431 | // SOF must be long burst... otherwise stay unsynced!!! | |
432 | if(!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) { | |
433 | Demod.state = DEMOD_UNSYNCD; | |
434 | } | |
435 | } | |
436 | else { | |
437 | // SOF must be long burst... otherwise stay unsynced!!! | |
438 | if(!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) { | |
439 | Demod.state = DEMOD_UNSYNCD; | |
440 | error = 0x88; | |
441 | } | |
442 | ||
443 | } | |
444 | error = 0; | |
445 | ||
446 | } | |
447 | } | |
448 | else { | |
449 | modulation = bit & Demod.syncBit; | |
450 | modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit; | |
451 | //modulation = ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit; | |
452 | ||
453 | Demod.samples += 4; | |
454 | ||
455 | if(Demod.posCount==0) { | |
456 | Demod.posCount = 1; | |
457 | if(modulation) { | |
458 | Demod.sub = SUB_FIRST_HALF; | |
459 | } | |
460 | else { | |
461 | Demod.sub = SUB_NONE; | |
462 | } | |
463 | } | |
464 | else { | |
465 | Demod.posCount = 0; | |
466 | /*(modulation && (Demod.sub == SUB_FIRST_HALF)) { | |
467 | if(Demod.state!=DEMOD_ERROR_WAIT) { | |
468 | Demod.state = DEMOD_ERROR_WAIT; | |
469 | Demod.output[Demod.len] = 0xaa; | |
470 | error = 0x01; | |
471 | } | |
472 | }*/ | |
473 | //else if(modulation) { | |
474 | if(modulation) { | |
475 | if(Demod.sub == SUB_FIRST_HALF) { | |
476 | Demod.sub = SUB_BOTH; | |
477 | } | |
478 | else { | |
479 | Demod.sub = SUB_SECOND_HALF; | |
480 | } | |
481 | } | |
482 | else if(Demod.sub == SUB_NONE) { | |
483 | if(Demod.state == DEMOD_SOF_COMPLETE) { | |
484 | Demod.output[Demod.len] = 0x0f; | |
485 | Demod.len++; | |
486 | Demod.parityBits <<= 1; | |
487 | Demod.parityBits ^= OddByteParity[0x0f]; | |
488 | Demod.state = DEMOD_UNSYNCD; | |
489 | // error = 0x0f; | |
490 | return TRUE; | |
491 | } | |
492 | else { | |
493 | Demod.state = DEMOD_ERROR_WAIT; | |
494 | error = 0x33; | |
495 | } | |
496 | /*if(Demod.state!=DEMOD_ERROR_WAIT) { | |
497 | Demod.state = DEMOD_ERROR_WAIT; | |
498 | Demod.output[Demod.len] = 0xaa; | |
499 | error = 0x01; | |
500 | }*/ | |
501 | } | |
502 | ||
503 | switch(Demod.state) { | |
504 | case DEMOD_START_OF_COMMUNICATION: | |
505 | if(Demod.sub == SUB_BOTH) { | |
506 | //Demod.state = DEMOD_MANCHESTER_D; | |
507 | Demod.state = DEMOD_START_OF_COMMUNICATION2; | |
508 | Demod.posCount = 1; | |
509 | Demod.sub = SUB_NONE; | |
510 | } | |
511 | else { | |
512 | Demod.output[Demod.len] = 0xab; | |
513 | Demod.state = DEMOD_ERROR_WAIT; | |
514 | error = 0xd2; | |
515 | } | |
516 | break; | |
517 | case DEMOD_START_OF_COMMUNICATION2: | |
518 | if(Demod.sub == SUB_SECOND_HALF) { | |
519 | Demod.state = DEMOD_START_OF_COMMUNICATION3; | |
520 | } | |
521 | else { | |
522 | Demod.output[Demod.len] = 0xab; | |
523 | Demod.state = DEMOD_ERROR_WAIT; | |
524 | error = 0xd3; | |
525 | } | |
526 | break; | |
527 | case DEMOD_START_OF_COMMUNICATION3: | |
528 | if(Demod.sub == SUB_SECOND_HALF) { | |
529 | // Demod.state = DEMOD_MANCHESTER_D; | |
530 | Demod.state = DEMOD_SOF_COMPLETE; | |
531 | //Demod.output[Demod.len] = Demod.syncBit & 0xFF; | |
532 | //Demod.len++; | |
533 | } | |
534 | else { | |
535 | Demod.output[Demod.len] = 0xab; | |
536 | Demod.state = DEMOD_ERROR_WAIT; | |
537 | error = 0xd4; | |
538 | } | |
539 | break; | |
540 | case DEMOD_SOF_COMPLETE: | |
541 | case DEMOD_MANCHESTER_D: | |
542 | case DEMOD_MANCHESTER_E: | |
543 | // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443) | |
544 | // 00001111 = 1 (0 in 14443) | |
545 | if(Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF | |
546 | Demod.bitCount++; | |
547 | Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100; | |
548 | Demod.state = DEMOD_MANCHESTER_D; | |
549 | } | |
550 | else if(Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF | |
551 | Demod.bitCount++; | |
552 | Demod.shiftReg >>= 1; | |
553 | Demod.state = DEMOD_MANCHESTER_E; | |
554 | } | |
555 | else if(Demod.sub == SUB_BOTH) { | |
556 | Demod.state = DEMOD_MANCHESTER_F; | |
557 | } | |
558 | else { | |
559 | Demod.state = DEMOD_ERROR_WAIT; | |
560 | error = 0x55; | |
561 | } | |
562 | break; | |
563 | ||
564 | case DEMOD_MANCHESTER_F: | |
565 | // Tag response does not need to be a complete byte! | |
566 | if(Demod.len > 0 || Demod.bitCount > 0) { | |
567 | if(Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF | |
568 | Demod.shiftReg >>= (9 - Demod.bitCount); | |
569 | Demod.output[Demod.len] = Demod.shiftReg & 0xff; | |
570 | Demod.len++; | |
571 | // No parity bit, so just shift a 0 | |
572 | Demod.parityBits <<= 1; | |
573 | } | |
574 | ||
575 | Demod.state = DEMOD_UNSYNCD; | |
576 | return TRUE; | |
577 | } | |
578 | else { | |
579 | Demod.output[Demod.len] = 0xad; | |
580 | Demod.state = DEMOD_ERROR_WAIT; | |
581 | error = 0x03; | |
582 | } | |
583 | break; | |
584 | ||
585 | case DEMOD_ERROR_WAIT: | |
586 | Demod.state = DEMOD_UNSYNCD; | |
587 | break; | |
588 | ||
589 | default: | |
590 | Demod.output[Demod.len] = 0xdd; | |
591 | Demod.state = DEMOD_UNSYNCD; | |
592 | break; | |
593 | } | |
594 | ||
595 | /*if(Demod.bitCount>=9) { | |
596 | Demod.output[Demod.len] = Demod.shiftReg & 0xff; | |
597 | Demod.len++; | |
598 | ||
599 | Demod.parityBits <<= 1; | |
600 | Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01); | |
601 | ||
602 | Demod.bitCount = 0; | |
603 | Demod.shiftReg = 0; | |
604 | }*/ | |
605 | if(Demod.bitCount>=8) { | |
606 | Demod.shiftReg >>= 1; | |
607 | Demod.output[Demod.len] = (Demod.shiftReg & 0xff); | |
608 | Demod.len++; | |
609 | ||
610 | // FOR ISO15639 PARITY NOT SEND OTA, JUST CALCULATE IT FOR THE CLIENT | |
611 | Demod.parityBits <<= 1; | |
612 | Demod.parityBits ^= OddByteParity[(Demod.shiftReg & 0xff)]; | |
613 | ||
614 | Demod.bitCount = 0; | |
615 | Demod.shiftReg = 0; | |
616 | } | |
617 | ||
618 | if(error) { | |
619 | Demod.output[Demod.len] = 0xBB; | |
620 | Demod.len++; | |
621 | Demod.output[Demod.len] = error & 0xFF; | |
622 | Demod.len++; | |
623 | Demod.output[Demod.len] = 0xBB; | |
624 | Demod.len++; | |
625 | Demod.output[Demod.len] = bit & 0xFF; | |
626 | Demod.len++; | |
627 | Demod.output[Demod.len] = Demod.buffer & 0xFF; | |
628 | Demod.len++; | |
629 | // Look harder ;-) | |
630 | Demod.output[Demod.len] = Demod.buffer2 & 0xFF; | |
631 | Demod.len++; | |
632 | Demod.output[Demod.len] = Demod.syncBit & 0xFF; | |
633 | Demod.len++; | |
634 | Demod.output[Demod.len] = 0xBB; | |
635 | Demod.len++; | |
636 | return TRUE; | |
637 | } | |
638 | ||
639 | } | |
640 | ||
641 | } // end (state != UNSYNCED) | |
642 | ||
643 | return FALSE; | |
644 | } | |
645 | ||
646 | //============================================================================= | |
1e262141 | 647 | // Finally, a `sniffer' for iClass communication |
cee5a30d | 648 | // Both sides of communication! |
649 | //============================================================================= | |
650 | ||
651 | //----------------------------------------------------------------------------- | |
652 | // Record the sequence of commands sent by the reader to the tag, with | |
653 | // triggering so that we start recording at the point that the tag is moved | |
654 | // near the reader. | |
655 | //----------------------------------------------------------------------------- | |
656 | void RAMFUNC SnoopIClass(void) | |
657 | { | |
17cba269 | 658 | |
cee5a30d | 659 | |
660 | // We won't start recording the frames that we acquire until we trigger; | |
661 | // a good trigger condition to get started is probably when we see a | |
662 | // response from the tag. | |
9f693930 | 663 | //int triggered = FALSE; // FALSE to wait first for card |
cee5a30d | 664 | |
665 | // The command (reader -> tag) that we're receiving. | |
666 | // The length of a received command will in most cases be no more than 18 bytes. | |
667 | // So 32 should be enough! | |
17cba269 | 668 | uint8_t *readerToTagCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET); |
cee5a30d | 669 | // The response (tag -> reader) that we're receiving. |
17cba269 | 670 | uint8_t *tagToReaderResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET); |
cee5a30d | 671 | |
7cc204bf | 672 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
673 | ||
1e262141 | 674 | // reset traceLen to 0 |
675 | iso14a_set_tracing(TRUE); | |
d19929cb | 676 | iso14a_clear_trace(); |
1e262141 | 677 | iso14a_set_trigger(FALSE); |
cee5a30d | 678 | |
679 | // The DMA buffer, used to stream samples from the FPGA | |
680 | int8_t *dmaBuf = ((int8_t *)BigBuf) + DMA_BUFFER_OFFSET; | |
681 | int lastRxCounter; | |
682 | int8_t *upTo; | |
683 | int smpl; | |
684 | int maxBehindBy = 0; | |
685 | ||
686 | // Count of samples received so far, so that we can include timing | |
687 | // information in the trace buffer. | |
688 | int samples = 0; | |
689 | rsamples = 0; | |
690 | ||
cee5a30d | 691 | // Set up the demodulator for tag -> reader responses. |
17cba269 | 692 | Demod.output = tagToReaderResponse; |
cee5a30d | 693 | Demod.len = 0; |
694 | Demod.state = DEMOD_UNSYNCD; | |
695 | ||
696 | // Setup for the DMA. | |
697 | FpgaSetupSsc(); | |
698 | upTo = dmaBuf; | |
699 | lastRxCounter = DMA_BUFFER_SIZE; | |
700 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); | |
701 | ||
702 | // And the reader -> tag commands | |
703 | memset(&Uart, 0, sizeof(Uart)); | |
17cba269 | 704 | Uart.output = readerToTagCmd; |
cee5a30d | 705 | Uart.byteCntMax = 32; // was 100 (greg)//////////////////////////////////////////////////////////////////////// |
706 | Uart.state = STATE_UNSYNCD; | |
707 | ||
708 | // And put the FPGA in the appropriate mode | |
709 | // Signal field is off with the appropriate LED | |
710 | LED_D_OFF(); | |
711 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER); | |
712 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
713 | ||
81012e67 MHS |
714 | uint32_t time_0 = GetCountSspClk(); |
715 | ||
716 | ||
cee5a30d | 717 | int div = 0; |
718 | //int div2 = 0; | |
719 | int decbyte = 0; | |
720 | int decbyter = 0; | |
721 | ||
722 | // And now we loop, receiving samples. | |
723 | for(;;) { | |
724 | LED_A_ON(); | |
725 | WDT_HIT(); | |
726 | int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & | |
727 | (DMA_BUFFER_SIZE-1); | |
728 | if(behindBy > maxBehindBy) { | |
729 | maxBehindBy = behindBy; | |
730 | if(behindBy > 400) { | |
731 | Dbprintf("blew circular buffer! behindBy=0x%x", behindBy); | |
732 | goto done; | |
733 | } | |
734 | } | |
735 | if(behindBy < 1) continue; | |
736 | ||
737 | LED_A_OFF(); | |
738 | smpl = upTo[0]; | |
739 | upTo++; | |
740 | lastRxCounter -= 1; | |
741 | if(upTo - dmaBuf > DMA_BUFFER_SIZE) { | |
742 | upTo -= DMA_BUFFER_SIZE; | |
743 | lastRxCounter += DMA_BUFFER_SIZE; | |
744 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo; | |
745 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; | |
746 | } | |
747 | ||
748 | //samples += 4; | |
749 | samples += 1; | |
cee5a30d | 750 | |
cee5a30d | 751 | if(smpl & 0xF) { |
752 | decbyte ^= (1 << (3 - div)); | |
753 | } | |
cee5a30d | 754 | |
755 | // FOR READER SIDE COMMUMICATION... | |
17cba269 | 756 | |
cee5a30d | 757 | decbyter <<= 2; |
758 | decbyter ^= (smpl & 0x30); | |
759 | ||
760 | div++; | |
761 | ||
762 | if((div + 1) % 2 == 0) { | |
763 | smpl = decbyter; | |
1e262141 | 764 | if(OutOfNDecoding((smpl & 0xF0) >> 4)) { |
cee5a30d | 765 | rsamples = samples - Uart.samples; |
766 | LED_C_ON(); | |
17cba269 | 767 | |
81012e67 | 768 | //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,TRUE)) break; |
17cba269 | 769 | //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break; |
81012e67 MHS |
770 | if(tracing) |
771 | { | |
772 | LogTrace(Uart.output,Uart.byteCnt, (GetCountSspClk()-time_0) << 4, Uart.parityBits,TRUE); | |
773 | LogTrace(NULL, 0, (GetCountSspClk()-time_0) << 4, 0, TRUE); | |
774 | } | |
775 | ||
17cba269 MHS |
776 | |
777 | /* And ready to receive another command. */ | |
cee5a30d | 778 | Uart.state = STATE_UNSYNCD; |
779 | /* And also reset the demod code, which might have been */ | |
780 | /* false-triggered by the commands from the reader. */ | |
781 | Demod.state = DEMOD_UNSYNCD; | |
782 | LED_B_OFF(); | |
783 | Uart.byteCnt = 0; | |
784 | } | |
785 | decbyter = 0; | |
786 | } | |
787 | ||
788 | if(div > 3) { | |
789 | smpl = decbyte; | |
790 | if(ManchesterDecoding(smpl & 0x0F)) { | |
791 | rsamples = samples - Demod.samples; | |
792 | LED_B_ON(); | |
793 | ||
81012e67 MHS |
794 | if(tracing) |
795 | { | |
796 | LogTrace(Demod.output,Demod.len, (GetCountSspClk()-time_0) << 4 , Demod.parityBits,FALSE); | |
797 | LogTrace(NULL, 0, (GetCountSspClk()-time_0) << 4, 0, FALSE); | |
798 | } | |
17cba269 | 799 | |
cee5a30d | 800 | |
801 | // And ready to receive another response. | |
802 | memset(&Demod, 0, sizeof(Demod)); | |
17cba269 | 803 | Demod.output = tagToReaderResponse; |
cee5a30d | 804 | Demod.state = DEMOD_UNSYNCD; |
805 | LED_C_OFF(); | |
806 | } | |
807 | ||
808 | div = 0; | |
809 | decbyte = 0x00; | |
810 | } | |
811 | //} | |
812 | ||
813 | if(BUTTON_PRESS()) { | |
814 | DbpString("cancelled_a"); | |
815 | goto done; | |
816 | } | |
817 | } | |
818 | ||
819 | DbpString("COMMAND FINISHED"); | |
820 | ||
821 | Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt); | |
822 | Dbprintf("%x %x %x", Uart.byteCntMax, traceLen, (int)Uart.output[0]); | |
823 | ||
824 | done: | |
825 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; | |
826 | Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt); | |
827 | Dbprintf("%x %x %x", Uart.byteCntMax, traceLen, (int)Uart.output[0]); | |
828 | LED_A_OFF(); | |
829 | LED_B_OFF(); | |
1e262141 | 830 | LED_C_OFF(); |
831 | LED_D_OFF(); | |
832 | } | |
833 | ||
912a3e94 | 834 | void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) { |
835 | int i; | |
836 | for(i = 0; i < 8; i++) { | |
837 | rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5); | |
1e262141 | 838 | } |
839 | } | |
840 | ||
841 | //----------------------------------------------------------------------------- | |
842 | // Wait for commands from reader | |
843 | // Stop when button is pressed | |
844 | // Or return TRUE when command is captured | |
845 | //----------------------------------------------------------------------------- | |
846 | static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen) | |
847 | { | |
912a3e94 | 848 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen |
1e262141 | 849 | // only, since we are receiving, not transmitting). |
850 | // Signal field is off with the appropriate LED | |
851 | LED_D_OFF(); | |
852 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
853 | ||
854 | // Now run a `software UART' on the stream of incoming samples. | |
855 | Uart.output = received; | |
856 | Uart.byteCntMax = maxLen; | |
857 | Uart.state = STATE_UNSYNCD; | |
858 | ||
859 | for(;;) { | |
860 | WDT_HIT(); | |
861 | ||
862 | if(BUTTON_PRESS()) return FALSE; | |
863 | ||
864 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
865 | AT91C_BASE_SSC->SSC_THR = 0x00; | |
866 | } | |
867 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
868 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
869 | /*if(OutOfNDecoding((b & 0xf0) >> 4)) { | |
870 | *len = Uart.byteCnt; | |
871 | return TRUE; | |
872 | }*/ | |
873 | if(OutOfNDecoding(b & 0x0f)) { | |
874 | *len = Uart.byteCnt; | |
875 | return TRUE; | |
876 | } | |
877 | } | |
878 | } | |
879 | } | |
880 | ||
881 | ||
882 | //----------------------------------------------------------------------------- | |
883 | // Prepare tag messages | |
884 | //----------------------------------------------------------------------------- | |
885 | static void CodeIClassTagAnswer(const uint8_t *cmd, int len) | |
886 | { | |
81012e67 MHS |
887 | //So far a dummy implementation, not used |
888 | //int lastProxToAirDuration =0; | |
1e262141 | 889 | int i; |
890 | ||
891 | ToSendReset(); | |
892 | ||
893 | // Send SOF | |
894 | ToSend[++ToSendMax] = 0x00; | |
895 | ToSend[++ToSendMax] = 0x00; | |
896 | ToSend[++ToSendMax] = 0x00; | |
81012e67 | 897 | ToSend[++ToSendMax] = 0xff;//Proxtoair duration starts here |
1e262141 | 898 | ToSend[++ToSendMax] = 0xff; |
899 | ToSend[++ToSendMax] = 0xff; | |
900 | ToSend[++ToSendMax] = 0x00; | |
901 | ToSend[++ToSendMax] = 0xff; | |
902 | ||
903 | for(i = 0; i < len; i++) { | |
904 | int j; | |
905 | uint8_t b = cmd[i]; | |
906 | ||
907 | // Data bits | |
908 | for(j = 0; j < 8; j++) { | |
909 | if(b & 1) { | |
910 | ToSend[++ToSendMax] = 0x00; | |
911 | ToSend[++ToSendMax] = 0xff; | |
912 | } else { | |
913 | ToSend[++ToSendMax] = 0xff; | |
914 | ToSend[++ToSendMax] = 0x00; | |
915 | } | |
916 | b >>= 1; | |
917 | } | |
918 | } | |
919 | ||
920 | // Send EOF | |
921 | ToSend[++ToSendMax] = 0xff; | |
922 | ToSend[++ToSendMax] = 0x00; | |
923 | ToSend[++ToSendMax] = 0xff; | |
924 | ToSend[++ToSendMax] = 0xff; | |
81012e67 | 925 | ToSend[++ToSendMax] = 0xff; |
1e262141 | 926 | ToSend[++ToSendMax] = 0x00; |
927 | ToSend[++ToSendMax] = 0x00; | |
928 | ToSend[++ToSendMax] = 0x00; | |
929 | ||
81012e67 MHS |
930 | //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end |
931 | ||
1e262141 | 932 | // Convert from last byte pos to length |
933 | ToSendMax++; | |
934 | } | |
935 | ||
936 | // Only SOF | |
937 | static void CodeIClassTagSOF() | |
938 | { | |
81012e67 MHS |
939 | //So far a dummy implementation, not used |
940 | //int lastProxToAirDuration =0; | |
1e262141 | 941 | |
81012e67 | 942 | ToSendReset(); |
1e262141 | 943 | // Send SOF |
944 | ToSend[++ToSendMax] = 0x00; | |
945 | ToSend[++ToSendMax] = 0x00; | |
946 | ToSend[++ToSendMax] = 0x00; | |
947 | ToSend[++ToSendMax] = 0xff; | |
948 | ToSend[++ToSendMax] = 0xff; | |
949 | ToSend[++ToSendMax] = 0xff; | |
950 | ToSend[++ToSendMax] = 0x00; | |
951 | ToSend[++ToSendMax] = 0xff; | |
81012e67 MHS |
952 | |
953 | // lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning | |
954 | ||
1e262141 | 955 | |
956 | // Convert from last byte pos to length | |
957 | ToSendMax++; | |
958 | } | |
9f6e9d15 | 959 | int doIClassSimulation(uint8_t csn[], int breakAfterMacReceived, uint8_t *reader_mac_buf); |
ff7bb4ef MHS |
960 | /** |
961 | * @brief SimulateIClass simulates an iClass card. | |
962 | * @param arg0 type of simulation | |
963 | * - 0 uses the first 8 bytes in usb data as CSN | |
964 | * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified | |
965 | * in the usb data. This mode collects MAC from the reader, in order to do an offline | |
966 | * attack on the keys. For more info, see "dismantling iclass" and proxclone.com. | |
967 | * - Other : Uses the default CSN (031fec8af7ff12e0) | |
968 | * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only) | |
969 | * @param arg2 | |
970 | * @param datain | |
971 | */ | |
972 | void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain) | |
1e262141 | 973 | { |
ff7bb4ef MHS |
974 | uint32_t simType = arg0; |
975 | uint32_t numberOfCSNS = arg1; | |
7cc204bf | 976 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
1e262141 | 977 | |
ff7bb4ef MHS |
978 | // Enable and clear the trace |
979 | iso14a_set_tracing(TRUE); | |
980 | iso14a_clear_trace(); | |
81cd0474 | 981 | |
ff7bb4ef | 982 | uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 }; |
ff7bb4ef MHS |
983 | if(simType == 0) { |
984 | // Use the CSN from commandline | |
985 | memcpy(csn_crc, datain, 8); | |
9f6e9d15 | 986 | doIClassSimulation(csn_crc,0,NULL); |
ff7bb4ef MHS |
987 | }else if(simType == 1) |
988 | { | |
9f6e9d15 | 989 | doIClassSimulation(csn_crc,0,NULL); |
ff7bb4ef MHS |
990 | } |
991 | else if(simType == 2) | |
992 | { | |
9f6e9d15 MHS |
993 | |
994 | uint8_t mac_responses[64] = { 0 }; | |
17cba269 | 995 | Dbprintf("Going into attack mode"); |
ff7bb4ef MHS |
996 | // In this mode, a number of csns are within datain. We'll simulate each one, one at a time |
997 | // in order to collect MAC's from the reader. This can later be used in an offlne-attack | |
998 | // in order to obtain the keys, as in the "dismantling iclass"-paper. | |
9f6e9d15 MHS |
999 | int i = 0; |
1000 | for( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++) | |
ff7bb4ef MHS |
1001 | { |
1002 | // The usb data is 512 bytes, fitting 65 8-byte CSNs in there. | |
1003 | ||
1004 | memcpy(csn_crc, datain+(i*8), 8); | |
9f6e9d15 | 1005 | if(doIClassSimulation(csn_crc,1,mac_responses)) |
f83cc126 MHS |
1006 | { |
1007 | return; // Button pressed | |
1008 | } | |
ff7bb4ef | 1009 | } |
9f6e9d15 MHS |
1010 | cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8); |
1011 | ||
81012e67 MHS |
1012 | } |
1013 | else{ | |
ff7bb4ef MHS |
1014 | // We may want a mode here where we hardcode the csns to use (from proxclone). |
1015 | // That will speed things up a little, but not required just yet. | |
1016 | Dbprintf("The mode is not implemented, reserved for future use"); | |
1017 | } | |
9f6e9d15 | 1018 | Dbprintf("Done..."); |
ff7bb4ef MHS |
1019 | |
1020 | } | |
1021 | /** | |
1022 | * @brief Does the actual simulation | |
1023 | * @param csn - csn to use | |
1024 | * @param breakAfterMacReceived if true, returns after reader MAC has been received. | |
1025 | */ | |
9f6e9d15 | 1026 | int doIClassSimulation(uint8_t csn[], int breakAfterMacReceived, uint8_t *reader_mac_buf) |
ff7bb4ef | 1027 | { |
81012e67 | 1028 | |
81cd0474 | 1029 | |
1e262141 | 1030 | // CSN followed by two CRC bytes |
1e262141 | 1031 | uint8_t response2[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; |
ff7bb4ef MHS |
1032 | uint8_t response3[] = { 0,0,0,0,0,0,0,0,0,0}; |
1033 | memcpy(response3,csn,sizeof(response3)); | |
f83cc126 | 1034 | Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]); |
1e262141 | 1035 | // e-Purse |
1036 | uint8_t response4[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; | |
1e262141 | 1037 | |
1e262141 | 1038 | // Construct anticollision-CSN |
912a3e94 | 1039 | rotateCSN(response3,response2); |
1e262141 | 1040 | |
1041 | // Compute CRC on both CSNs | |
1042 | ComputeCrc14443(CRC_ICLASS, response2, 8, &response2[8], &response2[9]); | |
1043 | ComputeCrc14443(CRC_ICLASS, response3, 8, &response3[8], &response3[9]); | |
1044 | ||
ff7bb4ef | 1045 | int exitLoop = 0; |
1e262141 | 1046 | // Reader 0a |
1047 | // Tag 0f | |
1048 | // Reader 0c | |
1049 | // Tag anticoll. CSN | |
1050 | // Reader 81 anticoll. CSN | |
1051 | // Tag CSN | |
1052 | ||
81cd0474 | 1053 | uint8_t *resp; |
1054 | int respLen; | |
1055 | uint8_t* respdata = NULL; | |
1056 | int respsize = 0; | |
1057 | uint8_t sof = 0x0f; | |
1e262141 | 1058 | |
1059 | // Respond SOF -- takes 8 bytes | |
81cd0474 | 1060 | uint8_t *resp1 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); |
1e262141 | 1061 | int resp1Len; |
1062 | ||
1063 | // Anticollision CSN (rotated CSN) | |
1064 | // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit) | |
81cd0474 | 1065 | uint8_t *resp2 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + 10); |
1e262141 | 1066 | int resp2Len; |
1067 | ||
1068 | // CSN | |
1069 | // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit) | |
81cd0474 | 1070 | uint8_t *resp3 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + 190); |
912a3e94 | 1071 | int resp3Len; |
1e262141 | 1072 | |
1073 | // e-Purse | |
1074 | // 144: Takes 16 bytes for SOF/EOF and 8 * 16 = 128 bytes (2 bytes/bit) | |
81cd0474 | 1075 | uint8_t *resp4 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + 370); |
1e262141 | 1076 | int resp4Len; |
1077 | ||
1078 | // + 1720.. | |
ff7bb4ef | 1079 | uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET); |
81cd0474 | 1080 | memset(receivedCmd, 0x44, RECV_CMD_SIZE); |
1e262141 | 1081 | int len; |
1082 | ||
1e262141 | 1083 | // Prepare card messages |
1084 | ToSendMax = 0; | |
1085 | ||
1086 | // First card answer: SOF | |
1087 | CodeIClassTagSOF(); | |
1088 | memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax; | |
1089 | ||
1090 | // Anticollision CSN | |
1091 | CodeIClassTagAnswer(response2, sizeof(response2)); | |
1092 | memcpy(resp2, ToSend, ToSendMax); resp2Len = ToSendMax; | |
1093 | ||
1094 | // CSN | |
1095 | CodeIClassTagAnswer(response3, sizeof(response3)); | |
912a3e94 | 1096 | memcpy(resp3, ToSend, ToSendMax); resp3Len = ToSendMax; |
1e262141 | 1097 | |
1098 | // e-Purse | |
1099 | CodeIClassTagAnswer(response4, sizeof(response4)); | |
1100 | memcpy(resp4, ToSend, ToSendMax); resp4Len = ToSendMax; | |
1101 | ||
e3dc1e4c MHS |
1102 | |
1103 | // Start from off (no field generated) | |
fa541aca MHS |
1104 | //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1105 | //SpinDelay(200); | |
1106 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1107 | SpinDelay(100); | |
1108 | StartCountSspClk(); | |
1e262141 | 1109 | // We need to listen to the high-frequency, peak-detected path. |
1110 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
1111 | FpgaSetupSsc(); | |
1112 | ||
1113 | // To control where we are in the protocol | |
1e262141 | 1114 | int cmdsRecvd = 0; |
81012e67 MHS |
1115 | uint32_t time_0 = GetCountSspClk(); |
1116 | uint32_t t2r_time =0; | |
1117 | uint32_t r2t_time =0; | |
912a3e94 | 1118 | |
1e262141 | 1119 | LED_A_ON(); |
f83cc126 | 1120 | bool buttonPressed = false; |
9f6e9d15 MHS |
1121 | |
1122 | /** Hack for testing | |
1123 | memcpy(reader_mac_buf,csn,8); | |
1124 | exitLoop = true; | |
1125 | end hack **/ | |
1126 | ||
ff7bb4ef | 1127 | while(!exitLoop) { |
81012e67 | 1128 | |
1e262141 | 1129 | LED_B_OFF(); |
e3dc1e4c MHS |
1130 | //Signal tracer |
1131 | // Can be used to get a trigger for an oscilloscope.. | |
1132 | LED_C_OFF(); | |
1133 | ||
1e262141 | 1134 | if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) { |
f83cc126 | 1135 | buttonPressed = true; |
1e262141 | 1136 | break; |
81cd0474 | 1137 | } |
81012e67 | 1138 | r2t_time = GetCountSspClk(); |
e3dc1e4c MHS |
1139 | //Signal tracer |
1140 | LED_C_ON(); | |
1e262141 | 1141 | |
81cd0474 | 1142 | // Okay, look at the command now. |
f83cc126 | 1143 | if(receivedCmd[0] == 0x0a ) { |
1e262141 | 1144 | // Reader in anticollission phase |
1145 | resp = resp1; respLen = resp1Len; //order = 1; | |
81cd0474 | 1146 | respdata = &sof; |
1147 | respsize = sizeof(sof); | |
1e262141 | 1148 | } else if(receivedCmd[0] == 0x0c) { |
1149 | // Reader asks for anticollission CSN | |
1150 | resp = resp2; respLen = resp2Len; //order = 2; | |
81cd0474 | 1151 | respdata = response2; |
1152 | respsize = sizeof(response2); | |
1e262141 | 1153 | //DbpString("Reader requests anticollission CSN:"); |
1154 | } else if(receivedCmd[0] == 0x81) { | |
1155 | // Reader selects anticollission CSN. | |
1156 | // Tag sends the corresponding real CSN | |
912a3e94 | 1157 | resp = resp3; respLen = resp3Len; //order = 3; |
81cd0474 | 1158 | respdata = response3; |
1159 | respsize = sizeof(response3); | |
1e262141 | 1160 | //DbpString("Reader selects anticollission CSN:"); |
1161 | } else if(receivedCmd[0] == 0x88) { | |
1162 | // Read e-purse (88 02) | |
1163 | resp = resp4; respLen = resp4Len; //order = 4; | |
81cd0474 | 1164 | respdata = response4; |
1165 | respsize = sizeof(response4); | |
1e262141 | 1166 | LED_B_ON(); |
1167 | } else if(receivedCmd[0] == 0x05) { | |
1168 | // Reader random and reader MAC!!! | |
1e262141 | 1169 | // Do not respond |
1170 | // We do not know what to answer, so lets keep quit | |
1171 | resp = resp1; respLen = 0; //order = 5; | |
81cd0474 | 1172 | respdata = NULL; |
1173 | respsize = 0; | |
ff7bb4ef MHS |
1174 | if (breakAfterMacReceived){ |
1175 | // TODO, actually return this to the caller instead of just | |
1176 | // dbprintf:ing ... | |
9f6e9d15 | 1177 | Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]); |
ff7bb4ef MHS |
1178 | Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len, |
1179 | receivedCmd[0], receivedCmd[1], receivedCmd[2], | |
1180 | receivedCmd[3], receivedCmd[4], receivedCmd[5], | |
1181 | receivedCmd[6], receivedCmd[7], receivedCmd[8]); | |
9f6e9d15 MHS |
1182 | if (reader_mac_buf != NULL) |
1183 | { | |
1184 | memcpy(reader_mac_buf,receivedCmd+1,8); | |
1185 | } | |
ff7bb4ef MHS |
1186 | exitLoop = true; |
1187 | } | |
1e262141 | 1188 | } else if(receivedCmd[0] == 0x00 && len == 1) { |
1189 | // Reader ends the session | |
1190 | resp = resp1; respLen = 0; //order = 0; | |
81cd0474 | 1191 | respdata = NULL; |
1192 | respsize = 0; | |
1193 | } else { | |
17cba269 | 1194 | //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44 |
1e262141 | 1195 | // Never seen this command before |
1196 | Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x", | |
1197 | len, | |
1198 | receivedCmd[0], receivedCmd[1], receivedCmd[2], | |
1199 | receivedCmd[3], receivedCmd[4], receivedCmd[5], | |
1200 | receivedCmd[6], receivedCmd[7], receivedCmd[8]); | |
1201 | // Do not respond | |
1202 | resp = resp1; respLen = 0; //order = 0; | |
81cd0474 | 1203 | respdata = NULL; |
1204 | respsize = 0; | |
1e262141 | 1205 | } |
1206 | ||
81012e67 MHS |
1207 | if(cmdsRecvd > 100) { |
1208 | //DbpString("100 commands later..."); | |
9f6e9d15 | 1209 | //break; |
1e262141 | 1210 | } |
1211 | else { | |
1212 | cmdsRecvd++; | |
1213 | } | |
1214 | ||
81cd0474 | 1215 | if(respLen > 0) { |
1216 | SendIClassAnswer(resp, respLen, 21); | |
81012e67 | 1217 | t2r_time = GetCountSspClk(); |
81cd0474 | 1218 | } |
f83cc126 | 1219 | |
81cd0474 | 1220 | if (tracing) { |
81012e67 MHS |
1221 | LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, Uart.parityBits,TRUE); |
1222 | LogTrace(NULL,0, (r2t_time-time_0) << 4, 0,TRUE); | |
17cba269 MHS |
1223 | |
1224 | if (respdata != NULL) { | |
81012e67 MHS |
1225 | LogTrace(respdata,respsize, (t2r_time-time_0) << 4,SwapBits(GetParity(respdata,respsize),respsize),FALSE); |
1226 | LogTrace(NULL,0, (t2r_time-time_0) << 4,0,FALSE); | |
1227 | ||
1228 | ||
17cba269 | 1229 | } |
81012e67 MHS |
1230 | if(!tracing) { |
1231 | DbpString("Trace full"); | |
1232 | //break; | |
1233 | } | |
1234 | ||
81cd0474 | 1235 | } |
81cd0474 | 1236 | memset(receivedCmd, 0x44, RECV_CMD_SIZE); |
1237 | } | |
1e262141 | 1238 | |
9f6e9d15 | 1239 | //Dbprintf("%x", cmdsRecvd); |
1e262141 | 1240 | LED_A_OFF(); |
1241 | LED_B_OFF(); | |
f83cc126 MHS |
1242 | if(buttonPressed) |
1243 | { | |
1244 | DbpString("Button pressed"); | |
1245 | } | |
f83cc126 | 1246 | return buttonPressed; |
1e262141 | 1247 | } |
1248 | ||
1249 | static int SendIClassAnswer(uint8_t *resp, int respLen, int delay) | |
1250 | { | |
e3dc1e4c | 1251 | int i = 0, d=0;//, u = 0, d = 0; |
1e262141 | 1252 | uint8_t b = 0; |
e3dc1e4c MHS |
1253 | |
1254 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K); | |
1255 | ||
1e262141 | 1256 | AT91C_BASE_SSC->SSC_THR = 0x00; |
1257 | FpgaSetupSsc(); | |
e3dc1e4c MHS |
1258 | while(!BUTTON_PRESS()) { |
1259 | if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){ | |
1260 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
1e262141 | 1261 | } |
e3dc1e4c MHS |
1262 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){ |
1263 | b = 0x00; | |
1e262141 | 1264 | if(d < delay) { |
1e262141 | 1265 | d++; |
1266 | } | |
e3dc1e4c MHS |
1267 | else { |
1268 | if( i < respLen){ | |
1269 | b = resp[i]; | |
1270 | //Hack | |
1271 | //b = 0xAC; | |
1272 | } | |
1273 | i++; | |
1e262141 | 1274 | } |
1275 | AT91C_BASE_SSC->SSC_THR = b; | |
1e262141 | 1276 | } |
e3dc1e4c MHS |
1277 | |
1278 | if (i > respLen +4) break; | |
1e262141 | 1279 | } |
1280 | ||
1281 | return 0; | |
1282 | } | |
1283 | ||
1284 | /// THE READER CODE | |
1285 | ||
1286 | //----------------------------------------------------------------------------- | |
1287 | // Transmit the command (to the tag) that was placed in ToSend[]. | |
1288 | //----------------------------------------------------------------------------- | |
1289 | static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait) | |
1290 | { | |
1291 | int c; | |
1e262141 | 1292 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); |
1293 | AT91C_BASE_SSC->SSC_THR = 0x00; | |
1294 | FpgaSetupSsc(); | |
1295 | ||
1296 | if (wait) | |
1297 | if(*wait < 10) | |
1298 | *wait = 10; | |
1299 | ||
1300 | for(c = 0; c < *wait;) { | |
1301 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1302 | AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing! | |
1303 | c++; | |
1304 | } | |
1305 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
1306 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
1307 | (void)r; | |
1308 | } | |
1309 | WDT_HIT(); | |
1310 | } | |
1311 | ||
1312 | uint8_t sendbyte; | |
1313 | bool firstpart = TRUE; | |
1314 | c = 0; | |
1315 | for(;;) { | |
1316 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1317 | ||
1318 | // DOUBLE THE SAMPLES! | |
1319 | if(firstpart) { | |
1320 | sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4); | |
1321 | } | |
1322 | else { | |
1323 | sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4); | |
1324 | c++; | |
1325 | } | |
1326 | if(sendbyte == 0xff) { | |
1327 | sendbyte = 0xfe; | |
1328 | } | |
1329 | AT91C_BASE_SSC->SSC_THR = sendbyte; | |
1330 | firstpart = !firstpart; | |
1331 | ||
1332 | if(c >= len) { | |
1333 | break; | |
1334 | } | |
1335 | } | |
1336 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
1337 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
1338 | (void)r; | |
1339 | } | |
1340 | WDT_HIT(); | |
1341 | } | |
1342 | if (samples) *samples = (c + *wait) << 3; | |
1343 | } | |
1344 | ||
1345 | ||
1346 | //----------------------------------------------------------------------------- | |
1347 | // Prepare iClass reader command to send to FPGA | |
1348 | //----------------------------------------------------------------------------- | |
1349 | void CodeIClassCommand(const uint8_t * cmd, int len) | |
1350 | { | |
1351 | int i, j, k; | |
1352 | uint8_t b; | |
1353 | ||
1354 | ToSendReset(); | |
1355 | ||
1356 | // Start of Communication: 1 out of 4 | |
1357 | ToSend[++ToSendMax] = 0xf0; | |
1358 | ToSend[++ToSendMax] = 0x00; | |
1359 | ToSend[++ToSendMax] = 0x0f; | |
1360 | ToSend[++ToSendMax] = 0x00; | |
1361 | ||
1362 | // Modulate the bytes | |
1363 | for (i = 0; i < len; i++) { | |
1364 | b = cmd[i]; | |
1365 | for(j = 0; j < 4; j++) { | |
1366 | for(k = 0; k < 4; k++) { | |
e3dc1e4c MHS |
1367 | if(k == (b & 3)) { |
1368 | ToSend[++ToSendMax] = 0x0f; | |
1369 | } | |
1370 | else { | |
1371 | ToSend[++ToSendMax] = 0x00; | |
1372 | } | |
1e262141 | 1373 | } |
1374 | b >>= 2; | |
1375 | } | |
1376 | } | |
1377 | ||
1378 | // End of Communication | |
1379 | ToSend[++ToSendMax] = 0x00; | |
1380 | ToSend[++ToSendMax] = 0x00; | |
1381 | ToSend[++ToSendMax] = 0xf0; | |
1382 | ToSend[++ToSendMax] = 0x00; | |
1383 | ||
1384 | // Convert from last character reference to length | |
1385 | ToSendMax++; | |
1386 | } | |
1387 | ||
1388 | void ReaderTransmitIClass(uint8_t* frame, int len) | |
1389 | { | |
1390 | int wait = 0; | |
1391 | int samples = 0; | |
1392 | int par = 0; | |
1393 | ||
1394 | // This is tied to other size changes | |
1395 | // uint8_t* frame_addr = ((uint8_t*)BigBuf) + 2024; | |
1396 | CodeIClassCommand(frame,len); | |
1397 | ||
1398 | // Select the card | |
1399 | TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait); | |
1400 | if(trigger) | |
1401 | LED_A_ON(); | |
1402 | ||
1403 | // Store reader command in buffer | |
7bc95e2e | 1404 | if (tracing) LogTrace(frame,len,rsamples,par,TRUE); |
1e262141 | 1405 | } |
1406 | ||
1407 | //----------------------------------------------------------------------------- | |
1408 | // Wait a certain time for tag response | |
1409 | // If a response is captured return TRUE | |
1410 | // If it takes too long return FALSE | |
1411 | //----------------------------------------------------------------------------- | |
1412 | static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer | |
1413 | { | |
1414 | // buffer needs to be 512 bytes | |
1415 | int c; | |
1416 | ||
1417 | // Set FPGA mode to "reader listen mode", no modulation (listen | |
1418 | // only, since we are receiving, not transmitting). | |
1419 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN); | |
1420 | ||
1421 | // Now get the answer from the card | |
1422 | Demod.output = receivedResponse; | |
1423 | Demod.len = 0; | |
1424 | Demod.state = DEMOD_UNSYNCD; | |
1425 | ||
1426 | uint8_t b; | |
1427 | if (elapsed) *elapsed = 0; | |
1428 | ||
1429 | bool skip = FALSE; | |
1430 | ||
1431 | c = 0; | |
1432 | for(;;) { | |
1433 | WDT_HIT(); | |
1434 | ||
1435 | if(BUTTON_PRESS()) return FALSE; | |
1436 | ||
1437 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1438 | AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!! | |
1439 | if (elapsed) (*elapsed)++; | |
1440 | } | |
1441 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
1442 | if(c < timeout) { c++; } else { return FALSE; } | |
1443 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1444 | skip = !skip; | |
1445 | if(skip) continue; | |
1446 | /*if(ManchesterDecoding((b>>4) & 0xf)) { | |
1447 | *samples = ((c - 1) << 3) + 4; | |
1448 | return TRUE; | |
1449 | }*/ | |
1450 | if(ManchesterDecoding(b & 0x0f)) { | |
1451 | *samples = c << 3; | |
1452 | return TRUE; | |
1453 | } | |
1454 | } | |
1455 | } | |
1456 | } | |
1457 | ||
1458 | int ReaderReceiveIClass(uint8_t* receivedAnswer) | |
1459 | { | |
1460 | int samples = 0; | |
1461 | if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return FALSE; | |
7bc95e2e | 1462 | rsamples += samples; |
1463 | if (tracing) LogTrace(receivedAnswer,Demod.len,rsamples,Demod.parityBits,FALSE); | |
1e262141 | 1464 | if(samples == 0) return FALSE; |
1465 | return Demod.len; | |
1466 | } | |
1467 | ||
1468 | // Reader iClass Anticollission | |
1469 | void ReaderIClass(uint8_t arg0) { | |
1e262141 | 1470 | uint8_t act_all[] = { 0x0a }; |
1471 | uint8_t identify[] = { 0x0c }; | |
4ab4336a | 1472 | uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; |
1e262141 | 1473 | |
1474 | uint8_t* resp = (((uint8_t *)BigBuf) + 3560); // was 3560 - tied to other size changes | |
1475 | ||
7cc204bf | 1476 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
1477 | ||
1e262141 | 1478 | // Reset trace buffer |
ff7bb4ef | 1479 | memset(trace, 0x44, RECV_CMD_OFFSET); |
1e262141 | 1480 | traceLen = 0; |
1481 | ||
1482 | // Setup SSC | |
1483 | FpgaSetupSsc(); | |
1484 | // Start from off (no field generated) | |
1485 | // Signal field is off with the appropriate LED | |
cee5a30d | 1486 | LED_D_OFF(); |
1e262141 | 1487 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1488 | SpinDelay(200); | |
1489 | ||
1490 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
1491 | ||
1492 | // Now give it time to spin up. | |
1493 | // Signal field is on with the appropriate LED | |
1494 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); | |
1495 | SpinDelay(200); | |
1496 | ||
1497 | LED_A_ON(); | |
1498 | ||
1499 | for(;;) { | |
4ab4336a | 1500 | |
1501 | if(traceLen > TRACE_SIZE) { | |
1502 | DbpString("Trace full"); | |
1503 | break; | |
1504 | } | |
1505 | ||
1506 | if (BUTTON_PRESS()) break; | |
1e262141 | 1507 | |
1508 | // Send act_all | |
1509 | ReaderTransmitIClass(act_all, 1); | |
1510 | // Card present? | |
1511 | if(ReaderReceiveIClass(resp)) { | |
1512 | ReaderTransmitIClass(identify, 1); | |
4ab4336a | 1513 | if(ReaderReceiveIClass(resp) == 10) { |
1514 | // Select card | |
1515 | memcpy(&select[1],resp,8); | |
1516 | ReaderTransmitIClass(select, sizeof(select)); | |
1517 | ||
1518 | if(ReaderReceiveIClass(resp) == 10) { | |
1519 | Dbprintf(" Selected CSN: %02x %02x %02x %02x %02x %02x %02x %02x", | |
1520 | resp[0], resp[1], resp[2], | |
1521 | resp[3], resp[4], resp[5], | |
1522 | resp[6], resp[7]); | |
1523 | } | |
1524 | // Card selected, whats next... ;-) | |
1e262141 | 1525 | } |
1526 | } | |
1527 | WDT_HIT(); | |
1528 | } | |
1529 | ||
1530 | LED_A_OFF(); | |
cee5a30d | 1531 | } |
1532 | ||
912a3e94 | 1533 |