]> git.zerfleddert.de Git - proxmark3-svn/blame - common/ldscript.common
added eh_frame needed for gcc 4.4.1 or higher
[proxmark3-svn] / common / ldscript.common
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2bfed17d 1/* AT91SAM7S256 has 256k Flash and 64k RAM */
2MEMORY
3{
4 /* Important note: this memory map has the correct origins for all the flash sections.
5 However, this will confuse the currently deployed flash code which expects logical and and not
6 physical addresses and performs no sanity checks at all. If confronted with physical addresses,
7 it will happily erase everything and brick the device. So for the time being translate these addresses
8 down in the objcopy call while updating all the flash code with proper sanity checks, then come
9 back later and fix the addresses. -- Henryk Plötz <henryk@ploetzli.ch> 2009-08-27 */
10 bootphase1 : ORIGIN = 0x00100000, LENGTH = 0x200 /* Phase 1 bootloader: Copies real bootloader to RAM */
11 bootphase2 : ORIGIN = 0x00100200, LENGTH = 0x2000 - 0x200 /* Main bootloader code, stored in Flash, executed from RAM */
12 fpgaimage : ORIGIN = 0x00102000, LENGTH = 64k - 0x2000 /* Place where the FPGA image will end up */
13 osimage : ORIGIN = 0x00110000, LENGTH = 256K - 64k /* Place where the main OS will end up */
8fcbf652 14 ram : ORIGIN = 0x00200000, LENGTH = 64K - 0x20 /* RAM, minus small common area */
15 commonarea : ORIGIN = 0x00200000 + 64K - 0x20, LENGTH = 0x20 /* Communication between bootloader and main OS */
2bfed17d 16}
17
4271e82d 18/* Export some information that can be used from within the firmware */
19_bootphase1_version_pointer = ORIGIN(bootphase1) + LENGTH(bootphase1) - 0x4;
e3ae0257 20_osimage_entry = ORIGIN(osimage);
8fcbf652 21_bootrom_start = ORIGIN(bootphase1);
22_bootrom_end = ORIGIN(bootphase2) + LENGTH(bootphase2);
4271e82d 23_flash_start = ORIGIN(bootphase1);
e3ae0257 24_flash_end = ORIGIN(osimage) + LENGTH(osimage);
25_stack_end = ORIGIN(ram) + LENGTH(ram) - 8;
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