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489ef36c | 1 | //----------------------------------------------------------------------------- |
2 | // Jonathan Westhues, split Nov 2006 | |
3 | // | |
4 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
5 | // at your option, any later version. See the LICENSE.txt file for the text of | |
6 | // the license. | |
7 | //----------------------------------------------------------------------------- | |
abb21530 | 8 | // Routines to support ISO 14443B. This includes both the reader software and |
9 | // the `fake tag' modes. | |
489ef36c | 10 | //----------------------------------------------------------------------------- |
11 | ||
12 | #include "proxmark3.h" | |
13 | #include "apps.h" | |
14 | #include "util.h" | |
15 | #include "string.h" | |
16 | ||
17 | #include "iso14443crc.h" | |
18 | ||
489ef36c | 19 | #define RECEIVE_SAMPLES_TIMEOUT 2000 |
705bfa10 | 20 | #define ISO14443B_DMA_BUFFER_SIZE 256 |
489ef36c | 21 | |
22 | //============================================================================= | |
23 | // An ISO 14443 Type B tag. We listen for commands from the reader, using | |
24 | // a UART kind of thing that's implemented in software. When we get a | |
25 | // frame (i.e., a group of bytes between SOF and EOF), we check the CRC. | |
26 | // If it's good, then we can do something appropriate with it, and send | |
27 | // a response. | |
28 | //============================================================================= | |
29 | ||
30 | //----------------------------------------------------------------------------- | |
31 | // Code up a string of octets at layer 2 (including CRC, we don't generate | |
32 | // that here) so that they can be transmitted to the reader. Doesn't transmit | |
33 | // them yet, just leaves them ready to send in ToSend[]. | |
34 | //----------------------------------------------------------------------------- | |
35 | static void CodeIso14443bAsTag(const uint8_t *cmd, int len) | |
36 | { | |
37 | int i; | |
38 | ||
39 | ToSendReset(); | |
40 | ||
41 | // Transmit a burst of ones, as the initial thing that lets the | |
42 | // reader get phase sync. This (TR1) must be > 80/fs, per spec, | |
43 | // but tag that I've tried (a Paypass) exceeds that by a fair bit, | |
44 | // so I will too. | |
45 | for(i = 0; i < 20; i++) { | |
46 | ToSendStuffBit(1); | |
47 | ToSendStuffBit(1); | |
48 | ToSendStuffBit(1); | |
49 | ToSendStuffBit(1); | |
50 | } | |
51 | ||
52 | // Send SOF. | |
53 | for(i = 0; i < 10; i++) { | |
54 | ToSendStuffBit(0); | |
55 | ToSendStuffBit(0); | |
56 | ToSendStuffBit(0); | |
57 | ToSendStuffBit(0); | |
58 | } | |
59 | for(i = 0; i < 2; i++) { | |
60 | ToSendStuffBit(1); | |
61 | ToSendStuffBit(1); | |
62 | ToSendStuffBit(1); | |
63 | ToSendStuffBit(1); | |
64 | } | |
65 | ||
66 | for(i = 0; i < len; i++) { | |
67 | int j; | |
68 | uint8_t b = cmd[i]; | |
69 | ||
70 | // Start bit | |
71 | ToSendStuffBit(0); | |
72 | ToSendStuffBit(0); | |
73 | ToSendStuffBit(0); | |
74 | ToSendStuffBit(0); | |
75 | ||
76 | // Data bits | |
77 | for(j = 0; j < 8; j++) { | |
78 | if(b & 1) { | |
79 | ToSendStuffBit(1); | |
80 | ToSendStuffBit(1); | |
81 | ToSendStuffBit(1); | |
82 | ToSendStuffBit(1); | |
83 | } else { | |
84 | ToSendStuffBit(0); | |
85 | ToSendStuffBit(0); | |
86 | ToSendStuffBit(0); | |
87 | ToSendStuffBit(0); | |
88 | } | |
89 | b >>= 1; | |
90 | } | |
91 | ||
92 | // Stop bit | |
93 | ToSendStuffBit(1); | |
94 | ToSendStuffBit(1); | |
95 | ToSendStuffBit(1); | |
96 | ToSendStuffBit(1); | |
97 | } | |
98 | ||
abb21530 | 99 | // Send EOF. |
489ef36c | 100 | for(i = 0; i < 10; i++) { |
101 | ToSendStuffBit(0); | |
102 | ToSendStuffBit(0); | |
103 | ToSendStuffBit(0); | |
104 | ToSendStuffBit(0); | |
105 | } | |
abb21530 | 106 | for(i = 0; i < 2; i++) { |
489ef36c | 107 | ToSendStuffBit(1); |
108 | ToSendStuffBit(1); | |
109 | ToSendStuffBit(1); | |
110 | ToSendStuffBit(1); | |
111 | } | |
112 | ||
113 | // Convert from last byte pos to length | |
114 | ToSendMax++; | |
489ef36c | 115 | } |
116 | ||
117 | //----------------------------------------------------------------------------- | |
118 | // The software UART that receives commands from the reader, and its state | |
119 | // variables. | |
120 | //----------------------------------------------------------------------------- | |
121 | static struct { | |
122 | enum { | |
123 | STATE_UNSYNCD, | |
124 | STATE_GOT_FALLING_EDGE_OF_SOF, | |
125 | STATE_AWAITING_START_BIT, | |
36f84d47 | 126 | STATE_RECEIVING_DATA |
489ef36c | 127 | } state; |
128 | uint16_t shiftReg; | |
129 | int bitCnt; | |
130 | int byteCnt; | |
131 | int byteCntMax; | |
132 | int posCnt; | |
133 | uint8_t *output; | |
134 | } Uart; | |
135 | ||
136 | /* Receive & handle a bit coming from the reader. | |
abb21530 | 137 | * |
138 | * This function is called 4 times per bit (every 2 subcarrier cycles). | |
139 | * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us | |
489ef36c | 140 | * |
141 | * LED handling: | |
142 | * LED A -> ON once we have received the SOF and are expecting the rest. | |
143 | * LED A -> OFF once we have received EOF or are in error state or unsynced | |
144 | * | |
145 | * Returns: true if we received a EOF | |
146 | * false if we are still waiting for some more | |
147 | */ | |
36f84d47 | 148 | static RAMFUNC int Handle14443bUartBit(uint8_t bit) |
489ef36c | 149 | { |
150 | switch(Uart.state) { | |
151 | case STATE_UNSYNCD: | |
489ef36c | 152 | if(!bit) { |
153 | // we went low, so this could be the beginning | |
154 | // of an SOF | |
155 | Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF; | |
156 | Uart.posCnt = 0; | |
157 | Uart.bitCnt = 0; | |
158 | } | |
159 | break; | |
160 | ||
161 | case STATE_GOT_FALLING_EDGE_OF_SOF: | |
162 | Uart.posCnt++; | |
abb21530 | 163 | if(Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit |
489ef36c | 164 | if(bit) { |
abb21530 | 165 | if(Uart.bitCnt > 9) { |
489ef36c | 166 | // we've seen enough consecutive |
167 | // zeros that it's a valid SOF | |
168 | Uart.posCnt = 0; | |
169 | Uart.byteCnt = 0; | |
170 | Uart.state = STATE_AWAITING_START_BIT; | |
171 | LED_A_ON(); // Indicate we got a valid SOF | |
172 | } else { | |
173 | // didn't stay down long enough | |
174 | // before going high, error | |
36f84d47 | 175 | Uart.state = STATE_UNSYNCD; |
489ef36c | 176 | } |
177 | } else { | |
178 | // do nothing, keep waiting | |
179 | } | |
180 | Uart.bitCnt++; | |
181 | } | |
182 | if(Uart.posCnt >= 4) Uart.posCnt = 0; | |
abb21530 | 183 | if(Uart.bitCnt > 12) { |
489ef36c | 184 | // Give up if we see too many zeros without |
185 | // a one, too. | |
36f84d47 | 186 | LED_A_OFF(); |
187 | Uart.state = STATE_UNSYNCD; | |
489ef36c | 188 | } |
189 | break; | |
190 | ||
191 | case STATE_AWAITING_START_BIT: | |
192 | Uart.posCnt++; | |
193 | if(bit) { | |
abb21530 | 194 | if(Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs |
489ef36c | 195 | // stayed high for too long between |
196 | // characters, error | |
36f84d47 | 197 | Uart.state = STATE_UNSYNCD; |
489ef36c | 198 | } |
199 | } else { | |
200 | // falling edge, this starts the data byte | |
201 | Uart.posCnt = 0; | |
202 | Uart.bitCnt = 0; | |
203 | Uart.shiftReg = 0; | |
204 | Uart.state = STATE_RECEIVING_DATA; | |
489ef36c | 205 | } |
206 | break; | |
207 | ||
208 | case STATE_RECEIVING_DATA: | |
209 | Uart.posCnt++; | |
210 | if(Uart.posCnt == 2) { | |
211 | // time to sample a bit | |
212 | Uart.shiftReg >>= 1; | |
213 | if(bit) { | |
214 | Uart.shiftReg |= 0x200; | |
215 | } | |
216 | Uart.bitCnt++; | |
217 | } | |
218 | if(Uart.posCnt >= 4) { | |
219 | Uart.posCnt = 0; | |
220 | } | |
221 | if(Uart.bitCnt == 10) { | |
222 | if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001)) | |
223 | { | |
224 | // this is a data byte, with correct | |
225 | // start and stop bits | |
226 | Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff; | |
227 | Uart.byteCnt++; | |
228 | ||
229 | if(Uart.byteCnt >= Uart.byteCntMax) { | |
230 | // Buffer overflowed, give up | |
36f84d47 | 231 | LED_A_OFF(); |
232 | Uart.state = STATE_UNSYNCD; | |
489ef36c | 233 | } else { |
234 | // so get the next byte now | |
235 | Uart.posCnt = 0; | |
236 | Uart.state = STATE_AWAITING_START_BIT; | |
237 | } | |
46734099 | 238 | } else if (Uart.shiftReg == 0x000) { |
489ef36c | 239 | // this is an EOF byte |
240 | LED_A_OFF(); // Finished receiving | |
36f84d47 | 241 | Uart.state = STATE_UNSYNCD; |
22e24700 | 242 | if (Uart.byteCnt != 0) { |
489ef36c | 243 | return TRUE; |
22e24700 | 244 | } |
489ef36c | 245 | } else { |
246 | // this is an error | |
36f84d47 | 247 | LED_A_OFF(); |
46734099 | 248 | Uart.state = STATE_UNSYNCD; |
36f84d47 | 249 | } |
489ef36c | 250 | } |
251 | break; | |
252 | ||
253 | default: | |
36f84d47 | 254 | LED_A_OFF(); |
489ef36c | 255 | Uart.state = STATE_UNSYNCD; |
256 | break; | |
257 | } | |
258 | ||
489ef36c | 259 | return FALSE; |
260 | } | |
261 | ||
36f84d47 | 262 | |
263 | static void UartReset() | |
264 | { | |
265 | Uart.byteCntMax = MAX_FRAME_SIZE; | |
266 | Uart.state = STATE_UNSYNCD; | |
267 | Uart.byteCnt = 0; | |
268 | Uart.bitCnt = 0; | |
269 | } | |
270 | ||
271 | ||
272 | static void UartInit(uint8_t *data) | |
273 | { | |
274 | Uart.output = data; | |
275 | UartReset(); | |
276 | } | |
277 | ||
278 | ||
489ef36c | 279 | //----------------------------------------------------------------------------- |
280 | // Receive a command (from the reader to us, where we are the simulated tag), | |
281 | // and store it in the given buffer, up to the given maximum length. Keeps | |
282 | // spinning, waiting for a well-framed command, until either we get one | |
283 | // (returns TRUE) or someone presses the pushbutton on the board (FALSE). | |
284 | // | |
285 | // Assume that we're called with the SSC (to the FPGA) and ADC path set | |
286 | // correctly. | |
287 | //----------------------------------------------------------------------------- | |
36f84d47 | 288 | static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) |
489ef36c | 289 | { |
abb21530 | 290 | // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen |
489ef36c | 291 | // only, since we are receiving, not transmitting). |
292 | // Signal field is off with the appropriate LED | |
293 | LED_D_OFF(); | |
294 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION); | |
295 | ||
489ef36c | 296 | // Now run a `software UART' on the stream of incoming samples. |
36f84d47 | 297 | UartInit(received); |
489ef36c | 298 | |
299 | for(;;) { | |
300 | WDT_HIT(); | |
301 | ||
302 | if(BUTTON_PRESS()) return FALSE; | |
303 | ||
489ef36c | 304 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
305 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
36f84d47 | 306 | for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) { |
307 | if(Handle14443bUartBit(b & mask)) { | |
489ef36c | 308 | *len = Uart.byteCnt; |
309 | return TRUE; | |
310 | } | |
311 | } | |
312 | } | |
313 | } | |
36f84d47 | 314 | |
315 | return FALSE; | |
489ef36c | 316 | } |
317 | ||
318 | //----------------------------------------------------------------------------- | |
319 | // Main loop of simulated tag: receive commands from reader, decide what | |
320 | // response to send, and send it. | |
321 | //----------------------------------------------------------------------------- | |
abb21530 | 322 | void SimulateIso14443bTag(void) |
489ef36c | 323 | { |
36f84d47 | 324 | // the only commands we understand is REQB, AFI=0, Select All, N=0: |
489ef36c | 325 | static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; |
36f84d47 | 326 | // ... and REQB, AFI=0, Normal Request, N=0: |
327 | static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; | |
328 | ||
329 | // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922, | |
abb21530 | 330 | // supports only 106kBit/s in both directions, max frame size = 32Bytes, |
331 | // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported: | |
489ef36c | 332 | static const uint8_t response1[] = { |
333 | 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22, | |
334 | 0x00, 0x21, 0x85, 0x5e, 0xd7 | |
335 | }; | |
336 | ||
99cf19d9 | 337 | uint8_t parity[MAX_PARITY_SIZE]; |
338 | ||
339 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
340 | ||
36f84d47 | 341 | clear_trace(); |
342 | set_tracing(TRUE); | |
343 | ||
344 | const uint8_t *resp; | |
345 | uint8_t *respCode; | |
346 | uint16_t respLen, respCodeLen; | |
17ad0e09 | 347 | |
348 | // allocate command receive buffer | |
99cf19d9 | 349 | BigBuf_free(); |
17ad0e09 | 350 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); |
489ef36c | 351 | |
99cf19d9 | 352 | uint16_t len; |
353 | uint16_t cmdsRecvd = 0; | |
354 | ||
abb21530 | 355 | // prepare the (only one) tag answer: |
489ef36c | 356 | CodeIso14443bAsTag(response1, sizeof(response1)); |
36f84d47 | 357 | uint8_t *resp1Code = BigBuf_malloc(ToSendMax); |
358 | memcpy(resp1Code, ToSend, ToSendMax); | |
359 | uint16_t resp1CodeLen = ToSendMax; | |
489ef36c | 360 | |
361 | // We need to listen to the high-frequency, peak-detected path. | |
362 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
363 | FpgaSetupSsc(); | |
364 | ||
365 | cmdsRecvd = 0; | |
366 | ||
367 | for(;;) { | |
489ef36c | 368 | |
36f84d47 | 369 | if(!GetIso14443bCommandFromReader(receivedCmd, &len)) { |
489ef36c | 370 | Dbprintf("button pressed, received %d commands", cmdsRecvd); |
371 | break; | |
372 | } | |
373 | ||
36f84d47 | 374 | if (tracing) { |
36f84d47 | 375 | LogTrace(receivedCmd, len, 0, 0, parity, TRUE); |
376 | } | |
489ef36c | 377 | |
36f84d47 | 378 | // Good, look at the command now. |
379 | if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0) | |
380 | || (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) { | |
381 | resp = response1; | |
382 | respLen = sizeof(response1); | |
383 | respCode = resp1Code; | |
384 | respCodeLen = resp1CodeLen; | |
489ef36c | 385 | } else { |
386 | Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd); | |
387 | // And print whether the CRC fails, just for good measure | |
36f84d47 | 388 | uint8_t b1, b2; |
489ef36c | 389 | ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2); |
390 | if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) { | |
391 | // Not so good, try again. | |
392 | DbpString("+++CRC fail"); | |
393 | } else { | |
394 | DbpString("CRC passes"); | |
395 | } | |
396 | break; | |
397 | } | |
398 | ||
489ef36c | 399 | cmdsRecvd++; |
400 | ||
401 | if(cmdsRecvd > 0x30) { | |
402 | DbpString("many commands later..."); | |
403 | break; | |
404 | } | |
405 | ||
36f84d47 | 406 | if(respCodeLen <= 0) continue; |
489ef36c | 407 | |
408 | // Modulate BPSK | |
409 | // Signal field is off with the appropriate LED | |
410 | LED_D_OFF(); | |
411 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK); | |
412 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
413 | FpgaSetupSsc(); | |
414 | ||
17ad0e09 | 415 | uint8_t c; |
416 | // clear receiving shift register and holding register | |
417 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
418 | c = AT91C_BASE_SSC->SSC_RHR; (void) c; | |
419 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
420 | c = AT91C_BASE_SSC->SSC_RHR; (void) c; | |
421 | ||
422 | // Clear TXRDY: | |
423 | AT91C_BASE_SSC->SSC_THR = 0x00; | |
424 | ||
489ef36c | 425 | // Transmit the response. |
17ad0e09 | 426 | uint16_t FpgaSendQueueDelay = 0; |
36f84d47 | 427 | uint16_t i = 0; |
17ad0e09 | 428 | for(;i < respCodeLen; ) { |
489ef36c | 429 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
17ad0e09 | 430 | AT91C_BASE_SSC->SSC_THR = respCode[i++]; |
431 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
489ef36c | 432 | } |
17ad0e09 | 433 | if(BUTTON_PRESS()) break; |
434 | } | |
435 | ||
436 | // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: | |
437 | uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; | |
438 | for (i = 0; i <= fpga_queued_bits/8 + 1; ) { | |
439 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
440 | AT91C_BASE_SSC->SSC_THR = 0x00; | |
441 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
442 | i++; | |
489ef36c | 443 | } |
444 | } | |
36f84d47 | 445 | |
446 | // trace the response: | |
99cf19d9 | 447 | if (tracing) LogTrace(resp, respLen, 0, 0, parity, FALSE); |
489ef36c | 448 | } |
99cf19d9 | 449 | //FpgaDisableSscDma(); |
489ef36c | 450 | } |
451 | ||
452 | //============================================================================= | |
453 | // An ISO 14443 Type B reader. We take layer two commands, code them | |
454 | // appropriately, and then send them to the tag. We then listen for the | |
455 | // tag's response, which we leave in the buffer to be demodulated on the | |
456 | // PC side. | |
457 | //============================================================================= | |
458 | ||
459 | static struct { | |
460 | enum { | |
461 | DEMOD_UNSYNCD, | |
462 | DEMOD_PHASE_REF_TRAINING, | |
463 | DEMOD_AWAITING_FALLING_EDGE_OF_SOF, | |
464 | DEMOD_GOT_FALLING_EDGE_OF_SOF, | |
465 | DEMOD_AWAITING_START_BIT, | |
36f84d47 | 466 | DEMOD_RECEIVING_DATA |
489ef36c | 467 | } state; |
468 | int bitCount; | |
469 | int posCount; | |
470 | int thisBit; | |
abb21530 | 471 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. |
489ef36c | 472 | int metric; |
473 | int metricN; | |
abb21530 | 474 | */ |
489ef36c | 475 | uint16_t shiftReg; |
476 | uint8_t *output; | |
477 | int len; | |
478 | int sumI; | |
479 | int sumQ; | |
480 | } Demod; | |
481 | ||
482 | /* | |
483 | * Handles reception of a bit from the tag | |
484 | * | |
abb21530 | 485 | * This function is called 2 times per bit (every 4 subcarrier cycles). |
486 | * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us | |
487 | * | |
489ef36c | 488 | * LED handling: |
489 | * LED C -> ON once we have received the SOF and are expecting the rest. | |
490 | * LED C -> OFF once we have received EOF or are unsynced | |
491 | * | |
492 | * Returns: true if we received a EOF | |
493 | * false if we are still waiting for some more | |
494 | * | |
495 | */ | |
abb21530 | 496 | static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) |
489ef36c | 497 | { |
498 | int v; | |
499 | ||
51d4f6f1 | 500 | // The soft decision on the bit uses an estimate of just the |
501 | // quadrant of the reference angle, not the exact angle. | |
489ef36c | 502 | #define MAKE_SOFT_DECISION() { \ |
503 | if(Demod.sumI > 0) { \ | |
504 | v = ci; \ | |
505 | } else { \ | |
506 | v = -ci; \ | |
507 | } \ | |
508 | if(Demod.sumQ > 0) { \ | |
509 | v += cq; \ | |
510 | } else { \ | |
511 | v -= cq; \ | |
512 | } \ | |
513 | } | |
514 | ||
abb21530 | 515 | #define SUBCARRIER_DETECT_THRESHOLD 8 |
516 | ||
517 | // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq) | |
518 | /* #define CHECK_FOR_SUBCARRIER() { \ | |
519 | v = ci; \ | |
520 | if(v < 0) v = -v; \ | |
521 | if(cq > 0) { \ | |
522 | v += cq; \ | |
523 | } else { \ | |
524 | v -= cq; \ | |
525 | } \ | |
526 | } | |
527 | */ | |
528 | // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq))) | |
529 | #define CHECK_FOR_SUBCARRIER() { \ | |
530 | if(ci < 0) { \ | |
531 | if(cq < 0) { /* ci < 0, cq < 0 */ \ | |
532 | if (cq < ci) { \ | |
533 | v = -cq - (ci >> 1); \ | |
534 | } else { \ | |
535 | v = -ci - (cq >> 1); \ | |
536 | } \ | |
537 | } else { /* ci < 0, cq >= 0 */ \ | |
538 | if (cq < -ci) { \ | |
539 | v = -ci + (cq >> 1); \ | |
540 | } else { \ | |
541 | v = cq - (ci >> 1); \ | |
542 | } \ | |
543 | } \ | |
544 | } else { \ | |
545 | if(cq < 0) { /* ci >= 0, cq < 0 */ \ | |
546 | if (-cq < ci) { \ | |
547 | v = ci - (cq >> 1); \ | |
548 | } else { \ | |
549 | v = -cq + (ci >> 1); \ | |
550 | } \ | |
551 | } else { /* ci >= 0, cq >= 0 */ \ | |
552 | if (cq < ci) { \ | |
553 | v = ci + (cq >> 1); \ | |
554 | } else { \ | |
555 | v = cq + (ci >> 1); \ | |
556 | } \ | |
557 | } \ | |
558 | } \ | |
559 | } | |
560 | ||
489ef36c | 561 | switch(Demod.state) { |
562 | case DEMOD_UNSYNCD: | |
abb21530 | 563 | CHECK_FOR_SUBCARRIER(); |
564 | if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected | |
489ef36c | 565 | Demod.state = DEMOD_PHASE_REF_TRAINING; |
abb21530 | 566 | Demod.sumI = ci; |
567 | Demod.sumQ = cq; | |
568 | Demod.posCount = 1; | |
489ef36c | 569 | } |
570 | break; | |
571 | ||
572 | case DEMOD_PHASE_REF_TRAINING: | |
573 | if(Demod.posCount < 8) { | |
abb21530 | 574 | CHECK_FOR_SUBCARRIER(); |
575 | if (v > SUBCARRIER_DETECT_THRESHOLD) { | |
576 | // set the reference phase (will code a logic '1') by averaging over 32 1/fs. | |
577 | // note: synchronization time > 80 1/fs | |
489ef36c | 578 | Demod.sumI += ci; |
579 | Demod.sumQ += cq; | |
abb21530 | 580 | Demod.posCount++; |
581 | } else { // subcarrier lost | |
489ef36c | 582 | Demod.state = DEMOD_UNSYNCD; |
abb21530 | 583 | } |
489ef36c | 584 | } else { |
489ef36c | 585 | Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF; |
489ef36c | 586 | } |
489ef36c | 587 | break; |
588 | ||
589 | case DEMOD_AWAITING_FALLING_EDGE_OF_SOF: | |
590 | MAKE_SOFT_DECISION(); | |
abb21530 | 591 | if(v < 0) { // logic '0' detected |
489ef36c | 592 | Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF; |
abb21530 | 593 | Demod.posCount = 0; // start of SOF sequence |
489ef36c | 594 | } else { |
abb21530 | 595 | if(Demod.posCount > 200/4) { // maximum length of TR1 = 200 1/fs |
489ef36c | 596 | Demod.state = DEMOD_UNSYNCD; |
597 | } | |
598 | } | |
599 | Demod.posCount++; | |
600 | break; | |
601 | ||
602 | case DEMOD_GOT_FALLING_EDGE_OF_SOF: | |
abb21530 | 603 | Demod.posCount++; |
489ef36c | 604 | MAKE_SOFT_DECISION(); |
605 | if(v > 0) { | |
abb21530 | 606 | if(Demod.posCount < 9*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges |
489ef36c | 607 | Demod.state = DEMOD_UNSYNCD; |
608 | } else { | |
609 | LED_C_ON(); // Got SOF | |
610 | Demod.state = DEMOD_AWAITING_START_BIT; | |
611 | Demod.posCount = 0; | |
612 | Demod.len = 0; | |
abb21530 | 613 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. |
489ef36c | 614 | Demod.metricN = 0; |
615 | Demod.metric = 0; | |
abb21530 | 616 | */ |
489ef36c | 617 | } |
618 | } else { | |
abb21530 | 619 | if(Demod.posCount > 12*2) { // low phase of SOF too long (> 12 etu) |
489ef36c | 620 | Demod.state = DEMOD_UNSYNCD; |
47286d89 | 621 | LED_C_OFF(); |
489ef36c | 622 | } |
623 | } | |
489ef36c | 624 | break; |
625 | ||
626 | case DEMOD_AWAITING_START_BIT: | |
abb21530 | 627 | Demod.posCount++; |
489ef36c | 628 | MAKE_SOFT_DECISION(); |
629 | if(v > 0) { | |
abb21530 | 630 | if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs |
489ef36c | 631 | Demod.state = DEMOD_UNSYNCD; |
47286d89 | 632 | LED_C_OFF(); |
489ef36c | 633 | } |
abb21530 | 634 | } else { // start bit detected |
489ef36c | 635 | Demod.bitCount = 0; |
abb21530 | 636 | Demod.posCount = 1; // this was the first half |
489ef36c | 637 | Demod.thisBit = v; |
638 | Demod.shiftReg = 0; | |
639 | Demod.state = DEMOD_RECEIVING_DATA; | |
640 | } | |
641 | break; | |
642 | ||
643 | case DEMOD_RECEIVING_DATA: | |
644 | MAKE_SOFT_DECISION(); | |
abb21530 | 645 | if(Demod.posCount == 0) { // first half of bit |
489ef36c | 646 | Demod.thisBit = v; |
647 | Demod.posCount = 1; | |
abb21530 | 648 | } else { // second half of bit |
489ef36c | 649 | Demod.thisBit += v; |
650 | ||
abb21530 | 651 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. |
489ef36c | 652 | if(Demod.thisBit > 0) { |
653 | Demod.metric += Demod.thisBit; | |
654 | } else { | |
655 | Demod.metric -= Demod.thisBit; | |
656 | } | |
657 | (Demod.metricN)++; | |
abb21530 | 658 | */ |
489ef36c | 659 | |
660 | Demod.shiftReg >>= 1; | |
abb21530 | 661 | if(Demod.thisBit > 0) { // logic '1' |
489ef36c | 662 | Demod.shiftReg |= 0x200; |
663 | } | |
664 | ||
665 | Demod.bitCount++; | |
666 | if(Demod.bitCount == 10) { | |
667 | uint16_t s = Demod.shiftReg; | |
abb21530 | 668 | if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0' |
489ef36c | 669 | uint8_t b = (s >> 1); |
670 | Demod.output[Demod.len] = b; | |
671 | Demod.len++; | |
672 | Demod.state = DEMOD_AWAITING_START_BIT; | |
489ef36c | 673 | } else { |
674 | Demod.state = DEMOD_UNSYNCD; | |
47286d89 | 675 | LED_C_OFF(); |
676 | if(s == 0x000) { | |
abb21530 | 677 | // This is EOF (start, stop and all data bits == '0' |
47286d89 | 678 | return TRUE; |
679 | } | |
489ef36c | 680 | } |
681 | } | |
682 | Demod.posCount = 0; | |
683 | } | |
684 | break; | |
685 | ||
686 | default: | |
687 | Demod.state = DEMOD_UNSYNCD; | |
47286d89 | 688 | LED_C_OFF(); |
489ef36c | 689 | break; |
690 | } | |
691 | ||
489ef36c | 692 | return FALSE; |
693 | } | |
694 | ||
695 | ||
696 | static void DemodReset() | |
697 | { | |
698 | // Clear out the state of the "UART" that receives from the tag. | |
699 | Demod.len = 0; | |
700 | Demod.state = DEMOD_UNSYNCD; | |
abb21530 | 701 | Demod.posCount = 0; |
489ef36c | 702 | memset(Demod.output, 0x00, MAX_FRAME_SIZE); |
703 | } | |
704 | ||
705 | ||
706 | static void DemodInit(uint8_t *data) | |
707 | { | |
708 | Demod.output = data; | |
709 | DemodReset(); | |
710 | } | |
711 | ||
712 | ||
489ef36c | 713 | /* |
714 | * Demodulate the samples we received from the tag, also log to tracebuffer | |
489ef36c | 715 | * quiet: set to 'TRUE' to disable debug output |
716 | */ | |
abb21530 | 717 | static void GetSamplesFor14443bDemod(int n, bool quiet) |
489ef36c | 718 | { |
719 | int max = 0; | |
abb21530 | 720 | bool gotFrame = FALSE; |
489ef36c | 721 | int lastRxCounter, ci, cq, samples = 0; |
722 | ||
723 | // Allocate memory from BigBuf for some buffers | |
724 | // free all previous allocations first | |
725 | BigBuf_free(); | |
726 | ||
727 | // The response (tag -> reader) that we're receiving. | |
99cf19d9 | 728 | uint8_t *resp = BigBuf_malloc(MAX_FRAME_SIZE); |
489ef36c | 729 | |
730 | // The DMA buffer, used to stream samples from the FPGA | |
705bfa10 | 731 | int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); |
489ef36c | 732 | |
733 | // Set up the demodulator for tag -> reader responses. | |
99cf19d9 | 734 | DemodInit(resp); |
489ef36c | 735 | |
736 | // Setup and start DMA. | |
705bfa10 | 737 | FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); |
489ef36c | 738 | |
739 | int8_t *upTo = dmaBuf; | |
705bfa10 | 740 | lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; |
489ef36c | 741 | |
742 | // Signal field is ON with the appropriate LED: | |
abb21530 | 743 | LED_D_ON(); |
489ef36c | 744 | // And put the FPGA in the appropriate mode |
22e24700 | 745 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); |
99cf19d9 | 746 | SpinDelayUs(151); // T0 time between reader send, tag answer. 151us. |
489ef36c | 747 | |
748 | for(;;) { | |
749 | int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR; | |
750 | if(behindBy > max) max = behindBy; | |
751 | ||
705bfa10 | 752 | while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1)) > 2) { |
489ef36c | 753 | ci = upTo[0]; |
754 | cq = upTo[1]; | |
755 | upTo += 2; | |
705bfa10 | 756 | if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { |
489ef36c | 757 | upTo = dmaBuf; |
758 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo; | |
705bfa10 | 759 | AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; |
489ef36c | 760 | } |
761 | lastRxCounter -= 2; | |
762 | if(lastRxCounter <= 0) { | |
705bfa10 | 763 | lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; |
489ef36c | 764 | } |
765 | ||
766 | samples += 2; | |
767 | ||
abb21530 | 768 | if(Handle14443bSamplesDemod(ci, cq)) { |
769 | gotFrame = TRUE; | |
51d4f6f1 | 770 | break; |
489ef36c | 771 | } |
abb21530 | 772 | } |
489ef36c | 773 | |
abb21530 | 774 | if(samples > n || gotFrame) { |
489ef36c | 775 | break; |
776 | } | |
777 | } | |
abb21530 | 778 | |
489ef36c | 779 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; |
abb21530 | 780 | |
781 | if (!quiet) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max, samples, gotFrame, Demod.len, Demod.sumI, Demod.sumQ); | |
489ef36c | 782 | //Tracing |
783 | if (tracing && Demod.len > 0) { | |
784 | uint8_t parity[MAX_PARITY_SIZE]; | |
489ef36c | 785 | LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE); |
786 | } | |
787 | } | |
788 | ||
789 | ||
489ef36c | 790 | //----------------------------------------------------------------------------- |
791 | // Transmit the command (to the tag) that was placed in ToSend[]. | |
792 | //----------------------------------------------------------------------------- | |
abb21530 | 793 | static void TransmitFor14443b(void) |
489ef36c | 794 | { |
795 | int c; | |
796 | ||
797 | FpgaSetupSsc(); | |
798 | ||
799 | while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
800 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
801 | } | |
802 | ||
803 | // Signal field is ON with the appropriate Red LED | |
804 | LED_D_ON(); | |
805 | // Signal we are transmitting with the Green LED | |
806 | LED_B_ON(); | |
abb21530 | 807 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); |
489ef36c | 808 | |
809 | for(c = 0; c < 10;) { | |
810 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
811 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
812 | c++; | |
813 | } | |
814 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
815 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
816 | (void)r; | |
817 | } | |
818 | WDT_HIT(); | |
819 | } | |
820 | ||
821 | c = 0; | |
822 | for(;;) { | |
823 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
824 | AT91C_BASE_SSC->SSC_THR = ToSend[c]; | |
825 | c++; | |
826 | if(c >= ToSendMax) { | |
827 | break; | |
828 | } | |
829 | } | |
830 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
831 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
832 | (void)r; | |
833 | } | |
834 | WDT_HIT(); | |
835 | } | |
836 | LED_B_OFF(); // Finished sending | |
837 | } | |
838 | ||
839 | ||
840 | //----------------------------------------------------------------------------- | |
841 | // Code a layer 2 command (string of octets, including CRC) into ToSend[], | |
abb21530 | 842 | // so that it is ready to transmit to the tag using TransmitFor14443b(). |
489ef36c | 843 | //----------------------------------------------------------------------------- |
844 | static void CodeIso14443bAsReader(const uint8_t *cmd, int len) | |
845 | { | |
846 | int i, j; | |
847 | uint8_t b; | |
848 | ||
849 | ToSendReset(); | |
850 | ||
851 | // Establish initial reference level | |
852 | for(i = 0; i < 40; i++) { | |
853 | ToSendStuffBit(1); | |
854 | } | |
855 | // Send SOF | |
856 | for(i = 0; i < 10; i++) { | |
857 | ToSendStuffBit(0); | |
858 | } | |
859 | ||
860 | for(i = 0; i < len; i++) { | |
861 | // Stop bits/EGT | |
862 | ToSendStuffBit(1); | |
863 | ToSendStuffBit(1); | |
864 | // Start bit | |
865 | ToSendStuffBit(0); | |
866 | // Data bits | |
867 | b = cmd[i]; | |
868 | for(j = 0; j < 8; j++) { | |
869 | if(b & 1) { | |
870 | ToSendStuffBit(1); | |
871 | } else { | |
872 | ToSendStuffBit(0); | |
873 | } | |
874 | b >>= 1; | |
875 | } | |
876 | } | |
877 | // Send EOF | |
878 | ToSendStuffBit(1); | |
879 | for(i = 0; i < 10; i++) { | |
880 | ToSendStuffBit(0); | |
881 | } | |
882 | for(i = 0; i < 8; i++) { | |
883 | ToSendStuffBit(1); | |
884 | } | |
885 | ||
886 | // And then a little more, to make sure that the last character makes | |
887 | // it out before we switch to rx mode. | |
888 | for(i = 0; i < 24; i++) { | |
889 | ToSendStuffBit(1); | |
890 | } | |
891 | ||
892 | // Convert from last character reference to length | |
893 | ToSendMax++; | |
894 | } | |
895 | ||
896 | ||
489ef36c | 897 | /** |
898 | Convenience function to encode, transmit and trace iso 14443b comms | |
899 | **/ | |
900 | static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len) | |
901 | { | |
902 | CodeIso14443bAsReader(cmd, len); | |
abb21530 | 903 | TransmitFor14443b(); |
489ef36c | 904 | if (tracing) { |
905 | uint8_t parity[MAX_PARITY_SIZE]; | |
489ef36c | 906 | LogTrace(cmd,len, 0, 0, parity, TRUE); |
907 | } | |
908 | } | |
909 | ||
910 | ||
911 | //----------------------------------------------------------------------------- | |
abb21530 | 912 | // Read a SRI512 ISO 14443B tag. |
489ef36c | 913 | // |
914 | // SRI512 tags are just simple memory tags, here we're looking at making a dump | |
915 | // of the contents of the memory. No anticollision algorithm is done, we assume | |
916 | // we have a single tag in the field. | |
917 | // | |
918 | // I tried to be systematic and check every answer of the tag, every CRC, etc... | |
919 | //----------------------------------------------------------------------------- | |
abb21530 | 920 | void ReadSTMemoryIso14443b(uint32_t dwLast) |
489ef36c | 921 | { |
17ad0e09 | 922 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
99cf19d9 | 923 | BigBuf_free(); |
924 | ||
489ef36c | 925 | clear_trace(); |
926 | set_tracing(TRUE); | |
927 | ||
928 | uint8_t i = 0x00; | |
929 | ||
489ef36c | 930 | // Make sure that we start from off, since the tags are stateful; |
931 | // confusing things will happen if we don't reset them between reads. | |
932 | LED_D_OFF(); | |
933 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
99cf19d9 | 934 | SpinDelay(200); |
935 | ||
489ef36c | 936 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
937 | FpgaSetupSsc(); | |
938 | ||
939 | // Now give it time to spin up. | |
940 | // Signal field is on with the appropriate LED | |
941 | LED_D_ON(); | |
22e24700 | 942 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); |
489ef36c | 943 | SpinDelay(200); |
944 | ||
945 | // First command: wake up the tag using the INITIATE command | |
51d4f6f1 | 946 | uint8_t cmd1[] = {0x06, 0x00, 0x97, 0x5b}; |
489ef36c | 947 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); |
abb21530 | 948 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
489ef36c | 949 | |
950 | if (Demod.len == 0) { | |
22e24700 | 951 | DbpString("No response from tag"); |
952 | return; | |
489ef36c | 953 | } else { |
705bfa10 | 954 | Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x", |
955 | Demod.output[0], Demod.output[1], Demod.output[2]); | |
489ef36c | 956 | } |
705bfa10 | 957 | |
489ef36c | 958 | // There is a response, SELECT the uid |
959 | DbpString("Now SELECT tag:"); | |
960 | cmd1[0] = 0x0E; // 0x0E is SELECT | |
961 | cmd1[1] = Demod.output[0]; | |
962 | ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); | |
963 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); | |
abb21530 | 964 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
489ef36c | 965 | if (Demod.len != 3) { |
22e24700 | 966 | Dbprintf("Expected 3 bytes from tag, got %d", Demod.len); |
967 | return; | |
489ef36c | 968 | } |
969 | // Check the CRC of the answer: | |
970 | ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]); | |
971 | if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) { | |
22e24700 | 972 | DbpString("CRC Error reading select response."); |
973 | return; | |
489ef36c | 974 | } |
975 | // Check response from the tag: should be the same UID as the command we just sent: | |
976 | if (cmd1[1] != Demod.output[0]) { | |
22e24700 | 977 | Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]); |
978 | return; | |
489ef36c | 979 | } |
705bfa10 | 980 | |
489ef36c | 981 | // Tag is now selected, |
982 | // First get the tag's UID: | |
983 | cmd1[0] = 0x0B; | |
984 | ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]); | |
985 | CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one | |
abb21530 | 986 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
489ef36c | 987 | if (Demod.len != 10) { |
22e24700 | 988 | Dbprintf("Expected 10 bytes from tag, got %d", Demod.len); |
989 | return; | |
489ef36c | 990 | } |
991 | // The check the CRC of the answer (use cmd1 as temporary variable): | |
992 | ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]); | |
51d4f6f1 | 993 | if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) { |
22e24700 | 994 | Dbprintf("CRC Error reading block! Expected: %04x got: %04x", |
705bfa10 | 995 | (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]); |
489ef36c | 996 | // Do not return;, let's go on... (we should retry, maybe ?) |
997 | } | |
998 | Dbprintf("Tag UID (64 bits): %08x %08x", | |
705bfa10 | 999 | (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4], |
1000 | (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]); | |
489ef36c | 1001 | |
1002 | // Now loop to read all 16 blocks, address from 0 to last block | |
132a0217 | 1003 | Dbprintf("Tag memory dump, block 0 to %d", dwLast); |
489ef36c | 1004 | cmd1[0] = 0x08; |
1005 | i = 0x00; | |
1006 | dwLast++; | |
1007 | for (;;) { | |
1008 | if (i == dwLast) { | |
1009 | DbpString("System area block (0xff):"); | |
1010 | i = 0xff; | |
1011 | } | |
1012 | cmd1[1] = i; | |
1013 | ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); | |
1014 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); | |
abb21530 | 1015 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
489ef36c | 1016 | if (Demod.len != 6) { // Check if we got an answer from the tag |
1017 | DbpString("Expected 6 bytes from tag, got less..."); | |
1018 | return; | |
1019 | } | |
1020 | // The check the CRC of the answer (use cmd1 as temporary variable): | |
1021 | ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]); | |
1022 | if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) { | |
132a0217 | 1023 | Dbprintf("CRC Error reading block! Expected: %04x got: %04x", |
705bfa10 | 1024 | (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]); |
489ef36c | 1025 | // Do not return;, let's go on... (we should retry, maybe ?) |
1026 | } | |
1027 | // Now print out the memory location: | |
22e24700 | 1028 | Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i, |
705bfa10 | 1029 | (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], |
17ad0e09 | 1030 | (Demod.output[4]<<8)+Demod.output[5]); |
1031 | if (i == 0xff) { | |
1032 | break; | |
1033 | } | |
489ef36c | 1034 | i++; |
1035 | } | |
1036 | } | |
1037 | ||
1038 | ||
1039 | //============================================================================= | |
1040 | // Finally, the `sniffer' combines elements from both the reader and | |
1041 | // simulated tag, to show both sides of the conversation. | |
1042 | //============================================================================= | |
1043 | ||
1044 | //----------------------------------------------------------------------------- | |
1045 | // Record the sequence of commands sent by the reader to the tag, with | |
1046 | // triggering so that we start recording at the point that the tag is moved | |
1047 | // near the reader. | |
1048 | //----------------------------------------------------------------------------- | |
1049 | /* | |
1050 | * Memory usage for this function, (within BigBuf) | |
47286d89 | 1051 | * Last Received command (reader->tag) - MAX_FRAME_SIZE |
1052 | * Last Received command (tag->reader) - MAX_FRAME_SIZE | |
705bfa10 | 1053 | * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE |
47286d89 | 1054 | * Demodulated samples received - all the rest |
489ef36c | 1055 | */ |
abb21530 | 1056 | void RAMFUNC SnoopIso14443b(void) |
489ef36c | 1057 | { |
1058 | // We won't start recording the frames that we acquire until we trigger; | |
1059 | // a good trigger condition to get started is probably when we see a | |
1060 | // response from the tag. | |
47286d89 | 1061 | int triggered = TRUE; // TODO: set and evaluate trigger condition |
489ef36c | 1062 | |
1063 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
1064 | BigBuf_free(); | |
1065 | ||
1066 | clear_trace(); | |
1067 | set_tracing(TRUE); | |
1068 | ||
1069 | // The DMA buffer, used to stream samples from the FPGA | |
705bfa10 | 1070 | int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); |
489ef36c | 1071 | int lastRxCounter; |
1072 | int8_t *upTo; | |
1073 | int ci, cq; | |
1074 | int maxBehindBy = 0; | |
1075 | ||
1076 | // Count of samples received so far, so that we can include timing | |
1077 | // information in the trace buffer. | |
1078 | int samples = 0; | |
1079 | ||
1080 | DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); | |
1081 | UartInit(BigBuf_malloc(MAX_FRAME_SIZE)); | |
1082 | ||
1083 | // Print some debug information about the buffer sizes | |
1084 | Dbprintf("Snooping buffers initialized:"); | |
1085 | Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen()); | |
1086 | Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE); | |
1087 | Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE); | |
705bfa10 | 1088 | Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE); |
489ef36c | 1089 | |
abb21530 | 1090 | // Signal field is off, no reader signal, no tag signal |
1091 | LEDsoff(); | |
489ef36c | 1092 | |
1093 | // And put the FPGA in the appropriate mode | |
22e24700 | 1094 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP); |
489ef36c | 1095 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
1096 | ||
1097 | // Setup for the DMA. | |
1098 | FpgaSetupSsc(); | |
1099 | upTo = dmaBuf; | |
705bfa10 | 1100 | lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; |
1101 | FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); | |
489ef36c | 1102 | uint8_t parity[MAX_PARITY_SIZE]; |
5b95953d | 1103 | |
f53020e7 | 1104 | bool TagIsActive = FALSE; |
1105 | bool ReaderIsActive = FALSE; | |
489ef36c | 1106 | |
1107 | // And now we loop, receiving samples. | |
1108 | for(;;) { | |
1109 | int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & | |
705bfa10 | 1110 | (ISO14443B_DMA_BUFFER_SIZE-1); |
489ef36c | 1111 | if(behindBy > maxBehindBy) { |
1112 | maxBehindBy = behindBy; | |
489ef36c | 1113 | } |
abb21530 | 1114 | |
489ef36c | 1115 | if(behindBy < 2) continue; |
1116 | ||
1117 | ci = upTo[0]; | |
1118 | cq = upTo[1]; | |
1119 | upTo += 2; | |
1120 | lastRxCounter -= 2; | |
705bfa10 | 1121 | if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { |
489ef36c | 1122 | upTo = dmaBuf; |
705bfa10 | 1123 | lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; |
489ef36c | 1124 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; |
705bfa10 | 1125 | AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; |
51d4f6f1 | 1126 | WDT_HIT(); |
705bfa10 | 1127 | if(behindBy > (9*ISO14443B_DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not? |
132a0217 | 1128 | Dbprintf("blew circular buffer! behindBy=%d", behindBy); |
51d4f6f1 | 1129 | break; |
abb21530 | 1130 | } |
1131 | if(!tracing) { | |
1132 | DbpString("Reached trace limit"); | |
1133 | break; | |
1134 | } | |
1135 | if(BUTTON_PRESS()) { | |
1136 | DbpString("cancelled"); | |
1137 | break; | |
1138 | } | |
489ef36c | 1139 | } |
1140 | ||
1141 | samples += 2; | |
1142 | ||
47286d89 | 1143 | if (!TagIsActive) { // no need to try decoding reader data if the tag is sending |
abb21530 | 1144 | if(Handle14443bUartBit(ci & 0x01)) { |
489ef36c | 1145 | if(triggered && tracing) { |
51d4f6f1 | 1146 | LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); |
489ef36c | 1147 | } |
489ef36c | 1148 | /* And ready to receive another command. */ |
1149 | UartReset(); | |
1150 | /* And also reset the demod code, which might have been */ | |
1151 | /* false-triggered by the commands from the reader. */ | |
1152 | DemodReset(); | |
1153 | } | |
abb21530 | 1154 | if(Handle14443bUartBit(cq & 0x01)) { |
489ef36c | 1155 | if(triggered && tracing) { |
51d4f6f1 | 1156 | LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); |
489ef36c | 1157 | } |
489ef36c | 1158 | /* And ready to receive another command. */ |
1159 | UartReset(); | |
1160 | /* And also reset the demod code, which might have been */ | |
1161 | /* false-triggered by the commands from the reader. */ | |
1162 | DemodReset(); | |
1163 | } | |
36f84d47 | 1164 | ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF); |
47286d89 | 1165 | } |
489ef36c | 1166 | |
47286d89 | 1167 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time |
36f84d47 | 1168 | if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) { |
489ef36c | 1169 | |
1170 | //Use samples as a time measurement | |
1171 | if(tracing) | |
1172 | { | |
99cf19d9 | 1173 | //uint8_t parity[MAX_PARITY_SIZE]; |
1174 | LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE); | |
489ef36c | 1175 | } |
1176 | triggered = TRUE; | |
489ef36c | 1177 | |
1178 | // And ready to receive another response. | |
1179 | DemodReset(); | |
1180 | } | |
22e24700 | 1181 | TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF); |
47286d89 | 1182 | } |
1183 | ||
489ef36c | 1184 | } |
abb21530 | 1185 | |
489ef36c | 1186 | FpgaDisableSscDma(); |
abb21530 | 1187 | LEDsoff(); |
489ef36c | 1188 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; |
1189 | DbpString("Snoop statistics:"); | |
1190 | Dbprintf(" Max behind by: %i", maxBehindBy); | |
1191 | Dbprintf(" Uart State: %x", Uart.state); | |
1192 | Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt); | |
1193 | Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax); | |
1194 | Dbprintf(" Trace length: %i", BigBuf_get_traceLen()); | |
1195 | } | |
1196 | ||
1197 | ||
1198 | /* | |
1199 | * Send raw command to tag ISO14443B | |
1200 | * @Input | |
1201 | * datalen len of buffer data | |
1202 | * recv bool when true wait for data from tag and send to client | |
1203 | * powerfield bool leave the field on when true | |
1204 | * data buffer with byte to send | |
1205 | * | |
1206 | * @Output | |
1207 | * none | |
1208 | * | |
1209 | */ | |
abb21530 | 1210 | void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[]) |
489ef36c | 1211 | { |
1212 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
17ad0e09 | 1213 | BigBuf_free(); |
abb21530 | 1214 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
1215 | FpgaSetupSsc(); | |
1216 | ||
99cf19d9 | 1217 | if ( datalen == 0 && recv == 0 && powerfield == 0){ |
1218 | clear_trace(); | |
1219 | } else { | |
1220 | set_tracing(TRUE); | |
1221 | CodeAndTransmit14443bAsReader(data, datalen); | |
1222 | } | |
489ef36c | 1223 | |
abb21530 | 1224 | if(recv) { |
1225 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
51d4f6f1 | 1226 | uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE); |
1227 | cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen); | |
489ef36c | 1228 | } |
abb21530 | 1229 | |
1230 | if(!powerfield) { | |
489ef36c | 1231 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1232 | LED_D_OFF(); | |
1233 | } | |
99cf19d9 | 1234 | |
1235 | FpgaDisableSscDma(); | |
489ef36c | 1236 | } |
1237 |