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FIX: fastread dont do multiplication by zero, thanks @marshmellow42
[proxmark3-svn] / armsrc / iso14443b.c
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489ef36c 1//-----------------------------------------------------------------------------
2// Jonathan Westhues, split Nov 2006
3//
4// This code is licensed to you under the terms of the GNU GPL, version 2 or,
5// at your option, any later version. See the LICENSE.txt file for the text of
6// the license.
7//-----------------------------------------------------------------------------
abb21530 8// Routines to support ISO 14443B. This includes both the reader software and
9// the `fake tag' modes.
489ef36c 10//-----------------------------------------------------------------------------
11
12#include "proxmark3.h"
13#include "apps.h"
14#include "util.h"
15#include "string.h"
16
17#include "iso14443crc.h"
18
489ef36c 19#define RECEIVE_SAMPLES_TIMEOUT 2000
20
21//=============================================================================
22// An ISO 14443 Type B tag. We listen for commands from the reader, using
23// a UART kind of thing that's implemented in software. When we get a
24// frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
25// If it's good, then we can do something appropriate with it, and send
26// a response.
27//=============================================================================
28
29//-----------------------------------------------------------------------------
30// Code up a string of octets at layer 2 (including CRC, we don't generate
31// that here) so that they can be transmitted to the reader. Doesn't transmit
32// them yet, just leaves them ready to send in ToSend[].
33//-----------------------------------------------------------------------------
34static void CodeIso14443bAsTag(const uint8_t *cmd, int len)
35{
36 int i;
37
38 ToSendReset();
39
40 // Transmit a burst of ones, as the initial thing that lets the
41 // reader get phase sync. This (TR1) must be > 80/fs, per spec,
42 // but tag that I've tried (a Paypass) exceeds that by a fair bit,
43 // so I will too.
44 for(i = 0; i < 20; i++) {
45 ToSendStuffBit(1);
46 ToSendStuffBit(1);
47 ToSendStuffBit(1);
48 ToSendStuffBit(1);
49 }
50
51 // Send SOF.
52 for(i = 0; i < 10; i++) {
53 ToSendStuffBit(0);
54 ToSendStuffBit(0);
55 ToSendStuffBit(0);
56 ToSendStuffBit(0);
57 }
58 for(i = 0; i < 2; i++) {
59 ToSendStuffBit(1);
60 ToSendStuffBit(1);
61 ToSendStuffBit(1);
62 ToSendStuffBit(1);
63 }
64
65 for(i = 0; i < len; i++) {
66 int j;
67 uint8_t b = cmd[i];
68
69 // Start bit
70 ToSendStuffBit(0);
71 ToSendStuffBit(0);
72 ToSendStuffBit(0);
73 ToSendStuffBit(0);
74
75 // Data bits
76 for(j = 0; j < 8; j++) {
77 if(b & 1) {
78 ToSendStuffBit(1);
79 ToSendStuffBit(1);
80 ToSendStuffBit(1);
81 ToSendStuffBit(1);
82 } else {
83 ToSendStuffBit(0);
84 ToSendStuffBit(0);
85 ToSendStuffBit(0);
86 ToSendStuffBit(0);
87 }
88 b >>= 1;
89 }
90
91 // Stop bit
92 ToSendStuffBit(1);
93 ToSendStuffBit(1);
94 ToSendStuffBit(1);
95 ToSendStuffBit(1);
96 }
97
abb21530 98 // Send EOF.
489ef36c 99 for(i = 0; i < 10; i++) {
100 ToSendStuffBit(0);
101 ToSendStuffBit(0);
102 ToSendStuffBit(0);
103 ToSendStuffBit(0);
104 }
abb21530 105 for(i = 0; i < 2; i++) {
489ef36c 106 ToSendStuffBit(1);
107 ToSendStuffBit(1);
108 ToSendStuffBit(1);
109 ToSendStuffBit(1);
110 }
111
112 // Convert from last byte pos to length
113 ToSendMax++;
489ef36c 114}
115
116//-----------------------------------------------------------------------------
117// The software UART that receives commands from the reader, and its state
118// variables.
119//-----------------------------------------------------------------------------
120static struct {
121 enum {
122 STATE_UNSYNCD,
123 STATE_GOT_FALLING_EDGE_OF_SOF,
124 STATE_AWAITING_START_BIT,
36f84d47 125 STATE_RECEIVING_DATA
489ef36c 126 } state;
127 uint16_t shiftReg;
128 int bitCnt;
129 int byteCnt;
130 int byteCntMax;
131 int posCnt;
132 uint8_t *output;
133} Uart;
134
135/* Receive & handle a bit coming from the reader.
abb21530 136 *
137 * This function is called 4 times per bit (every 2 subcarrier cycles).
138 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
489ef36c 139 *
140 * LED handling:
141 * LED A -> ON once we have received the SOF and are expecting the rest.
142 * LED A -> OFF once we have received EOF or are in error state or unsynced
143 *
144 * Returns: true if we received a EOF
145 * false if we are still waiting for some more
146 */
36f84d47 147static RAMFUNC int Handle14443bUartBit(uint8_t bit)
489ef36c 148{
149 switch(Uart.state) {
150 case STATE_UNSYNCD:
489ef36c 151 if(!bit) {
152 // we went low, so this could be the beginning
153 // of an SOF
154 Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF;
155 Uart.posCnt = 0;
156 Uart.bitCnt = 0;
157 }
158 break;
159
160 case STATE_GOT_FALLING_EDGE_OF_SOF:
161 Uart.posCnt++;
abb21530 162 if(Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit
489ef36c 163 if(bit) {
abb21530 164 if(Uart.bitCnt > 9) {
489ef36c 165 // we've seen enough consecutive
166 // zeros that it's a valid SOF
167 Uart.posCnt = 0;
168 Uart.byteCnt = 0;
169 Uart.state = STATE_AWAITING_START_BIT;
170 LED_A_ON(); // Indicate we got a valid SOF
171 } else {
172 // didn't stay down long enough
173 // before going high, error
36f84d47 174 Uart.state = STATE_UNSYNCD;
489ef36c 175 }
176 } else {
177 // do nothing, keep waiting
178 }
179 Uart.bitCnt++;
180 }
181 if(Uart.posCnt >= 4) Uart.posCnt = 0;
abb21530 182 if(Uart.bitCnt > 12) {
489ef36c 183 // Give up if we see too many zeros without
184 // a one, too.
36f84d47 185 LED_A_OFF();
186 Uart.state = STATE_UNSYNCD;
489ef36c 187 }
188 break;
189
190 case STATE_AWAITING_START_BIT:
191 Uart.posCnt++;
192 if(bit) {
abb21530 193 if(Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
489ef36c 194 // stayed high for too long between
195 // characters, error
36f84d47 196 Uart.state = STATE_UNSYNCD;
489ef36c 197 }
198 } else {
199 // falling edge, this starts the data byte
200 Uart.posCnt = 0;
201 Uart.bitCnt = 0;
202 Uart.shiftReg = 0;
203 Uart.state = STATE_RECEIVING_DATA;
489ef36c 204 }
205 break;
206
207 case STATE_RECEIVING_DATA:
208 Uart.posCnt++;
209 if(Uart.posCnt == 2) {
210 // time to sample a bit
211 Uart.shiftReg >>= 1;
212 if(bit) {
213 Uart.shiftReg |= 0x200;
214 }
215 Uart.bitCnt++;
216 }
217 if(Uart.posCnt >= 4) {
218 Uart.posCnt = 0;
219 }
220 if(Uart.bitCnt == 10) {
221 if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001))
222 {
223 // this is a data byte, with correct
224 // start and stop bits
225 Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff;
226 Uart.byteCnt++;
227
228 if(Uart.byteCnt >= Uart.byteCntMax) {
229 // Buffer overflowed, give up
36f84d47 230 LED_A_OFF();
231 Uart.state = STATE_UNSYNCD;
489ef36c 232 } else {
233 // so get the next byte now
234 Uart.posCnt = 0;
235 Uart.state = STATE_AWAITING_START_BIT;
236 }
237 } else if(Uart.shiftReg == 0x000) {
238 // this is an EOF byte
239 LED_A_OFF(); // Finished receiving
36f84d47 240 Uart.state = STATE_UNSYNCD;
22e24700 241 if (Uart.byteCnt != 0) {
489ef36c 242 return TRUE;
22e24700 243 }
489ef36c 244 } else {
245 // this is an error
36f84d47 246 LED_A_OFF();
489ef36c 247 Uart.state = STATE_UNSYNCD;
36f84d47 248 }
489ef36c 249 }
250 break;
251
252 default:
36f84d47 253 LED_A_OFF();
489ef36c 254 Uart.state = STATE_UNSYNCD;
255 break;
256 }
257
489ef36c 258 return FALSE;
259}
260
36f84d47 261
262static void UartReset()
263{
264 Uart.byteCntMax = MAX_FRAME_SIZE;
265 Uart.state = STATE_UNSYNCD;
266 Uart.byteCnt = 0;
267 Uart.bitCnt = 0;
268}
269
270
271static void UartInit(uint8_t *data)
272{
273 Uart.output = data;
274 UartReset();
275}
276
277
489ef36c 278//-----------------------------------------------------------------------------
279// Receive a command (from the reader to us, where we are the simulated tag),
280// and store it in the given buffer, up to the given maximum length. Keeps
281// spinning, waiting for a well-framed command, until either we get one
282// (returns TRUE) or someone presses the pushbutton on the board (FALSE).
283//
284// Assume that we're called with the SSC (to the FPGA) and ADC path set
285// correctly.
286//-----------------------------------------------------------------------------
36f84d47 287static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len)
489ef36c 288{
abb21530 289 // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen
489ef36c 290 // only, since we are receiving, not transmitting).
291 // Signal field is off with the appropriate LED
292 LED_D_OFF();
293 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
294
489ef36c 295 // Now run a `software UART' on the stream of incoming samples.
36f84d47 296 UartInit(received);
489ef36c 297
298 for(;;) {
299 WDT_HIT();
300
301 if(BUTTON_PRESS()) return FALSE;
302
489ef36c 303 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
304 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
36f84d47 305 for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) {
306 if(Handle14443bUartBit(b & mask)) {
489ef36c 307 *len = Uart.byteCnt;
308 return TRUE;
309 }
310 }
311 }
312 }
36f84d47 313
314 return FALSE;
489ef36c 315}
316
317//-----------------------------------------------------------------------------
318// Main loop of simulated tag: receive commands from reader, decide what
319// response to send, and send it.
320//-----------------------------------------------------------------------------
abb21530 321void SimulateIso14443bTag(void)
489ef36c 322{
36f84d47 323 // the only commands we understand is REQB, AFI=0, Select All, N=0:
489ef36c 324 static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
36f84d47 325 // ... and REQB, AFI=0, Normal Request, N=0:
326 static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF };
327
328 // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
abb21530 329 // supports only 106kBit/s in both directions, max frame size = 32Bytes,
330 // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported:
489ef36c 331 static const uint8_t response1[] = {
332 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
333 0x00, 0x21, 0x85, 0x5e, 0xd7
334 };
335
36f84d47 336 clear_trace();
337 set_tracing(TRUE);
338
339 const uint8_t *resp;
340 uint8_t *respCode;
341 uint16_t respLen, respCodeLen;
489ef36c 342
abb21530 343 // allocate command receive buffer
344 BigBuf_free();
345 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
489ef36c 346
36f84d47 347 uint16_t len;
348 uint16_t cmdsRecvd = 0;
489ef36c 349
350 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
489ef36c 351
abb21530 352 // prepare the (only one) tag answer:
489ef36c 353 CodeIso14443bAsTag(response1, sizeof(response1));
36f84d47 354 uint8_t *resp1Code = BigBuf_malloc(ToSendMax);
355 memcpy(resp1Code, ToSend, ToSendMax);
356 uint16_t resp1CodeLen = ToSendMax;
489ef36c 357
358 // We need to listen to the high-frequency, peak-detected path.
359 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
360 FpgaSetupSsc();
361
362 cmdsRecvd = 0;
363
364 for(;;) {
489ef36c 365
36f84d47 366 if(!GetIso14443bCommandFromReader(receivedCmd, &len)) {
489ef36c 367 Dbprintf("button pressed, received %d commands", cmdsRecvd);
368 break;
369 }
370
36f84d47 371 if (tracing) {
372 uint8_t parity[MAX_PARITY_SIZE];
373 LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
374 }
489ef36c 375
36f84d47 376 // Good, look at the command now.
377 if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0)
378 || (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) {
379 resp = response1;
380 respLen = sizeof(response1);
381 respCode = resp1Code;
382 respCodeLen = resp1CodeLen;
489ef36c 383 } else {
384 Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
385 // And print whether the CRC fails, just for good measure
36f84d47 386 uint8_t b1, b2;
489ef36c 387 ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
388 if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
389 // Not so good, try again.
390 DbpString("+++CRC fail");
391 } else {
392 DbpString("CRC passes");
393 }
394 break;
395 }
396
489ef36c 397 cmdsRecvd++;
398
399 if(cmdsRecvd > 0x30) {
400 DbpString("many commands later...");
401 break;
402 }
403
36f84d47 404 if(respCodeLen <= 0) continue;
489ef36c 405
406 // Modulate BPSK
407 // Signal field is off with the appropriate LED
408 LED_D_OFF();
409 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
410 AT91C_BASE_SSC->SSC_THR = 0xff;
411 FpgaSetupSsc();
412
413 // Transmit the response.
36f84d47 414 uint16_t i = 0;
489ef36c 415 for(;;) {
416 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
36f84d47 417 uint8_t b = respCode[i];
489ef36c 418
419 AT91C_BASE_SSC->SSC_THR = b;
420
421 i++;
36f84d47 422 if(i > respCodeLen) {
489ef36c 423 break;
424 }
425 }
426 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
427 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
428 (void)b;
429 }
430 }
36f84d47 431
432 // trace the response:
433 if (tracing) {
434 uint8_t parity[MAX_PARITY_SIZE];
435 LogTrace(resp, respLen, 0, 0, parity, FALSE);
436 }
437
489ef36c 438 }
439}
440
441//=============================================================================
442// An ISO 14443 Type B reader. We take layer two commands, code them
443// appropriately, and then send them to the tag. We then listen for the
444// tag's response, which we leave in the buffer to be demodulated on the
445// PC side.
446//=============================================================================
447
448static struct {
449 enum {
450 DEMOD_UNSYNCD,
451 DEMOD_PHASE_REF_TRAINING,
452 DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
453 DEMOD_GOT_FALLING_EDGE_OF_SOF,
454 DEMOD_AWAITING_START_BIT,
36f84d47 455 DEMOD_RECEIVING_DATA
489ef36c 456 } state;
457 int bitCount;
458 int posCount;
459 int thisBit;
abb21530 460/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
489ef36c 461 int metric;
462 int metricN;
abb21530 463*/
489ef36c 464 uint16_t shiftReg;
465 uint8_t *output;
466 int len;
467 int sumI;
468 int sumQ;
469} Demod;
470
471/*
472 * Handles reception of a bit from the tag
473 *
abb21530 474 * This function is called 2 times per bit (every 4 subcarrier cycles).
475 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us
476 *
489ef36c 477 * LED handling:
478 * LED C -> ON once we have received the SOF and are expecting the rest.
479 * LED C -> OFF once we have received EOF or are unsynced
480 *
481 * Returns: true if we received a EOF
482 * false if we are still waiting for some more
483 *
484 */
abb21530 485static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
489ef36c 486{
487 int v;
488
489 // The soft decision on the bit uses an estimate of just the
490 // quadrant of the reference angle, not the exact angle.
491#define MAKE_SOFT_DECISION() { \
492 if(Demod.sumI > 0) { \
493 v = ci; \
494 } else { \
495 v = -ci; \
496 } \
497 if(Demod.sumQ > 0) { \
498 v += cq; \
499 } else { \
500 v -= cq; \
501 } \
502 }
503
abb21530 504#define SUBCARRIER_DETECT_THRESHOLD 8
505
506// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq)
507/* #define CHECK_FOR_SUBCARRIER() { \
508 v = ci; \
509 if(v < 0) v = -v; \
510 if(cq > 0) { \
511 v += cq; \
512 } else { \
513 v -= cq; \
514 } \
515 }
516 */
517// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
518#define CHECK_FOR_SUBCARRIER() { \
519 if(ci < 0) { \
520 if(cq < 0) { /* ci < 0, cq < 0 */ \
521 if (cq < ci) { \
522 v = -cq - (ci >> 1); \
523 } else { \
524 v = -ci - (cq >> 1); \
525 } \
526 } else { /* ci < 0, cq >= 0 */ \
527 if (cq < -ci) { \
528 v = -ci + (cq >> 1); \
529 } else { \
530 v = cq - (ci >> 1); \
531 } \
532 } \
533 } else { \
534 if(cq < 0) { /* ci >= 0, cq < 0 */ \
535 if (-cq < ci) { \
536 v = ci - (cq >> 1); \
537 } else { \
538 v = -cq + (ci >> 1); \
539 } \
540 } else { /* ci >= 0, cq >= 0 */ \
541 if (cq < ci) { \
542 v = ci + (cq >> 1); \
543 } else { \
544 v = cq + (ci >> 1); \
545 } \
546 } \
547 } \
548 }
549
489ef36c 550 switch(Demod.state) {
551 case DEMOD_UNSYNCD:
abb21530 552 CHECK_FOR_SUBCARRIER();
553 if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected
489ef36c 554 Demod.state = DEMOD_PHASE_REF_TRAINING;
abb21530 555 Demod.sumI = ci;
556 Demod.sumQ = cq;
557 Demod.posCount = 1;
489ef36c 558 }
559 break;
560
561 case DEMOD_PHASE_REF_TRAINING:
562 if(Demod.posCount < 8) {
abb21530 563 CHECK_FOR_SUBCARRIER();
564 if (v > SUBCARRIER_DETECT_THRESHOLD) {
565 // set the reference phase (will code a logic '1') by averaging over 32 1/fs.
566 // note: synchronization time > 80 1/fs
489ef36c 567 Demod.sumI += ci;
568 Demod.sumQ += cq;
abb21530 569 Demod.posCount++;
570 } else { // subcarrier lost
489ef36c 571 Demod.state = DEMOD_UNSYNCD;
abb21530 572 }
489ef36c 573 } else {
489ef36c 574 Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF;
489ef36c 575 }
489ef36c 576 break;
577
578 case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
579 MAKE_SOFT_DECISION();
abb21530 580 if(v < 0) { // logic '0' detected
489ef36c 581 Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
abb21530 582 Demod.posCount = 0; // start of SOF sequence
489ef36c 583 } else {
abb21530 584 if(Demod.posCount > 200/4) { // maximum length of TR1 = 200 1/fs
489ef36c 585 Demod.state = DEMOD_UNSYNCD;
586 }
587 }
588 Demod.posCount++;
589 break;
590
591 case DEMOD_GOT_FALLING_EDGE_OF_SOF:
abb21530 592 Demod.posCount++;
489ef36c 593 MAKE_SOFT_DECISION();
594 if(v > 0) {
abb21530 595 if(Demod.posCount < 9*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
489ef36c 596 Demod.state = DEMOD_UNSYNCD;
597 } else {
598 LED_C_ON(); // Got SOF
599 Demod.state = DEMOD_AWAITING_START_BIT;
600 Demod.posCount = 0;
601 Demod.len = 0;
abb21530 602/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
489ef36c 603 Demod.metricN = 0;
604 Demod.metric = 0;
abb21530 605*/
489ef36c 606 }
607 } else {
abb21530 608 if(Demod.posCount > 12*2) { // low phase of SOF too long (> 12 etu)
489ef36c 609 Demod.state = DEMOD_UNSYNCD;
47286d89 610 LED_C_OFF();
489ef36c 611 }
612 }
489ef36c 613 break;
614
615 case DEMOD_AWAITING_START_BIT:
abb21530 616 Demod.posCount++;
489ef36c 617 MAKE_SOFT_DECISION();
618 if(v > 0) {
abb21530 619 if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
489ef36c 620 Demod.state = DEMOD_UNSYNCD;
47286d89 621 LED_C_OFF();
489ef36c 622 }
abb21530 623 } else { // start bit detected
489ef36c 624 Demod.bitCount = 0;
abb21530 625 Demod.posCount = 1; // this was the first half
489ef36c 626 Demod.thisBit = v;
627 Demod.shiftReg = 0;
628 Demod.state = DEMOD_RECEIVING_DATA;
629 }
630 break;
631
632 case DEMOD_RECEIVING_DATA:
633 MAKE_SOFT_DECISION();
abb21530 634 if(Demod.posCount == 0) { // first half of bit
489ef36c 635 Demod.thisBit = v;
636 Demod.posCount = 1;
abb21530 637 } else { // second half of bit
489ef36c 638 Demod.thisBit += v;
639
abb21530 640/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
489ef36c 641 if(Demod.thisBit > 0) {
642 Demod.metric += Demod.thisBit;
643 } else {
644 Demod.metric -= Demod.thisBit;
645 }
646 (Demod.metricN)++;
abb21530 647*/
489ef36c 648
649 Demod.shiftReg >>= 1;
abb21530 650 if(Demod.thisBit > 0) { // logic '1'
489ef36c 651 Demod.shiftReg |= 0x200;
652 }
653
654 Demod.bitCount++;
655 if(Demod.bitCount == 10) {
656 uint16_t s = Demod.shiftReg;
abb21530 657 if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0'
489ef36c 658 uint8_t b = (s >> 1);
659 Demod.output[Demod.len] = b;
660 Demod.len++;
661 Demod.state = DEMOD_AWAITING_START_BIT;
489ef36c 662 } else {
663 Demod.state = DEMOD_UNSYNCD;
47286d89 664 LED_C_OFF();
665 if(s == 0x000) {
abb21530 666 // This is EOF (start, stop and all data bits == '0'
47286d89 667 return TRUE;
668 }
489ef36c 669 }
670 }
671 Demod.posCount = 0;
672 }
673 break;
674
675 default:
676 Demod.state = DEMOD_UNSYNCD;
47286d89 677 LED_C_OFF();
489ef36c 678 break;
679 }
680
489ef36c 681 return FALSE;
682}
683
684
685static void DemodReset()
686{
687 // Clear out the state of the "UART" that receives from the tag.
688 Demod.len = 0;
689 Demod.state = DEMOD_UNSYNCD;
abb21530 690 Demod.posCount = 0;
489ef36c 691 memset(Demod.output, 0x00, MAX_FRAME_SIZE);
692}
693
694
695static void DemodInit(uint8_t *data)
696{
697 Demod.output = data;
698 DemodReset();
699}
700
701
489ef36c 702/*
703 * Demodulate the samples we received from the tag, also log to tracebuffer
489ef36c 704 * quiet: set to 'TRUE' to disable debug output
705 */
abb21530 706static void GetSamplesFor14443bDemod(int n, bool quiet)
489ef36c 707{
708 int max = 0;
abb21530 709 bool gotFrame = FALSE;
489ef36c 710 int lastRxCounter, ci, cq, samples = 0;
711
712 // Allocate memory from BigBuf for some buffers
713 // free all previous allocations first
714 BigBuf_free();
715
716 // The response (tag -> reader) that we're receiving.
717 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
718
719 // The DMA buffer, used to stream samples from the FPGA
22e24700 720 int8_t *dmaBuf = (int8_t*) BigBuf_malloc(DMA_BUFFER_SIZE);
489ef36c 721
722 // Set up the demodulator for tag -> reader responses.
723 DemodInit(receivedResponse);
724
725 // Setup and start DMA.
22e24700 726 FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE);
489ef36c 727
728 int8_t *upTo = dmaBuf;
22e24700 729 lastRxCounter = DMA_BUFFER_SIZE;
489ef36c 730
731 // Signal field is ON with the appropriate LED:
abb21530 732 LED_D_ON();
489ef36c 733 // And put the FPGA in the appropriate mode
22e24700 734 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
489ef36c 735
736 for(;;) {
737 int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
738 if(behindBy > max) max = behindBy;
739
22e24700 740 while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1)) > 2) {
489ef36c 741 ci = upTo[0];
742 cq = upTo[1];
743 upTo += 2;
22e24700 744 if(upTo >= dmaBuf + DMA_BUFFER_SIZE) {
489ef36c 745 upTo = dmaBuf;
746 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
22e24700 747 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
489ef36c 748 }
749 lastRxCounter -= 2;
750 if(lastRxCounter <= 0) {
22e24700 751 lastRxCounter += DMA_BUFFER_SIZE;
489ef36c 752 }
753
754 samples += 2;
755
abb21530 756 if(Handle14443bSamplesDemod(ci, cq)) {
757 gotFrame = TRUE;
758 break;
489ef36c 759 }
abb21530 760 }
489ef36c 761
abb21530 762 if(samples > n || gotFrame) {
489ef36c 763 break;
764 }
765 }
abb21530 766
489ef36c 767 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
abb21530 768
769 if (!quiet) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max, samples, gotFrame, Demod.len, Demod.sumI, Demod.sumQ);
489ef36c 770 //Tracing
771 if (tracing && Demod.len > 0) {
772 uint8_t parity[MAX_PARITY_SIZE];
22e24700 773 //GetParity(Demod.output, Demod.len, parity);
489ef36c 774 LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE);
775 }
776}
777
778
489ef36c 779//-----------------------------------------------------------------------------
780// Transmit the command (to the tag) that was placed in ToSend[].
781//-----------------------------------------------------------------------------
abb21530 782static void TransmitFor14443b(void)
489ef36c 783{
784 int c;
785
786 FpgaSetupSsc();
787
788 while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
789 AT91C_BASE_SSC->SSC_THR = 0xff;
790 }
791
792 // Signal field is ON with the appropriate Red LED
793 LED_D_ON();
794 // Signal we are transmitting with the Green LED
795 LED_B_ON();
abb21530 796 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
489ef36c 797
798 for(c = 0; c < 10;) {
799 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
800 AT91C_BASE_SSC->SSC_THR = 0xff;
801 c++;
802 }
803 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
804 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
805 (void)r;
806 }
807 WDT_HIT();
808 }
809
810 c = 0;
811 for(;;) {
812 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
813 AT91C_BASE_SSC->SSC_THR = ToSend[c];
814 c++;
815 if(c >= ToSendMax) {
816 break;
817 }
818 }
819 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
820 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
821 (void)r;
822 }
823 WDT_HIT();
824 }
825 LED_B_OFF(); // Finished sending
826}
827
828
829//-----------------------------------------------------------------------------
830// Code a layer 2 command (string of octets, including CRC) into ToSend[],
abb21530 831// so that it is ready to transmit to the tag using TransmitFor14443b().
489ef36c 832//-----------------------------------------------------------------------------
833static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
834{
835 int i, j;
836 uint8_t b;
837
838 ToSendReset();
839
840 // Establish initial reference level
841 for(i = 0; i < 40; i++) {
842 ToSendStuffBit(1);
843 }
844 // Send SOF
845 for(i = 0; i < 10; i++) {
846 ToSendStuffBit(0);
847 }
848
849 for(i = 0; i < len; i++) {
850 // Stop bits/EGT
851 ToSendStuffBit(1);
852 ToSendStuffBit(1);
853 // Start bit
854 ToSendStuffBit(0);
855 // Data bits
856 b = cmd[i];
857 for(j = 0; j < 8; j++) {
858 if(b & 1) {
859 ToSendStuffBit(1);
860 } else {
861 ToSendStuffBit(0);
862 }
863 b >>= 1;
864 }
865 }
866 // Send EOF
867 ToSendStuffBit(1);
868 for(i = 0; i < 10; i++) {
869 ToSendStuffBit(0);
870 }
871 for(i = 0; i < 8; i++) {
872 ToSendStuffBit(1);
873 }
874
875 // And then a little more, to make sure that the last character makes
876 // it out before we switch to rx mode.
877 for(i = 0; i < 24; i++) {
878 ToSendStuffBit(1);
879 }
880
881 // Convert from last character reference to length
882 ToSendMax++;
883}
884
885
489ef36c 886/**
887 Convenience function to encode, transmit and trace iso 14443b comms
888 **/
889static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len)
890{
891 CodeIso14443bAsReader(cmd, len);
abb21530 892 TransmitFor14443b();
489ef36c 893 if (tracing) {
894 uint8_t parity[MAX_PARITY_SIZE];
895 GetParity(cmd, len, parity);
896 LogTrace(cmd,len, 0, 0, parity, TRUE);
897 }
898}
899
900
901//-----------------------------------------------------------------------------
abb21530 902// Read a SRI512 ISO 14443B tag.
489ef36c 903//
904// SRI512 tags are just simple memory tags, here we're looking at making a dump
905// of the contents of the memory. No anticollision algorithm is done, we assume
906// we have a single tag in the field.
907//
908// I tried to be systematic and check every answer of the tag, every CRC, etc...
909//-----------------------------------------------------------------------------
abb21530 910void ReadSTMemoryIso14443b(uint32_t dwLast)
489ef36c 911{
912 clear_trace();
913 set_tracing(TRUE);
914
915 uint8_t i = 0x00;
916
917 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
918 // Make sure that we start from off, since the tags are stateful;
919 // confusing things will happen if we don't reset them between reads.
920 LED_D_OFF();
921 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
922 SpinDelay(200);
923
924 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
925 FpgaSetupSsc();
926
927 // Now give it time to spin up.
928 // Signal field is on with the appropriate LED
929 LED_D_ON();
22e24700 930 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
489ef36c 931 SpinDelay(200);
932
933 // First command: wake up the tag using the INITIATE command
934 uint8_t cmd1[] = { 0x06, 0x00, 0x97, 0x5b};
935
936 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
937// LED_A_ON();
abb21530 938 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
489ef36c 939// LED_A_OFF();
940
941 if (Demod.len == 0) {
22e24700 942 DbpString("No response from tag");
943 return;
489ef36c 944 } else {
22e24700 945 Dbprintf("Randomly generated UID from tag (+ 2 byte CRC): %02x %02x %02x",
489ef36c 946 Demod.output[0], Demod.output[1],Demod.output[2]);
947 }
948 // There is a response, SELECT the uid
949 DbpString("Now SELECT tag:");
950 cmd1[0] = 0x0E; // 0x0E is SELECT
951 cmd1[1] = Demod.output[0];
952 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
953 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
954
955// LED_A_ON();
abb21530 956 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
489ef36c 957// LED_A_OFF();
958 if (Demod.len != 3) {
22e24700 959 Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
960 return;
489ef36c 961 }
962 // Check the CRC of the answer:
963 ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]);
964 if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) {
22e24700 965 DbpString("CRC Error reading select response.");
966 return;
489ef36c 967 }
968 // Check response from the tag: should be the same UID as the command we just sent:
969 if (cmd1[1] != Demod.output[0]) {
22e24700 970 Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]);
971 return;
489ef36c 972 }
973 // Tag is now selected,
974 // First get the tag's UID:
975 cmd1[0] = 0x0B;
976 ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]);
977 CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one
978
979// LED_A_ON();
abb21530 980 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
489ef36c 981// LED_A_OFF();
982 if (Demod.len != 10) {
22e24700 983 Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
984 return;
489ef36c 985 }
986 // The check the CRC of the answer (use cmd1 as temporary variable):
987 ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]);
22e24700 988 if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) {
989 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
990 (cmd1[2]<<8)+cmd1[3],
991 (Demod.output[8]<<8)+Demod.output[9]
992 );
489ef36c 993 // Do not return;, let's go on... (we should retry, maybe ?)
994 }
995 Dbprintf("Tag UID (64 bits): %08x %08x",
22e24700 996 (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
997 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]);
489ef36c 998
999 // Now loop to read all 16 blocks, address from 0 to last block
1000 Dbprintf("Tag memory dump, block 0 to %d",dwLast);
1001 cmd1[0] = 0x08;
1002 i = 0x00;
1003 dwLast++;
1004 for (;;) {
1005 if (i == dwLast) {
1006 DbpString("System area block (0xff):");
1007 i = 0xff;
1008 }
1009 cmd1[1] = i;
1010 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
1011 CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
1012
1013// LED_A_ON();
abb21530 1014 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
489ef36c 1015// LED_A_OFF();
1016 if (Demod.len != 6) { // Check if we got an answer from the tag
1017 DbpString("Expected 6 bytes from tag, got less...");
1018 return;
1019 }
1020 // The check the CRC of the answer (use cmd1 as temporary variable):
1021 ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]);
1022 if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) {
22e24700 1023 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
1024 (cmd1[2]<<8)+cmd1[3],
1025 (Demod.output[4]<<8)+Demod.output[5]
1026 );
489ef36c 1027 // Do not return;, let's go on... (we should retry, maybe ?)
1028 }
1029 // Now print out the memory location:
22e24700 1030 Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i,
1031 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0],
1032 (Demod.output[4]<<8)+Demod.output[5]
1033 );
1034 if (i == 0xff) break;
489ef36c 1035 i++;
1036 }
1037}
1038
1039
1040//=============================================================================
1041// Finally, the `sniffer' combines elements from both the reader and
1042// simulated tag, to show both sides of the conversation.
1043//=============================================================================
1044
1045//-----------------------------------------------------------------------------
1046// Record the sequence of commands sent by the reader to the tag, with
1047// triggering so that we start recording at the point that the tag is moved
1048// near the reader.
1049//-----------------------------------------------------------------------------
1050/*
1051 * Memory usage for this function, (within BigBuf)
47286d89 1052 * Last Received command (reader->tag) - MAX_FRAME_SIZE
1053 * Last Received command (tag->reader) - MAX_FRAME_SIZE
22e24700 1054 * DMA Buffer - DMA_BUFFER_SIZE
47286d89 1055 * Demodulated samples received - all the rest
489ef36c 1056 */
abb21530 1057void RAMFUNC SnoopIso14443b(void)
489ef36c 1058{
1059 // We won't start recording the frames that we acquire until we trigger;
1060 // a good trigger condition to get started is probably when we see a
1061 // response from the tag.
47286d89 1062 int triggered = TRUE; // TODO: set and evaluate trigger condition
489ef36c 1063
1064 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1065 BigBuf_free();
1066
1067 clear_trace();
1068 set_tracing(TRUE);
1069
1070 // The DMA buffer, used to stream samples from the FPGA
22e24700 1071 int8_t *dmaBuf = (int8_t*) BigBuf_malloc(DMA_BUFFER_SIZE);
489ef36c 1072 int lastRxCounter;
1073 int8_t *upTo;
1074 int ci, cq;
1075 int maxBehindBy = 0;
1076
1077 // Count of samples received so far, so that we can include timing
1078 // information in the trace buffer.
1079 int samples = 0;
1080
1081 DemodInit(BigBuf_malloc(MAX_FRAME_SIZE));
1082 UartInit(BigBuf_malloc(MAX_FRAME_SIZE));
1083
1084 // Print some debug information about the buffer sizes
1085 Dbprintf("Snooping buffers initialized:");
1086 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1087 Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE);
1088 Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE);
22e24700 1089 Dbprintf(" DMA: %i bytes", DMA_BUFFER_SIZE);
489ef36c 1090
abb21530 1091 // Signal field is off, no reader signal, no tag signal
1092 LEDsoff();
489ef36c 1093
1094 // And put the FPGA in the appropriate mode
22e24700 1095 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP);
489ef36c 1096 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1097
1098 // Setup for the DMA.
1099 FpgaSetupSsc();
1100 upTo = dmaBuf;
22e24700 1101 lastRxCounter = DMA_BUFFER_SIZE;
1102 FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE);
489ef36c 1103 uint8_t parity[MAX_PARITY_SIZE];
489ef36c 1104
47286d89 1105 bool TagIsActive = FALSE;
1106 bool ReaderIsActive = FALSE;
1107
489ef36c 1108 // And now we loop, receiving samples.
1109 for(;;) {
1110 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
22e24700 1111 (DMA_BUFFER_SIZE-1);
489ef36c 1112 if(behindBy > maxBehindBy) {
1113 maxBehindBy = behindBy;
489ef36c 1114 }
abb21530 1115
489ef36c 1116 if(behindBy < 2) continue;
1117
1118 ci = upTo[0];
1119 cq = upTo[1];
1120 upTo += 2;
1121 lastRxCounter -= 2;
22e24700 1122 if(upTo >= dmaBuf + DMA_BUFFER_SIZE) {
489ef36c 1123 upTo = dmaBuf;
22e24700 1124 lastRxCounter += DMA_BUFFER_SIZE;
489ef36c 1125 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
22e24700 1126 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
abb21530 1127 WDT_HIT();
22e24700 1128 if(behindBy > (9*DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not?
1129 Dbprintf("blew circular buffer! behindBy=%d", behindBy);
abb21530 1130 break;
1131 }
1132 if(!tracing) {
1133 DbpString("Reached trace limit");
1134 break;
1135 }
1136 if(BUTTON_PRESS()) {
1137 DbpString("cancelled");
1138 break;
1139 }
489ef36c 1140 }
1141
1142 samples += 2;
1143
47286d89 1144 if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
abb21530 1145 if(Handle14443bUartBit(ci & 0x01)) {
489ef36c 1146 if(triggered && tracing) {
22e24700 1147 //GetParity(Uart.output, Uart.byteCnt, parity);
489ef36c 1148 LogTrace(Uart.output,Uart.byteCnt,samples, samples,parity,TRUE);
1149 }
489ef36c 1150 /* And ready to receive another command. */
1151 UartReset();
1152 /* And also reset the demod code, which might have been */
1153 /* false-triggered by the commands from the reader. */
1154 DemodReset();
1155 }
abb21530 1156 if(Handle14443bUartBit(cq & 0x01)) {
489ef36c 1157 if(triggered && tracing) {
22e24700 1158 //GetParity(Uart.output, Uart.byteCnt, parity);
489ef36c 1159 LogTrace(Uart.output,Uart.byteCnt,samples, samples, parity, TRUE);
1160 }
489ef36c 1161 /* And ready to receive another command. */
1162 UartReset();
1163 /* And also reset the demod code, which might have been */
1164 /* false-triggered by the commands from the reader. */
1165 DemodReset();
1166 }
36f84d47 1167 ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF);
47286d89 1168 }
489ef36c 1169
47286d89 1170 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
36f84d47 1171 if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) {
489ef36c 1172
1173 //Use samples as a time measurement
1174 if(tracing)
1175 {
1176 uint8_t parity[MAX_PARITY_SIZE];
22e24700 1177 //GetParity(Demod.output, Demod.len, parity);
489ef36c 1178 LogTrace(Demod.output, Demod.len,samples, samples, parity, FALSE);
1179 }
1180 triggered = TRUE;
489ef36c 1181
1182 // And ready to receive another response.
1183 DemodReset();
1184 }
22e24700 1185 TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF);
47286d89 1186 }
1187
489ef36c 1188 }
abb21530 1189
489ef36c 1190 FpgaDisableSscDma();
abb21530 1191 LEDsoff();
489ef36c 1192 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
1193 DbpString("Snoop statistics:");
1194 Dbprintf(" Max behind by: %i", maxBehindBy);
1195 Dbprintf(" Uart State: %x", Uart.state);
1196 Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt);
1197 Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax);
1198 Dbprintf(" Trace length: %i", BigBuf_get_traceLen());
1199}
1200
1201
1202/*
1203 * Send raw command to tag ISO14443B
1204 * @Input
1205 * datalen len of buffer data
1206 * recv bool when true wait for data from tag and send to client
1207 * powerfield bool leave the field on when true
1208 * data buffer with byte to send
1209 *
1210 * @Output
1211 * none
1212 *
1213 */
abb21530 1214void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[])
489ef36c 1215{
1216 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
abb21530 1217 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1218 FpgaSetupSsc();
1219
1220 set_tracing(TRUE);
1221
1222/* if(!powerfield) {
489ef36c 1223 // Make sure that we start from off, since the tags are stateful;
1224 // confusing things will happen if we don't reset them between reads.
1225 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1226 LED_D_OFF();
1227 SpinDelay(200);
1228 }
abb21530 1229 */
489ef36c 1230
abb21530 1231 // if(!GETBIT(GPIO_LED_D)) { // if field is off
22e24700 1232 // FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
abb21530 1233 // // Signal field is on with the appropriate LED
1234 // LED_D_ON();
1235 // SpinDelay(200);
1236 // }
489ef36c 1237
1238 CodeAndTransmit14443bAsReader(data, datalen);
1239
abb21530 1240 if(recv) {
1241 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
489ef36c 1242 uint16_t iLen = MIN(Demod.len,USB_CMD_DATA_SIZE);
1243 cmd_send(CMD_ACK,iLen,0,0,Demod.output,iLen);
1244 }
abb21530 1245
1246 if(!powerfield) {
489ef36c 1247 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1248 LED_D_OFF();
1249 }
1250}
1251
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