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[proxmark3-svn] / armsrc / iso14443.c
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15c4dc5a 1//-----------------------------------------------------------------------------
bd20f8f4 2// Jonathan Westhues, split Nov 2006
3//
4// This code is licensed to you under the terms of the GNU GPL, version 2 or,
5// at your option, any later version. See the LICENSE.txt file for the text of
6// the license.
7//-----------------------------------------------------------------------------
15c4dc5a 8// Routines to support ISO 14443. This includes both the reader software and
9// the `fake tag' modes. At the moment only the Type B modulation is
10// supported.
15c4dc5a 11//-----------------------------------------------------------------------------
bd20f8f4 12
e30c654b 13#include "proxmark3.h"
15c4dc5a 14#include "apps.h"
f7e3ed82 15#include "util.h"
9ab7a6c7 16#include "string.h"
15c4dc5a 17
f7e3ed82 18#include "iso14443crc.h"
15c4dc5a 19
f7e3ed82 20//static void GetSamplesFor14443(int weTx, int n);
15c4dc5a 21
22#define DEMOD_TRACE_SIZE 4096
23#define READER_TAG_BUFFER_SIZE 2048
24#define TAG_READER_BUFFER_SIZE 2048
81cd0474 25#define DEMOD_DMA_BUFFER_SIZE 1024
15c4dc5a 26
27//=============================================================================
28// An ISO 14443 Type B tag. We listen for commands from the reader, using
29// a UART kind of thing that's implemented in software. When we get a
30// frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
31// If it's good, then we can do something appropriate with it, and send
32// a response.
33//=============================================================================
34
35//-----------------------------------------------------------------------------
36// Code up a string of octets at layer 2 (including CRC, we don't generate
37// that here) so that they can be transmitted to the reader. Doesn't transmit
38// them yet, just leaves them ready to send in ToSend[].
39//-----------------------------------------------------------------------------
f7e3ed82 40static void CodeIso14443bAsTag(const uint8_t *cmd, int len)
15c4dc5a 41{
42 int i;
43
44 ToSendReset();
45
46 // Transmit a burst of ones, as the initial thing that lets the
47 // reader get phase sync. This (TR1) must be > 80/fs, per spec,
48 // but tag that I've tried (a Paypass) exceeds that by a fair bit,
49 // so I will too.
50 for(i = 0; i < 20; i++) {
51 ToSendStuffBit(1);
52 ToSendStuffBit(1);
53 ToSendStuffBit(1);
54 ToSendStuffBit(1);
55 }
56
57 // Send SOF.
58 for(i = 0; i < 10; i++) {
59 ToSendStuffBit(0);
60 ToSendStuffBit(0);
61 ToSendStuffBit(0);
62 ToSendStuffBit(0);
63 }
64 for(i = 0; i < 2; i++) {
65 ToSendStuffBit(1);
66 ToSendStuffBit(1);
67 ToSendStuffBit(1);
68 ToSendStuffBit(1);
69 }
70
71 for(i = 0; i < len; i++) {
72 int j;
f7e3ed82 73 uint8_t b = cmd[i];
15c4dc5a 74
75 // Start bit
76 ToSendStuffBit(0);
77 ToSendStuffBit(0);
78 ToSendStuffBit(0);
79 ToSendStuffBit(0);
80
81 // Data bits
82 for(j = 0; j < 8; j++) {
83 if(b & 1) {
84 ToSendStuffBit(1);
85 ToSendStuffBit(1);
86 ToSendStuffBit(1);
87 ToSendStuffBit(1);
88 } else {
89 ToSendStuffBit(0);
90 ToSendStuffBit(0);
91 ToSendStuffBit(0);
92 ToSendStuffBit(0);
93 }
94 b >>= 1;
95 }
96
97 // Stop bit
98 ToSendStuffBit(1);
99 ToSendStuffBit(1);
100 ToSendStuffBit(1);
101 ToSendStuffBit(1);
102 }
103
104 // Send SOF.
105 for(i = 0; i < 10; i++) {
106 ToSendStuffBit(0);
107 ToSendStuffBit(0);
108 ToSendStuffBit(0);
109 ToSendStuffBit(0);
110 }
111 for(i = 0; i < 10; i++) {
112 ToSendStuffBit(1);
113 ToSendStuffBit(1);
114 ToSendStuffBit(1);
115 ToSendStuffBit(1);
116 }
117
118 // Convert from last byte pos to length
119 ToSendMax++;
120
121 // Add a few more for slop
122 ToSendMax += 2;
123}
124
125//-----------------------------------------------------------------------------
126// The software UART that receives commands from the reader, and its state
127// variables.
128//-----------------------------------------------------------------------------
129static struct {
130 enum {
131 STATE_UNSYNCD,
132 STATE_GOT_FALLING_EDGE_OF_SOF,
133 STATE_AWAITING_START_BIT,
134 STATE_RECEIVING_DATA,
135 STATE_ERROR_WAIT
136 } state;
f7e3ed82 137 uint16_t shiftReg;
15c4dc5a 138 int bitCnt;
139 int byteCnt;
140 int byteCntMax;
141 int posCnt;
f7e3ed82 142 uint8_t *output;
15c4dc5a 143} Uart;
144
145/* Receive & handle a bit coming from the reader.
146 *
147 * LED handling:
148 * LED A -> ON once we have received the SOF and are expecting the rest.
149 * LED A -> OFF once we have received EOF or are in error state or unsynced
150 *
151 * Returns: true if we received a EOF
152 * false if we are still waiting for some more
153 */
f7e3ed82 154static int Handle14443UartBit(int bit)
15c4dc5a 155{
156 switch(Uart.state) {
157 case STATE_UNSYNCD:
158 LED_A_OFF();
159 if(!bit) {
160 // we went low, so this could be the beginning
161 // of an SOF
162 Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF;
163 Uart.posCnt = 0;
164 Uart.bitCnt = 0;
165 }
166 break;
167
168 case STATE_GOT_FALLING_EDGE_OF_SOF:
169 Uart.posCnt++;
170 if(Uart.posCnt == 2) {
171 if(bit) {
172 if(Uart.bitCnt >= 10) {
173 // we've seen enough consecutive
174 // zeros that it's a valid SOF
175 Uart.posCnt = 0;
176 Uart.byteCnt = 0;
177 Uart.state = STATE_AWAITING_START_BIT;
178 LED_A_ON(); // Indicate we got a valid SOF
179 } else {
180 // didn't stay down long enough
181 // before going high, error
182 Uart.state = STATE_ERROR_WAIT;
183 }
184 } else {
185 // do nothing, keep waiting
186 }
187 Uart.bitCnt++;
188 }
189 if(Uart.posCnt >= 4) Uart.posCnt = 0;
190 if(Uart.bitCnt > 14) {
191 // Give up if we see too many zeros without
192 // a one, too.
193 Uart.state = STATE_ERROR_WAIT;
194 }
195 break;
196
197 case STATE_AWAITING_START_BIT:
198 Uart.posCnt++;
199 if(bit) {
200 if(Uart.posCnt > 25) {
201 // stayed high for too long between
202 // characters, error
203 Uart.state = STATE_ERROR_WAIT;
204 }
205 } else {
206 // falling edge, this starts the data byte
207 Uart.posCnt = 0;
208 Uart.bitCnt = 0;
209 Uart.shiftReg = 0;
210 Uart.state = STATE_RECEIVING_DATA;
211 LED_A_ON(); // Indicate we're receiving
212 }
213 break;
214
215 case STATE_RECEIVING_DATA:
216 Uart.posCnt++;
217 if(Uart.posCnt == 2) {
218 // time to sample a bit
219 Uart.shiftReg >>= 1;
220 if(bit) {
221 Uart.shiftReg |= 0x200;
222 }
223 Uart.bitCnt++;
224 }
225 if(Uart.posCnt >= 4) {
226 Uart.posCnt = 0;
227 }
228 if(Uart.bitCnt == 10) {
229 if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001))
230 {
231 // this is a data byte, with correct
232 // start and stop bits
233 Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff;
234 Uart.byteCnt++;
235
236 if(Uart.byteCnt >= Uart.byteCntMax) {
237 // Buffer overflowed, give up
238 Uart.posCnt = 0;
239 Uart.state = STATE_ERROR_WAIT;
240 } else {
241 // so get the next byte now
242 Uart.posCnt = 0;
243 Uart.state = STATE_AWAITING_START_BIT;
244 }
245 } else if(Uart.shiftReg == 0x000) {
246 // this is an EOF byte
247 LED_A_OFF(); // Finished receiving
248 return TRUE;
249 } else {
250 // this is an error
251 Uart.posCnt = 0;
252 Uart.state = STATE_ERROR_WAIT;
253 }
254 }
255 break;
256
257 case STATE_ERROR_WAIT:
258 // We're all screwed up, so wait a little while
259 // for whatever went wrong to finish, and then
260 // start over.
261 Uart.posCnt++;
262 if(Uart.posCnt > 10) {
263 Uart.state = STATE_UNSYNCD;
264 }
265 break;
266
267 default:
268 Uart.state = STATE_UNSYNCD;
269 break;
270 }
271
0318894e 272 // This row make the error blew circular buffer in hf 14b snoop
273 //if (Uart.state == STATE_ERROR_WAIT) LED_A_OFF(); // Error
15c4dc5a 274
275 return FALSE;
276}
277
278//-----------------------------------------------------------------------------
279// Receive a command (from the reader to us, where we are the simulated tag),
280// and store it in the given buffer, up to the given maximum length. Keeps
281// spinning, waiting for a well-framed command, until either we get one
282// (returns TRUE) or someone presses the pushbutton on the board (FALSE).
283//
284// Assume that we're called with the SSC (to the FPGA) and ADC path set
285// correctly.
286//-----------------------------------------------------------------------------
f7e3ed82 287static int GetIso14443CommandFromReader(uint8_t *received, int *len, int maxLen)
15c4dc5a 288{
f7e3ed82 289 uint8_t mask;
15c4dc5a 290 int i, bit;
291
292 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
293 // only, since we are receiving, not transmitting).
294 // Signal field is off with the appropriate LED
295 LED_D_OFF();
3fe4ff4f 296 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
15c4dc5a 297
298
299 // Now run a `software UART' on the stream of incoming samples.
300 Uart.output = received;
301 Uart.byteCntMax = maxLen;
302 Uart.state = STATE_UNSYNCD;
303
304 for(;;) {
305 WDT_HIT();
306
307 if(BUTTON_PRESS()) return FALSE;
308
309 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
310 AT91C_BASE_SSC->SSC_THR = 0x00;
311 }
312 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 313 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 314
315 mask = 0x80;
316 for(i = 0; i < 8; i++, mask >>= 1) {
317 bit = (b & mask);
318 if(Handle14443UartBit(bit)) {
319 *len = Uart.byteCnt;
320 return TRUE;
321 }
322 }
323 }
324 }
325}
326
327//-----------------------------------------------------------------------------
328// Main loop of simulated tag: receive commands from reader, decide what
329// response to send, and send it.
330//-----------------------------------------------------------------------------
331void SimulateIso14443Tag(void)
332{
f7e3ed82 333 static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
334 static const uint8_t response1[] = {
15c4dc5a 335 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
336 0x00, 0x21, 0x85, 0x5e, 0xd7
337 };
338
f7e3ed82 339 uint8_t *resp;
15c4dc5a 340 int respLen;
341
f7e3ed82 342 uint8_t *resp1 = (((uint8_t *)BigBuf) + 800);
15c4dc5a 343 int resp1Len;
344
f7e3ed82 345 uint8_t *receivedCmd = (uint8_t *)BigBuf;
15c4dc5a 346 int len;
347
348 int i;
349
350 int cmdsRecvd = 0;
351
7cc204bf 352 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
15c4dc5a 353 memset(receivedCmd, 0x44, 400);
354
355 CodeIso14443bAsTag(response1, sizeof(response1));
356 memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
357
358 // We need to listen to the high-frequency, peak-detected path.
359 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
360 FpgaSetupSsc();
361
362 cmdsRecvd = 0;
363
364 for(;;) {
f7e3ed82 365 uint8_t b1, b2;
15c4dc5a 366
367 if(!GetIso14443CommandFromReader(receivedCmd, &len, 100)) {
368 Dbprintf("button pressed, received %d commands", cmdsRecvd);
369 break;
370 }
371
372 // Good, look at the command now.
373
374 if(len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len)==0) {
375 resp = resp1; respLen = resp1Len;
376 } else {
377 Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
378 // And print whether the CRC fails, just for good measure
379 ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
380 if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
381 // Not so good, try again.
382 DbpString("+++CRC fail");
383 } else {
384 DbpString("CRC passes");
385 }
386 break;
387 }
388
389 memset(receivedCmd, 0x44, 32);
390
391 cmdsRecvd++;
392
393 if(cmdsRecvd > 0x30) {
394 DbpString("many commands later...");
395 break;
396 }
397
398 if(respLen <= 0) continue;
399
400 // Modulate BPSK
401 // Signal field is off with the appropriate LED
402 LED_D_OFF();
3fe4ff4f 403 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
15c4dc5a 404 AT91C_BASE_SSC->SSC_THR = 0xff;
405 FpgaSetupSsc();
406
407 // Transmit the response.
408 i = 0;
409 for(;;) {
410 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
f7e3ed82 411 uint8_t b = resp[i];
15c4dc5a 412
413 AT91C_BASE_SSC->SSC_THR = b;
414
415 i++;
416 if(i > respLen) {
417 break;
418 }
419 }
420 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 421 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 422 (void)b;
423 }
424 }
425 }
426}
427
428//=============================================================================
429// An ISO 14443 Type B reader. We take layer two commands, code them
430// appropriately, and then send them to the tag. We then listen for the
431// tag's response, which we leave in the buffer to be demodulated on the
432// PC side.
433//=============================================================================
434
435static struct {
436 enum {
437 DEMOD_UNSYNCD,
438 DEMOD_PHASE_REF_TRAINING,
439 DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
440 DEMOD_GOT_FALLING_EDGE_OF_SOF,
441 DEMOD_AWAITING_START_BIT,
442 DEMOD_RECEIVING_DATA,
443 DEMOD_ERROR_WAIT
444 } state;
445 int bitCount;
446 int posCount;
447 int thisBit;
448 int metric;
449 int metricN;
f7e3ed82 450 uint16_t shiftReg;
451 uint8_t *output;
15c4dc5a 452 int len;
453 int sumI;
454 int sumQ;
455} Demod;
456
457/*
458 * Handles reception of a bit from the tag
459 *
460 * LED handling:
461 * LED C -> ON once we have received the SOF and are expecting the rest.
462 * LED C -> OFF once we have received EOF or are unsynced
463 *
464 * Returns: true if we received a EOF
465 * false if we are still waiting for some more
466 *
467 */
0f7f9edc 468static RAMFUNC int Handle14443SamplesDemod(int ci, int cq)
15c4dc5a 469{
470 int v;
471
472 // The soft decision on the bit uses an estimate of just the
473 // quadrant of the reference angle, not the exact angle.
474#define MAKE_SOFT_DECISION() { \
475 if(Demod.sumI > 0) { \
476 v = ci; \
477 } else { \
478 v = -ci; \
479 } \
480 if(Demod.sumQ > 0) { \
481 v += cq; \
482 } else { \
483 v -= cq; \
484 } \
485 }
486
487 switch(Demod.state) {
488 case DEMOD_UNSYNCD:
489 v = ci;
490 if(v < 0) v = -v;
491 if(cq > 0) {
492 v += cq;
493 } else {
494 v -= cq;
495 }
496 if(v > 40) {
497 Demod.posCount = 0;
498 Demod.state = DEMOD_PHASE_REF_TRAINING;
499 Demod.sumI = 0;
500 Demod.sumQ = 0;
501 }
502 break;
503
504 case DEMOD_PHASE_REF_TRAINING:
505 if(Demod.posCount < 8) {
506 Demod.sumI += ci;
507 Demod.sumQ += cq;
508 } else if(Demod.posCount > 100) {
509 // error, waited too long
510 Demod.state = DEMOD_UNSYNCD;
511 } else {
512 MAKE_SOFT_DECISION();
513 if(v < 0) {
514 Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF;
515 Demod.posCount = 0;
516 }
517 }
518 Demod.posCount++;
519 break;
520
521 case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
522 MAKE_SOFT_DECISION();
523 if(v < 0) {
524 Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
525 Demod.posCount = 0;
526 } else {
527 if(Demod.posCount > 100) {
528 Demod.state = DEMOD_UNSYNCD;
529 }
530 }
531 Demod.posCount++;
532 break;
533
534 case DEMOD_GOT_FALLING_EDGE_OF_SOF:
535 MAKE_SOFT_DECISION();
536 if(v > 0) {
537 if(Demod.posCount < 12) {
538 Demod.state = DEMOD_UNSYNCD;
539 } else {
7cf3ef20 540 LED_C_ON(); // Got SOF
15c4dc5a 541 Demod.state = DEMOD_AWAITING_START_BIT;
542 Demod.posCount = 0;
543 Demod.len = 0;
544 Demod.metricN = 0;
545 Demod.metric = 0;
546 }
547 } else {
548 if(Demod.posCount > 100) {
549 Demod.state = DEMOD_UNSYNCD;
550 }
551 }
552 Demod.posCount++;
553 break;
554
555 case DEMOD_AWAITING_START_BIT:
556 MAKE_SOFT_DECISION();
557 if(v > 0) {
558 if(Demod.posCount > 10) {
559 Demod.state = DEMOD_UNSYNCD;
560 }
561 } else {
562 Demod.bitCount = 0;
563 Demod.posCount = 1;
564 Demod.thisBit = v;
565 Demod.shiftReg = 0;
566 Demod.state = DEMOD_RECEIVING_DATA;
567 }
568 break;
569
570 case DEMOD_RECEIVING_DATA:
571 MAKE_SOFT_DECISION();
572 if(Demod.posCount == 0) {
573 Demod.thisBit = v;
574 Demod.posCount = 1;
575 } else {
576 Demod.thisBit += v;
577
578 if(Demod.thisBit > 0) {
579 Demod.metric += Demod.thisBit;
580 } else {
581 Demod.metric -= Demod.thisBit;
582 }
583 (Demod.metricN)++;
584
585 Demod.shiftReg >>= 1;
586 if(Demod.thisBit > 0) {
587 Demod.shiftReg |= 0x200;
588 }
589
590 Demod.bitCount++;
591 if(Demod.bitCount == 10) {
f7e3ed82 592 uint16_t s = Demod.shiftReg;
15c4dc5a 593 if((s & 0x200) && !(s & 0x001)) {
f7e3ed82 594 uint8_t b = (s >> 1);
15c4dc5a 595 Demod.output[Demod.len] = b;
596 Demod.len++;
597 Demod.state = DEMOD_AWAITING_START_BIT;
598 } else if(s == 0x000) {
599 // This is EOF
600 LED_C_OFF();
15c4dc5a 601 Demod.state = DEMOD_UNSYNCD;
7cf3ef20 602 return TRUE;
15c4dc5a 603 } else {
604 Demod.state = DEMOD_UNSYNCD;
605 }
606 }
607 Demod.posCount = 0;
608 }
609 break;
610
611 default:
612 Demod.state = DEMOD_UNSYNCD;
613 break;
614 }
615
616 if (Demod.state == DEMOD_UNSYNCD) LED_C_OFF(); // Not synchronized...
617 return FALSE;
618}
619
620/*
621 * Demodulate the samples we received from the tag
622 * weTx: set to 'TRUE' if we behave like a reader
623 * set to 'FALSE' if we behave like a snooper
624 * quiet: set to 'TRUE' to disable debug output
625 */
f7e3ed82 626static void GetSamplesFor14443Demod(int weTx, int n, int quiet)
15c4dc5a 627{
628 int max = 0;
f7e3ed82 629 int gotFrame = FALSE;
15c4dc5a 630
631//# define DMA_BUFFER_SIZE 8
f7e3ed82 632 int8_t *dmaBuf;
15c4dc5a 633
634 int lastRxCounter;
f7e3ed82 635 int8_t *upTo;
15c4dc5a 636
637 int ci, cq;
638
639 int samples = 0;
640
641 // Clear out the state of the "UART" that receives from the tag.
7cf3ef20 642 memset(BigBuf, 0x00, 400);
f7e3ed82 643 Demod.output = (uint8_t *)BigBuf;
15c4dc5a 644 Demod.len = 0;
645 Demod.state = DEMOD_UNSYNCD;
646
647 // And the UART that receives from the reader
f7e3ed82 648 Uart.output = (((uint8_t *)BigBuf) + 1024);
15c4dc5a 649 Uart.byteCntMax = 100;
650 Uart.state = STATE_UNSYNCD;
651
652 // Setup for the DMA.
f7e3ed82 653 dmaBuf = (int8_t *)(BigBuf + 32);
15c4dc5a 654 upTo = dmaBuf;
81cd0474 655 lastRxCounter = DEMOD_DMA_BUFFER_SIZE;
656 FpgaSetupSscDma((uint8_t *)dmaBuf, DEMOD_DMA_BUFFER_SIZE);
15c4dc5a 657
658 // Signal field is ON with the appropriate LED:
7cf3ef20 659 if (weTx) LED_D_ON(); else LED_D_OFF();
15c4dc5a 660 // And put the FPGA in the appropriate mode
661 FpgaWriteConfWord(
662 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
663 (weTx ? 0 : FPGA_HF_READER_RX_XCORR_SNOOP));
664
665 for(;;) {
666 int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
667 if(behindBy > max) max = behindBy;
668
81cd0474 669 while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (DEMOD_DMA_BUFFER_SIZE-1))
15c4dc5a 670 > 2)
671 {
672 ci = upTo[0];
673 cq = upTo[1];
674 upTo += 2;
81cd0474 675 if(upTo - dmaBuf > DEMOD_DMA_BUFFER_SIZE) {
676 upTo -= DEMOD_DMA_BUFFER_SIZE;
f7e3ed82 677 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
81cd0474 678 AT91C_BASE_PDC_SSC->PDC_RNCR = DEMOD_DMA_BUFFER_SIZE;
15c4dc5a 679 }
680 lastRxCounter -= 2;
681 if(lastRxCounter <= 0) {
81cd0474 682 lastRxCounter += DEMOD_DMA_BUFFER_SIZE;
15c4dc5a 683 }
684
685 samples += 2;
686
687 Handle14443UartBit(1);
688 Handle14443UartBit(1);
689
690 if(Handle14443SamplesDemod(ci, cq)) {
691 gotFrame = 1;
692 }
693 }
694
695 if(samples > 2000) {
696 break;
697 }
698 }
699 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
700 if (!quiet) Dbprintf("%x %x %x", max, gotFrame, Demod.len);
701}
702
703//-----------------------------------------------------------------------------
704// Read the tag's response. We just receive a stream of slightly-processed
705// samples from the FPGA, which we will later do some signal processing on,
706// to get the bits.
707//-----------------------------------------------------------------------------
f7e3ed82 708/*static void GetSamplesFor14443(int weTx, int n)
15c4dc5a 709{
f7e3ed82 710 uint8_t *dest = (uint8_t *)BigBuf;
15c4dc5a 711 int c;
712
713 FpgaWriteConfWord(
714 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
715 (weTx ? 0 : FPGA_HF_READER_RX_XCORR_SNOOP));
716
717 c = 0;
718 for(;;) {
719 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
720 AT91C_BASE_SSC->SSC_THR = 0x43;
721 }
722 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 723 int8_t b;
724 b = (int8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 725
f7e3ed82 726 dest[c++] = (uint8_t)b;
15c4dc5a 727
728 if(c >= n) {
729 break;
730 }
731 }
732 }
733}*/
734
735//-----------------------------------------------------------------------------
736// Transmit the command (to the tag) that was placed in ToSend[].
737//-----------------------------------------------------------------------------
738static void TransmitFor14443(void)
739{
740 int c;
741
742 FpgaSetupSsc();
743
744 while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
745 AT91C_BASE_SSC->SSC_THR = 0xff;
746 }
747
748 // Signal field is ON with the appropriate Red LED
749 LED_D_ON();
750 // Signal we are transmitting with the Green LED
751 LED_B_ON();
752 FpgaWriteConfWord(
753 FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
754
755 for(c = 0; c < 10;) {
756 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
757 AT91C_BASE_SSC->SSC_THR = 0xff;
758 c++;
759 }
760 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 761 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 762 (void)r;
763 }
764 WDT_HIT();
765 }
766
767 c = 0;
768 for(;;) {
769 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
770 AT91C_BASE_SSC->SSC_THR = ToSend[c];
771 c++;
772 if(c >= ToSendMax) {
773 break;
774 }
775 }
776 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
f7e3ed82 777 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 778 (void)r;
779 }
780 WDT_HIT();
781 }
782 LED_B_OFF(); // Finished sending
783}
784
785//-----------------------------------------------------------------------------
786// Code a layer 2 command (string of octets, including CRC) into ToSend[],
787// so that it is ready to transmit to the tag using TransmitFor14443().
788//-----------------------------------------------------------------------------
7cf3ef20 789static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
15c4dc5a 790{
791 int i, j;
f7e3ed82 792 uint8_t b;
15c4dc5a 793
794 ToSendReset();
795
796 // Establish initial reference level
797 for(i = 0; i < 40; i++) {
798 ToSendStuffBit(1);
799 }
800 // Send SOF
801 for(i = 0; i < 10; i++) {
802 ToSendStuffBit(0);
803 }
804
805 for(i = 0; i < len; i++) {
806 // Stop bits/EGT
807 ToSendStuffBit(1);
808 ToSendStuffBit(1);
809 // Start bit
810 ToSendStuffBit(0);
811 // Data bits
812 b = cmd[i];
813 for(j = 0; j < 8; j++) {
814 if(b & 1) {
815 ToSendStuffBit(1);
816 } else {
817 ToSendStuffBit(0);
818 }
819 b >>= 1;
820 }
821 }
822 // Send EOF
823 ToSendStuffBit(1);
824 for(i = 0; i < 10; i++) {
825 ToSendStuffBit(0);
826 }
827 for(i = 0; i < 8; i++) {
828 ToSendStuffBit(1);
829 }
830
831 // And then a little more, to make sure that the last character makes
832 // it out before we switch to rx mode.
833 for(i = 0; i < 24; i++) {
834 ToSendStuffBit(1);
835 }
836
837 // Convert from last character reference to length
838 ToSendMax++;
839}
840
841//-----------------------------------------------------------------------------
842// Read an ISO 14443 tag. We send it some set of commands, and record the
843// responses.
844// The command name is misleading, it actually decodes the reponse in HEX
845// into the output buffer (read the result using hexsamples, not hisamples)
7cf3ef20 846//
847// obsolete function only for test
15c4dc5a 848//-----------------------------------------------------------------------------
f7e3ed82 849void AcquireRawAdcSamplesIso14443(uint32_t parameter)
15c4dc5a 850{
f7e3ed82 851 uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
15c4dc5a 852
7cf3ef20 853 SendRawCommand14443B(sizeof(cmd1),1,1,cmd1);
15c4dc5a 854}
855
856//-----------------------------------------------------------------------------
857// Read a SRI512 ISO 14443 tag.
858//
859// SRI512 tags are just simple memory tags, here we're looking at making a dump
860// of the contents of the memory. No anticollision algorithm is done, we assume
861// we have a single tag in the field.
862//
863// I tried to be systematic and check every answer of the tag, every CRC, etc...
864//-----------------------------------------------------------------------------
7cf3ef20 865void ReadSTMemoryIso14443(uint32_t dwLast)
15c4dc5a 866{
f7e3ed82 867 uint8_t i = 0x00;
15c4dc5a 868
7cc204bf 869 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
15c4dc5a 870 // Make sure that we start from off, since the tags are stateful;
871 // confusing things will happen if we don't reset them between reads.
872 LED_D_OFF();
873 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
874 SpinDelay(200);
875
876 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
877 FpgaSetupSsc();
878
879 // Now give it time to spin up.
880 // Signal field is on with the appropriate LED
881 LED_D_ON();
882 FpgaWriteConfWord(
883 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
884 SpinDelay(200);
885
886 // First command: wake up the tag using the INITIATE command
f7e3ed82 887 uint8_t cmd1[] = { 0x06, 0x00, 0x97, 0x5b};
15c4dc5a 888 CodeIso14443bAsReader(cmd1, sizeof(cmd1));
889 TransmitFor14443();
890// LED_A_ON();
891 GetSamplesFor14443Demod(TRUE, 2000,TRUE);
892// LED_A_OFF();
893
894 if (Demod.len == 0) {
895 DbpString("No response from tag");
896 return;
897 } else {
898 Dbprintf("Randomly generated UID from tag (+ 2 byte CRC): %x %x %x",
899 Demod.output[0], Demod.output[1],Demod.output[2]);
900 }
901 // There is a response, SELECT the uid
902 DbpString("Now SELECT tag:");
903 cmd1[0] = 0x0E; // 0x0E is SELECT
904 cmd1[1] = Demod.output[0];
905 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
906 CodeIso14443bAsReader(cmd1, sizeof(cmd1));
907 TransmitFor14443();
908// LED_A_ON();
909 GetSamplesFor14443Demod(TRUE, 2000,TRUE);
910// LED_A_OFF();
911 if (Demod.len != 3) {
912 Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
913 return;
914 }
915 // Check the CRC of the answer:
916 ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]);
917 if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) {
918 DbpString("CRC Error reading select response.");
919 return;
920 }
921 // Check response from the tag: should be the same UID as the command we just sent:
922 if (cmd1[1] != Demod.output[0]) {
923 Dbprintf("Bad response to SELECT from Tag, aborting: %x %x", cmd1[1], Demod.output[0]);
924 return;
925 }
926 // Tag is now selected,
927 // First get the tag's UID:
928 cmd1[0] = 0x0B;
929 ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]);
930 CodeIso14443bAsReader(cmd1, 3); // Only first three bytes for this one
931 TransmitFor14443();
932// LED_A_ON();
933 GetSamplesFor14443Demod(TRUE, 2000,TRUE);
934// LED_A_OFF();
935 if (Demod.len != 10) {
936 Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
937 return;
938 }
939 // The check the CRC of the answer (use cmd1 as temporary variable):
940 ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]);
941 if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) {
942 Dbprintf("CRC Error reading block! - Below: expected, got %x %x",
943 (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]);
944 // Do not return;, let's go on... (we should retry, maybe ?)
945 }
946 Dbprintf("Tag UID (64 bits): %08x %08x",
947 (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
948 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]);
949
7cf3ef20 950 // Now loop to read all 16 blocks, address from 0 to last block
951 Dbprintf("Tag memory dump, block 0 to %d",dwLast);
15c4dc5a 952 cmd1[0] = 0x08;
953 i = 0x00;
954 dwLast++;
955 for (;;) {
956 if (i == dwLast) {
957 DbpString("System area block (0xff):");
958 i = 0xff;
959 }
960 cmd1[1] = i;
961 ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
962 CodeIso14443bAsReader(cmd1, sizeof(cmd1));
963 TransmitFor14443();
964// LED_A_ON();
965 GetSamplesFor14443Demod(TRUE, 2000,TRUE);
966// LED_A_OFF();
967 if (Demod.len != 6) { // Check if we got an answer from the tag
968 DbpString("Expected 6 bytes from tag, got less...");
969 return;
970 }
971 // The check the CRC of the answer (use cmd1 as temporary variable):
972 ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]);
973 if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) {
974 Dbprintf("CRC Error reading block! - Below: expected, got %x %x",
975 (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]);
976 // Do not return;, let's go on... (we should retry, maybe ?)
977 }
978 // Now print out the memory location:
979 Dbprintf("Address=%x, Contents=%x, CRC=%x", i,
980 (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0],
981 (Demod.output[4]<<8)+Demod.output[5]);
982 if (i == 0xff) {
983 break;
984 }
985 i++;
986 }
987}
988
989
990//=============================================================================
991// Finally, the `sniffer' combines elements from both the reader and
992// simulated tag, to show both sides of the conversation.
993//=============================================================================
994
995//-----------------------------------------------------------------------------
996// Record the sequence of commands sent by the reader to the tag, with
997// triggering so that we start recording at the point that the tag is moved
998// near the reader.
999//-----------------------------------------------------------------------------
1000/*
1001 * Memory usage for this function, (within BigBuf)
1002 * 0-4095 : Demodulated samples receive (4096 bytes) - DEMOD_TRACE_SIZE
1003 * 4096-6143 : Last Received command, 2048 bytes (reader->tag) - READER_TAG_BUFFER_SIZE
1004 * 6144-8191 : Last Received command, 2048 bytes(tag->reader) - TAG_READER_BUFFER_SIZE
81cd0474 1005 * 8192-9215 : DMA Buffer, 1024 bytes (samples) - DEMOD_DMA_BUFFER_SIZE
15c4dc5a 1006 */
0f7f9edc 1007void RAMFUNC SnoopIso14443(void)
15c4dc5a 1008{
1009 // We won't start recording the frames that we acquire until we trigger;
1010 // a good trigger condition to get started is probably when we see a
1011 // response from the tag.
0f7f9edc 1012 int triggered = TRUE;
15c4dc5a 1013
7cc204bf 1014 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
15c4dc5a 1015 // The command (reader -> tag) that we're working on receiving.
f7e3ed82 1016 uint8_t *receivedCmd = (uint8_t *)(BigBuf) + DEMOD_TRACE_SIZE;
15c4dc5a 1017 // The response (tag -> reader) that we're working on receiving.
f7e3ed82 1018 uint8_t *receivedResponse = (uint8_t *)(BigBuf) + DEMOD_TRACE_SIZE + READER_TAG_BUFFER_SIZE;
15c4dc5a 1019
1020 // As we receive stuff, we copy it from receivedCmd or receivedResponse
1021 // into trace, along with its length and other annotations.
f7e3ed82 1022 uint8_t *trace = (uint8_t *)BigBuf;
15c4dc5a 1023 int traceLen = 0;
1024
1025 // The DMA buffer, used to stream samples from the FPGA.
f7e3ed82 1026 int8_t *dmaBuf = (int8_t *)(BigBuf) + DEMOD_TRACE_SIZE + READER_TAG_BUFFER_SIZE + TAG_READER_BUFFER_SIZE;
15c4dc5a 1027 int lastRxCounter;
f7e3ed82 1028 int8_t *upTo;
15c4dc5a 1029 int ci, cq;
1030 int maxBehindBy = 0;
1031
1032 // Count of samples received so far, so that we can include timing
1033 // information in the trace buffer.
1034 int samples = 0;
1035
1036 // Initialize the trace buffer
1037 memset(trace, 0x44, DEMOD_TRACE_SIZE);
1038
1039 // Set up the demodulator for tag -> reader responses.
1040 Demod.output = receivedResponse;
1041 Demod.len = 0;
1042 Demod.state = DEMOD_UNSYNCD;
1043
1044 // And the reader -> tag commands
1045 memset(&Uart, 0, sizeof(Uart));
1046 Uart.output = receivedCmd;
1047 Uart.byteCntMax = 100;
1048 Uart.state = STATE_UNSYNCD;
1049
7cf3ef20 1050 // Print some debug information about the buffer sizes
1051 Dbprintf("Snooping buffers initialized:");
1052 Dbprintf(" Trace: %i bytes", DEMOD_TRACE_SIZE);
1053 Dbprintf(" Reader -> tag: %i bytes", READER_TAG_BUFFER_SIZE);
1054 Dbprintf(" tag -> Reader: %i bytes", TAG_READER_BUFFER_SIZE);
1055 Dbprintf(" DMA: %i bytes", DEMOD_DMA_BUFFER_SIZE);
e30c654b 1056
15c4dc5a 1057 // And put the FPGA in the appropriate mode
1058 // Signal field is off with the appropriate LED
1059 LED_D_OFF();
1060 FpgaWriteConfWord(
1061 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ |
1062 FPGA_HF_READER_RX_XCORR_SNOOP);
1063 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1064
1065 // Setup for the DMA.
1066 FpgaSetupSsc();
1067 upTo = dmaBuf;
81cd0474 1068 lastRxCounter = DEMOD_DMA_BUFFER_SIZE;
1069 FpgaSetupSscDma((uint8_t *)dmaBuf, DEMOD_DMA_BUFFER_SIZE);
0f7f9edc 1070
1071 LED_A_ON();
1072
15c4dc5a 1073 // And now we loop, receiving samples.
1074 for(;;) {
15c4dc5a 1075 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
81cd0474 1076 (DEMOD_DMA_BUFFER_SIZE-1);
15c4dc5a 1077 if(behindBy > maxBehindBy) {
1078 maxBehindBy = behindBy;
81cd0474 1079 if(behindBy > (DEMOD_DMA_BUFFER_SIZE-2)) { // TODO: understand whether we can increase/decrease as we want or not?
7e758047 1080 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
15c4dc5a 1081 goto done;
1082 }
1083 }
1084 if(behindBy < 2) continue;
1085
1086 ci = upTo[0];
1087 cq = upTo[1];
1088 upTo += 2;
1089 lastRxCounter -= 2;
81cd0474 1090 if(upTo - dmaBuf > DEMOD_DMA_BUFFER_SIZE) {
1091 upTo -= DEMOD_DMA_BUFFER_SIZE;
1092 lastRxCounter += DEMOD_DMA_BUFFER_SIZE;
f7e3ed82 1093 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
81cd0474 1094 AT91C_BASE_PDC_SSC->PDC_RNCR = DEMOD_DMA_BUFFER_SIZE;
15c4dc5a 1095 }
1096
1097 samples += 2;
1098
1099#define HANDLE_BIT_IF_BODY \
1100 if(triggered) { \
15c4dc5a 1101 trace[traceLen++] = ((samples >> 0) & 0xff); \
1102 trace[traceLen++] = ((samples >> 8) & 0xff); \
1103 trace[traceLen++] = ((samples >> 16) & 0xff); \
1104 trace[traceLen++] = ((samples >> 24) & 0xff); \
1105 trace[traceLen++] = 0; \
1106 trace[traceLen++] = 0; \
1107 trace[traceLen++] = 0; \
1108 trace[traceLen++] = 0; \
1109 trace[traceLen++] = Uart.byteCnt; \
1110 memcpy(trace+traceLen, receivedCmd, Uart.byteCnt); \
1111 traceLen += Uart.byteCnt; \
1112 if(traceLen > 1000) break; \
1113 } \
1114 /* And ready to receive another command. */ \
1115 memset(&Uart, 0, sizeof(Uart)); \
1116 Uart.output = receivedCmd; \
1117 Uart.byteCntMax = 100; \
1118 Uart.state = STATE_UNSYNCD; \
1119 /* And also reset the demod code, which might have been */ \
1120 /* false-triggered by the commands from the reader. */ \
1121 memset(&Demod, 0, sizeof(Demod)); \
1122 Demod.output = receivedResponse; \
1123 Demod.state = DEMOD_UNSYNCD; \
1124
1125 if(Handle14443UartBit(ci & 1)) {
1126 HANDLE_BIT_IF_BODY
1127 }
1128 if(Handle14443UartBit(cq & 1)) {
1129 HANDLE_BIT_IF_BODY
1130 }
1131
1132 if(Handle14443SamplesDemod(ci, cq)) {
1133 // timestamp, as a count of samples
1134 trace[traceLen++] = ((samples >> 0) & 0xff);
1135 trace[traceLen++] = ((samples >> 8) & 0xff);
1136 trace[traceLen++] = ((samples >> 16) & 0xff);
1137 trace[traceLen++] = 0x80 | ((samples >> 24) & 0xff);
1138 // correlation metric (~signal strength estimate)
1139 if(Demod.metricN != 0) {
1140 Demod.metric /= Demod.metricN;
1141 }
1142 trace[traceLen++] = ((Demod.metric >> 0) & 0xff);
1143 trace[traceLen++] = ((Demod.metric >> 8) & 0xff);
1144 trace[traceLen++] = ((Demod.metric >> 16) & 0xff);
1145 trace[traceLen++] = ((Demod.metric >> 24) & 0xff);
1146 // length
1147 trace[traceLen++] = Demod.len;
1148 memcpy(trace+traceLen, receivedResponse, Demod.len);
1149 traceLen += Demod.len;
e30c654b 1150 if(traceLen > DEMOD_TRACE_SIZE) {
15c4dc5a 1151 DbpString("Reached trace limit");
1152 goto done;
1153 }
1154
1155 triggered = TRUE;
0f7f9edc 1156 LED_A_OFF();
1157 LED_B_ON();
15c4dc5a 1158
1159 // And ready to receive another response.
1160 memset(&Demod, 0, sizeof(Demod));
1161 Demod.output = receivedResponse;
1162 Demod.state = DEMOD_UNSYNCD;
1163 }
7cf3ef20 1164 WDT_HIT();
15c4dc5a 1165
1166 if(BUTTON_PRESS()) {
1167 DbpString("cancelled");
1168 goto done;
1169 }
1170 }
1171
1172done:
0f7f9edc 1173 LED_A_OFF();
1174 LED_B_OFF();
1175 LED_C_OFF();
1176 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
15c4dc5a 1177 DbpString("Snoop statistics:");
0f7f9edc 1178 Dbprintf(" Max behind by: %i", maxBehindBy);
15c4dc5a 1179 Dbprintf(" Uart State: %x", Uart.state);
1180 Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt);
1181 Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax);
1182 Dbprintf(" Trace length: %i", traceLen);
1183}
7cf3ef20 1184
1185/*
1186 * Send raw command to tag ISO14443B
1187 * @Input
1188 * datalen len of buffer data
1189 * recv bool when true wait for data from tag and send to client
1190 * powerfield bool leave the field on when true
1191 * data buffer with byte to send
1192 *
1193 * @Output
1194 * none
1195 *
1196 */
1197
1198void SendRawCommand14443B(uint32_t datalen, uint32_t recv,uint8_t powerfield, uint8_t data[])
1199{
7cc204bf 1200 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
7cf3ef20 1201 if(!powerfield)
1202 {
1203 // Make sure that we start from off, since the tags are stateful;
1204 // confusing things will happen if we don't reset them between reads.
1205 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1206 LED_D_OFF();
1207 SpinDelay(200);
1208 }
1209
1210 if(!GETBIT(GPIO_LED_D))
1211 {
1212 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1213 FpgaSetupSsc();
1214
1215 // Now give it time to spin up.
1216 // Signal field is on with the appropriate LED
1217 LED_D_ON();
1218 FpgaWriteConfWord(
1219 FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
1220 SpinDelay(200);
1221 }
1222
1223 CodeIso14443bAsReader(data, datalen);
1224 TransmitFor14443();
1225 if(recv)
1226 {
1227 uint16_t iLen = MIN(Demod.len,USB_CMD_DATA_SIZE);
1228 GetSamplesFor14443Demod(TRUE, 2000, TRUE);
1229 cmd_send(CMD_ACK,iLen,0,0,Demod.output,iLen);
1230 }
1231 if(!powerfield)
1232 {
1233 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1234 LED_D_OFF();
1235 }
1236}
1237
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