fix clock detection when ST used
[proxmark3-svn] / fpga / lo_passthru.v
CommitLineData
ba06a4b6 1//-----------------------------------------------------------------------------
2// For reading TI tags, we need to place the FPGA in pass through mode
3// and pass everything through to the ARM
4//-----------------------------------------------------------------------------
fa57f6e1 5// iZsh <izsh at fail0verflow.com>, June 2014
ba06a4b6 6
7module lo_passthru(
7cc204bf 8 input pck_divclk,
9 output pwr_lo, output pwr_hi,
10 output pwr_oe1, output pwr_oe2, output pwr_oe3, output pwr_oe4,
11 output adc_clk,
12 output ssp_din, input ssp_dout,
13 input cross_lo,
14 output dbg
ba06a4b6 15);
ba06a4b6 16
17// the antenna is modulated when ssp_dout = 1, when 0 the
18// antenna drivers stop modulating and go into listen mode
19assign pwr_oe3 = 1'b0;
20assign pwr_oe1 = ssp_dout;
21assign pwr_oe2 = ssp_dout;
22assign pwr_oe4 = ssp_dout;
7cc204bf 23assign pwr_lo = pck_divclk && ssp_dout;
ba06a4b6 24assign pwr_hi = 1'b0;
25assign adc_clk = 1'b0;
26assign ssp_din = cross_lo;
27assign dbg = cross_lo;
28
29endmodule
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