Commit | Line | Data |
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15c4dc5a | 1 | //----------------------------------------------------------------------------- |
bd20f8f4 | 2 | // Jonathan Westhues, split Nov 2006 |
3 | // | |
4 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
5 | // at your option, any later version. See the LICENSE.txt file for the text of | |
6 | // the license. | |
7 | //----------------------------------------------------------------------------- | |
51d4f6f1 | 8 | // Routines to support ISO 14443B. This includes both the reader software and |
9 | // the `fake tag' modes. | |
15c4dc5a | 10 | //----------------------------------------------------------------------------- |
bd20f8f4 | 11 | |
e30c654b | 12 | #include "proxmark3.h" |
15c4dc5a | 13 | #include "apps.h" |
f7e3ed82 | 14 | #include "util.h" |
9ab7a6c7 | 15 | #include "string.h" |
15c4dc5a | 16 | |
f7e3ed82 | 17 | #include "iso14443crc.h" |
15c4dc5a | 18 | |
0d9a86c7 | 19 | #define RECEIVE_SAMPLES_TIMEOUT 2000 |
705bfa10 | 20 | #define ISO14443B_DMA_BUFFER_SIZE 256 |
0d9a86c7 | 21 | |
4be27083 FM |
22 | // PCB Block number for APDUs |
23 | static uint8_t pcb_blocknum = 0; | |
24 | ||
15c4dc5a | 25 | //============================================================================= |
26 | // An ISO 14443 Type B tag. We listen for commands from the reader, using | |
27 | // a UART kind of thing that's implemented in software. When we get a | |
28 | // frame (i.e., a group of bytes between SOF and EOF), we check the CRC. | |
29 | // If it's good, then we can do something appropriate with it, and send | |
30 | // a response. | |
31 | //============================================================================= | |
32 | ||
33 | //----------------------------------------------------------------------------- | |
34 | // Code up a string of octets at layer 2 (including CRC, we don't generate | |
35 | // that here) so that they can be transmitted to the reader. Doesn't transmit | |
36 | // them yet, just leaves them ready to send in ToSend[]. | |
37 | //----------------------------------------------------------------------------- | |
f7e3ed82 | 38 | static void CodeIso14443bAsTag(const uint8_t *cmd, int len) |
15c4dc5a | 39 | { |
7d5ebac9 MHS |
40 | int i; |
41 | ||
42 | ToSendReset(); | |
43 | ||
44 | // Transmit a burst of ones, as the initial thing that lets the | |
45 | // reader get phase sync. This (TR1) must be > 80/fs, per spec, | |
46 | // but tag that I've tried (a Paypass) exceeds that by a fair bit, | |
47 | // so I will too. | |
48 | for(i = 0; i < 20; i++) { | |
49 | ToSendStuffBit(1); | |
50 | ToSendStuffBit(1); | |
51 | ToSendStuffBit(1); | |
52 | ToSendStuffBit(1); | |
53 | } | |
54 | ||
55 | // Send SOF. | |
56 | for(i = 0; i < 10; i++) { | |
57 | ToSendStuffBit(0); | |
58 | ToSendStuffBit(0); | |
59 | ToSendStuffBit(0); | |
60 | ToSendStuffBit(0); | |
61 | } | |
62 | for(i = 0; i < 2; i++) { | |
63 | ToSendStuffBit(1); | |
64 | ToSendStuffBit(1); | |
65 | ToSendStuffBit(1); | |
66 | ToSendStuffBit(1); | |
67 | } | |
68 | ||
69 | for(i = 0; i < len; i++) { | |
70 | int j; | |
71 | uint8_t b = cmd[i]; | |
72 | ||
73 | // Start bit | |
74 | ToSendStuffBit(0); | |
75 | ToSendStuffBit(0); | |
76 | ToSendStuffBit(0); | |
77 | ToSendStuffBit(0); | |
78 | ||
79 | // Data bits | |
80 | for(j = 0; j < 8; j++) { | |
81 | if(b & 1) { | |
82 | ToSendStuffBit(1); | |
83 | ToSendStuffBit(1); | |
84 | ToSendStuffBit(1); | |
85 | ToSendStuffBit(1); | |
86 | } else { | |
87 | ToSendStuffBit(0); | |
88 | ToSendStuffBit(0); | |
89 | ToSendStuffBit(0); | |
90 | ToSendStuffBit(0); | |
91 | } | |
92 | b >>= 1; | |
93 | } | |
94 | ||
95 | // Stop bit | |
96 | ToSendStuffBit(1); | |
97 | ToSendStuffBit(1); | |
98 | ToSendStuffBit(1); | |
99 | ToSendStuffBit(1); | |
100 | } | |
101 | ||
51d4f6f1 | 102 | // Send EOF. |
7d5ebac9 MHS |
103 | for(i = 0; i < 10; i++) { |
104 | ToSendStuffBit(0); | |
105 | ToSendStuffBit(0); | |
106 | ToSendStuffBit(0); | |
107 | ToSendStuffBit(0); | |
108 | } | |
51d4f6f1 | 109 | for(i = 0; i < 2; i++) { |
7d5ebac9 MHS |
110 | ToSendStuffBit(1); |
111 | ToSendStuffBit(1); | |
112 | ToSendStuffBit(1); | |
113 | ToSendStuffBit(1); | |
114 | } | |
115 | ||
116 | // Convert from last byte pos to length | |
117 | ToSendMax++; | |
15c4dc5a | 118 | } |
119 | ||
120 | //----------------------------------------------------------------------------- | |
121 | // The software UART that receives commands from the reader, and its state | |
122 | // variables. | |
123 | //----------------------------------------------------------------------------- | |
124 | static struct { | |
7d5ebac9 MHS |
125 | enum { |
126 | STATE_UNSYNCD, | |
127 | STATE_GOT_FALLING_EDGE_OF_SOF, | |
128 | STATE_AWAITING_START_BIT, | |
46734099 | 129 | STATE_RECEIVING_DATA |
7d5ebac9 MHS |
130 | } state; |
131 | uint16_t shiftReg; | |
132 | int bitCnt; | |
133 | int byteCnt; | |
134 | int byteCntMax; | |
135 | int posCnt; | |
136 | uint8_t *output; | |
15c4dc5a | 137 | } Uart; |
138 | ||
139 | /* Receive & handle a bit coming from the reader. | |
51d4f6f1 | 140 | * |
141 | * This function is called 4 times per bit (every 2 subcarrier cycles). | |
142 | * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us | |
15c4dc5a | 143 | * |
144 | * LED handling: | |
145 | * LED A -> ON once we have received the SOF and are expecting the rest. | |
146 | * LED A -> OFF once we have received EOF or are in error state or unsynced | |
147 | * | |
148 | * Returns: true if we received a EOF | |
149 | * false if we are still waiting for some more | |
150 | */ | |
46734099 | 151 | static RAMFUNC int Handle14443bUartBit(uint8_t bit) |
15c4dc5a | 152 | { |
7d5ebac9 | 153 | switch(Uart.state) { |
03dc1740 | 154 | case STATE_UNSYNCD: |
7d5ebac9 MHS |
155 | if(!bit) { |
156 | // we went low, so this could be the beginning | |
157 | // of an SOF | |
158 | Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF; | |
159 | Uart.posCnt = 0; | |
160 | Uart.bitCnt = 0; | |
161 | } | |
162 | break; | |
163 | ||
164 | case STATE_GOT_FALLING_EDGE_OF_SOF: | |
165 | Uart.posCnt++; | |
51d4f6f1 | 166 | if(Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit |
7d5ebac9 | 167 | if(bit) { |
51d4f6f1 | 168 | if(Uart.bitCnt > 9) { |
7d5ebac9 MHS |
169 | // we've seen enough consecutive |
170 | // zeros that it's a valid SOF | |
171 | Uart.posCnt = 0; | |
172 | Uart.byteCnt = 0; | |
173 | Uart.state = STATE_AWAITING_START_BIT; | |
174 | LED_A_ON(); // Indicate we got a valid SOF | |
175 | } else { | |
176 | // didn't stay down long enough | |
177 | // before going high, error | |
46734099 | 178 | Uart.state = STATE_UNSYNCD; |
7d5ebac9 MHS |
179 | } |
180 | } else { | |
181 | // do nothing, keep waiting | |
182 | } | |
183 | Uart.bitCnt++; | |
184 | } | |
185 | if(Uart.posCnt >= 4) Uart.posCnt = 0; | |
51d4f6f1 | 186 | if(Uart.bitCnt > 12) { |
7d5ebac9 MHS |
187 | // Give up if we see too many zeros without |
188 | // a one, too. | |
46734099 | 189 | LED_A_OFF(); |
190 | Uart.state = STATE_UNSYNCD; | |
7d5ebac9 MHS |
191 | } |
192 | break; | |
193 | ||
194 | case STATE_AWAITING_START_BIT: | |
195 | Uart.posCnt++; | |
196 | if(bit) { | |
51d4f6f1 | 197 | if(Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs |
7d5ebac9 MHS |
198 | // stayed high for too long between |
199 | // characters, error | |
46734099 | 200 | Uart.state = STATE_UNSYNCD; |
7d5ebac9 MHS |
201 | } |
202 | } else { | |
203 | // falling edge, this starts the data byte | |
204 | Uart.posCnt = 0; | |
205 | Uart.bitCnt = 0; | |
206 | Uart.shiftReg = 0; | |
207 | Uart.state = STATE_RECEIVING_DATA; | |
7d5ebac9 MHS |
208 | } |
209 | break; | |
210 | ||
211 | case STATE_RECEIVING_DATA: | |
212 | Uart.posCnt++; | |
213 | if(Uart.posCnt == 2) { | |
214 | // time to sample a bit | |
215 | Uart.shiftReg >>= 1; | |
216 | if(bit) { | |
217 | Uart.shiftReg |= 0x200; | |
218 | } | |
219 | Uart.bitCnt++; | |
220 | } | |
221 | if(Uart.posCnt >= 4) { | |
222 | Uart.posCnt = 0; | |
223 | } | |
224 | if(Uart.bitCnt == 10) { | |
225 | if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001)) | |
226 | { | |
227 | // this is a data byte, with correct | |
228 | // start and stop bits | |
229 | Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff; | |
230 | Uart.byteCnt++; | |
231 | ||
232 | if(Uart.byteCnt >= Uart.byteCntMax) { | |
233 | // Buffer overflowed, give up | |
46734099 | 234 | LED_A_OFF(); |
235 | Uart.state = STATE_UNSYNCD; | |
7d5ebac9 MHS |
236 | } else { |
237 | // so get the next byte now | |
238 | Uart.posCnt = 0; | |
239 | Uart.state = STATE_AWAITING_START_BIT; | |
240 | } | |
46734099 | 241 | } else if (Uart.shiftReg == 0x000) { |
7d5ebac9 MHS |
242 | // this is an EOF byte |
243 | LED_A_OFF(); // Finished receiving | |
46734099 | 244 | Uart.state = STATE_UNSYNCD; |
132a0217 | 245 | if (Uart.byteCnt != 0) { |
246 | return TRUE; | |
247 | } | |
7d5ebac9 MHS |
248 | } else { |
249 | // this is an error | |
46734099 | 250 | LED_A_OFF(); |
251 | Uart.state = STATE_UNSYNCD; | |
7d5ebac9 MHS |
252 | } |
253 | } | |
254 | break; | |
255 | ||
7d5ebac9 | 256 | default: |
46734099 | 257 | LED_A_OFF(); |
7d5ebac9 MHS |
258 | Uart.state = STATE_UNSYNCD; |
259 | break; | |
260 | } | |
261 | ||
7d5ebac9 | 262 | return FALSE; |
15c4dc5a | 263 | } |
264 | ||
46734099 | 265 | |
266 | static void UartReset() | |
267 | { | |
268 | Uart.byteCntMax = MAX_FRAME_SIZE; | |
269 | Uart.state = STATE_UNSYNCD; | |
270 | Uart.byteCnt = 0; | |
271 | Uart.bitCnt = 0; | |
272 | } | |
273 | ||
274 | ||
275 | static void UartInit(uint8_t *data) | |
276 | { | |
277 | Uart.output = data; | |
278 | UartReset(); | |
279 | } | |
280 | ||
281 | ||
15c4dc5a | 282 | //----------------------------------------------------------------------------- |
283 | // Receive a command (from the reader to us, where we are the simulated tag), | |
284 | // and store it in the given buffer, up to the given maximum length. Keeps | |
285 | // spinning, waiting for a well-framed command, until either we get one | |
286 | // (returns TRUE) or someone presses the pushbutton on the board (FALSE). | |
287 | // | |
288 | // Assume that we're called with the SSC (to the FPGA) and ADC path set | |
289 | // correctly. | |
290 | //----------------------------------------------------------------------------- | |
46734099 | 291 | static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) |
15c4dc5a | 292 | { |
51d4f6f1 | 293 | // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen |
7d5ebac9 MHS |
294 | // only, since we are receiving, not transmitting). |
295 | // Signal field is off with the appropriate LED | |
296 | LED_D_OFF(); | |
297 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION); | |
298 | ||
7d5ebac9 | 299 | // Now run a `software UART' on the stream of incoming samples. |
46734099 | 300 | UartInit(received); |
7d5ebac9 MHS |
301 | |
302 | for(;;) { | |
303 | WDT_HIT(); | |
304 | ||
305 | if(BUTTON_PRESS()) return FALSE; | |
306 | ||
7d5ebac9 MHS |
307 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
308 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
46734099 | 309 | for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) { |
310 | if(Handle14443bUartBit(b & mask)) { | |
7d5ebac9 MHS |
311 | *len = Uart.byteCnt; |
312 | return TRUE; | |
313 | } | |
314 | } | |
315 | } | |
316 | } | |
bee99bbf | 317 | |
46734099 | 318 | return FALSE; |
15c4dc5a | 319 | } |
320 | ||
321 | //----------------------------------------------------------------------------- | |
322 | // Main loop of simulated tag: receive commands from reader, decide what | |
323 | // response to send, and send it. | |
324 | //----------------------------------------------------------------------------- | |
51d4f6f1 | 325 | void SimulateIso14443bTag(void) |
15c4dc5a | 326 | { |
14660057 | 327 | // the only commands we understand is WUPB, AFI=0, Select All, N=1: |
328 | static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB | |
329 | // ... and REQB, AFI=0, Normal Request, N=1: | |
f3b83bee | 330 | static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB |
f3b83bee | 331 | // ... and HLTB |
14660057 | 332 | static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB |
f3b83bee | 333 | // ... and ATTRIB |
14660057 | 334 | static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB |
46734099 | 335 | |
336 | // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922, | |
51d4f6f1 | 337 | // supports only 106kBit/s in both directions, max frame size = 32Bytes, |
338 | // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported: | |
7d5ebac9 MHS |
339 | static const uint8_t response1[] = { |
340 | 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22, | |
341 | 0x00, 0x21, 0x85, 0x5e, 0xd7 | |
342 | }; | |
f3b83bee | 343 | // response to HLTB and ATTRIB |
344 | static const uint8_t response2[] = {0x00, 0x78, 0xF0}; | |
345 | ||
15c4dc5a | 346 | |
5f605b8f | 347 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
348 | ||
46734099 | 349 | clear_trace(); |
350 | set_tracing(TRUE); | |
351 | ||
352 | const uint8_t *resp; | |
353 | uint8_t *respCode; | |
354 | uint16_t respLen, respCodeLen; | |
15c4dc5a | 355 | |
51d4f6f1 | 356 | // allocate command receive buffer |
357 | BigBuf_free(); | |
358 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); | |
15c4dc5a | 359 | |
46734099 | 360 | uint16_t len; |
361 | uint16_t cmdsRecvd = 0; | |
15c4dc5a | 362 | |
51d4f6f1 | 363 | // prepare the (only one) tag answer: |
7d5ebac9 | 364 | CodeIso14443bAsTag(response1, sizeof(response1)); |
46734099 | 365 | uint8_t *resp1Code = BigBuf_malloc(ToSendMax); |
dd57061c | 366 | memcpy(resp1Code, ToSend, ToSendMax); |
46734099 | 367 | uint16_t resp1CodeLen = ToSendMax; |
15c4dc5a | 368 | |
f3b83bee | 369 | // prepare the (other) tag answer: |
370 | CodeIso14443bAsTag(response2, sizeof(response2)); | |
371 | uint8_t *resp2Code = BigBuf_malloc(ToSendMax); | |
dd57061c | 372 | memcpy(resp2Code, ToSend, ToSendMax); |
f3b83bee | 373 | uint16_t resp2CodeLen = ToSendMax; |
374 | ||
7d5ebac9 MHS |
375 | // We need to listen to the high-frequency, peak-detected path. |
376 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
377 | FpgaSetupSsc(); | |
15c4dc5a | 378 | |
7d5ebac9 | 379 | cmdsRecvd = 0; |
15c4dc5a | 380 | |
7d5ebac9 | 381 | for(;;) { |
15c4dc5a | 382 | |
46734099 | 383 | if(!GetIso14443bCommandFromReader(receivedCmd, &len)) { |
51d4f6f1 | 384 | Dbprintf("button pressed, received %d commands", cmdsRecvd); |
385 | break; | |
46734099 | 386 | } |
7d5ebac9 | 387 | |
46734099 | 388 | if (tracing) { |
389 | uint8_t parity[MAX_PARITY_SIZE]; | |
390 | LogTrace(receivedCmd, len, 0, 0, parity, TRUE); | |
391 | } | |
7d5ebac9 | 392 | |
46734099 | 393 | // Good, look at the command now. |
394 | if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0) | |
14660057 | 395 | || (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) { |
dd57061c | 396 | resp = response1; |
46734099 | 397 | respLen = sizeof(response1); |
dd57061c | 398 | respCode = resp1Code; |
46734099 | 399 | respCodeLen = resp1CodeLen; |
14660057 | 400 | } else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0]) |
401 | || (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) { | |
dd57061c | 402 | resp = response2; |
f3b83bee | 403 | respLen = sizeof(response2); |
dd57061c | 404 | respCode = resp2Code; |
f3b83bee | 405 | respCodeLen = resp2CodeLen; |
7d5ebac9 MHS |
406 | } else { |
407 | Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd); | |
408 | // And print whether the CRC fails, just for good measure | |
46734099 | 409 | uint8_t b1, b2; |
f3b83bee | 410 | if (len >= 3){ // if crc exists |
411 | ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2); | |
412 | if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) { | |
413 | // Not so good, try again. | |
414 | DbpString("+++CRC fail"); | |
14660057 | 415 | |
f3b83bee | 416 | } else { |
417 | DbpString("CRC passes"); | |
418 | } | |
7d5ebac9 | 419 | } |
f3b83bee | 420 | //get rid of compiler warning |
421 | respCodeLen = 0; | |
422 | resp = response1; | |
423 | respLen = 0; | |
424 | respCode = resp1Code; | |
425 | //don't crash at new command just wait and see if reader will send other new cmds. | |
426 | //break; | |
7d5ebac9 MHS |
427 | } |
428 | ||
7d5ebac9 MHS |
429 | cmdsRecvd++; |
430 | ||
431 | if(cmdsRecvd > 0x30) { | |
432 | DbpString("many commands later..."); | |
433 | break; | |
434 | } | |
435 | ||
46734099 | 436 | if(respCodeLen <= 0) continue; |
7d5ebac9 MHS |
437 | |
438 | // Modulate BPSK | |
439 | // Signal field is off with the appropriate LED | |
440 | LED_D_OFF(); | |
441 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK); | |
442 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
443 | FpgaSetupSsc(); | |
444 | ||
445 | // Transmit the response. | |
46734099 | 446 | uint16_t i = 0; |
7d5ebac9 MHS |
447 | for(;;) { |
448 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
46734099 | 449 | uint8_t b = respCode[i]; |
7d5ebac9 MHS |
450 | |
451 | AT91C_BASE_SSC->SSC_THR = b; | |
452 | ||
453 | i++; | |
46734099 | 454 | if(i > respCodeLen) { |
7d5ebac9 MHS |
455 | break; |
456 | } | |
457 | } | |
458 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
459 | volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
460 | (void)b; | |
461 | } | |
462 | } | |
dd57061c | 463 | |
46734099 | 464 | // trace the response: |
465 | if (tracing) { | |
466 | uint8_t parity[MAX_PARITY_SIZE]; | |
467 | LogTrace(resp, respLen, 0, 0, parity, FALSE); | |
468 | } | |
dd57061c | 469 | |
7d5ebac9 | 470 | } |
15c4dc5a | 471 | } |
472 | ||
473 | //============================================================================= | |
474 | // An ISO 14443 Type B reader. We take layer two commands, code them | |
475 | // appropriately, and then send them to the tag. We then listen for the | |
476 | // tag's response, which we leave in the buffer to be demodulated on the | |
477 | // PC side. | |
478 | //============================================================================= | |
479 | ||
480 | static struct { | |
7d5ebac9 MHS |
481 | enum { |
482 | DEMOD_UNSYNCD, | |
483 | DEMOD_PHASE_REF_TRAINING, | |
484 | DEMOD_AWAITING_FALLING_EDGE_OF_SOF, | |
485 | DEMOD_GOT_FALLING_EDGE_OF_SOF, | |
486 | DEMOD_AWAITING_START_BIT, | |
46734099 | 487 | DEMOD_RECEIVING_DATA |
7d5ebac9 MHS |
488 | } state; |
489 | int bitCount; | |
490 | int posCount; | |
491 | int thisBit; | |
51d4f6f1 | 492 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. |
7d5ebac9 MHS |
493 | int metric; |
494 | int metricN; | |
51d4f6f1 | 495 | */ |
7d5ebac9 MHS |
496 | uint16_t shiftReg; |
497 | uint8_t *output; | |
498 | int len; | |
499 | int sumI; | |
500 | int sumQ; | |
15c4dc5a | 501 | } Demod; |
502 | ||
503 | /* | |
504 | * Handles reception of a bit from the tag | |
505 | * | |
51d4f6f1 | 506 | * This function is called 2 times per bit (every 4 subcarrier cycles). |
507 | * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us | |
508 | * | |
15c4dc5a | 509 | * LED handling: |
510 | * LED C -> ON once we have received the SOF and are expecting the rest. | |
511 | * LED C -> OFF once we have received EOF or are unsynced | |
512 | * | |
513 | * Returns: true if we received a EOF | |
514 | * false if we are still waiting for some more | |
515 | * | |
516 | */ | |
51d4f6f1 | 517 | static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) |
15c4dc5a | 518 | { |
7d5ebac9 | 519 | int v; |
15c4dc5a | 520 | |
51d4f6f1 | 521 | // The soft decision on the bit uses an estimate of just the |
522 | // quadrant of the reference angle, not the exact angle. | |
15c4dc5a | 523 | #define MAKE_SOFT_DECISION() { \ |
7d5ebac9 MHS |
524 | if(Demod.sumI > 0) { \ |
525 | v = ci; \ | |
526 | } else { \ | |
527 | v = -ci; \ | |
528 | } \ | |
529 | if(Demod.sumQ > 0) { \ | |
530 | v += cq; \ | |
531 | } else { \ | |
532 | v -= cq; \ | |
533 | } \ | |
534 | } | |
15c4dc5a | 535 | |
51d4f6f1 | 536 | #define SUBCARRIER_DETECT_THRESHOLD 8 |
537 | ||
538 | // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq) | |
539 | /* #define CHECK_FOR_SUBCARRIER() { \ | |
540 | v = ci; \ | |
541 | if(v < 0) v = -v; \ | |
542 | if(cq > 0) { \ | |
543 | v += cq; \ | |
544 | } else { \ | |
545 | v -= cq; \ | |
546 | } \ | |
dd57061c | 547 | } |
51d4f6f1 | 548 | */ |
549 | // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq))) | |
cf194819 | 550 | |
551 | //note: couldn't we just use MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2) from common.h - marshmellow | |
51d4f6f1 | 552 | #define CHECK_FOR_SUBCARRIER() { \ |
cf194819 | 553 | v = MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2); \ |
554 | } | |
555 | /* | |
51d4f6f1 | 556 | if(ci < 0) { \ |
cf194819 | 557 | if(cq < 0) { \ // ci < 0, cq < 0 |
51d4f6f1 | 558 | if (cq < ci) { \ |
559 | v = -cq - (ci >> 1); \ | |
560 | } else { \ | |
561 | v = -ci - (cq >> 1); \ | |
562 | } \ | |
cf194819 | 563 | } else { \ // ci < 0, cq >= 0 |
51d4f6f1 | 564 | if (cq < -ci) { \ |
565 | v = -ci + (cq >> 1); \ | |
566 | } else { \ | |
567 | v = cq - (ci >> 1); \ | |
568 | } \ | |
569 | } \ | |
570 | } else { \ | |
cf194819 | 571 | if(cq < 0) { \ // ci >= 0, cq < 0 |
51d4f6f1 | 572 | if (-cq < ci) { \ |
573 | v = ci - (cq >> 1); \ | |
574 | } else { \ | |
575 | v = -cq + (ci >> 1); \ | |
576 | } \ | |
cf194819 | 577 | } else { \ // ci >= 0, cq >= 0 |
51d4f6f1 | 578 | if (cq < ci) { \ |
579 | v = ci + (cq >> 1); \ | |
580 | } else { \ | |
581 | v = cq + (ci >> 1); \ | |
582 | } \ | |
583 | } \ | |
584 | } \ | |
585 | } | |
cf194819 | 586 | */ |
dd57061c | 587 | |
7d5ebac9 MHS |
588 | switch(Demod.state) { |
589 | case DEMOD_UNSYNCD: | |
51d4f6f1 | 590 | CHECK_FOR_SUBCARRIER(); |
591 | if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected | |
7d5ebac9 | 592 | Demod.state = DEMOD_PHASE_REF_TRAINING; |
51d4f6f1 | 593 | Demod.sumI = ci; |
594 | Demod.sumQ = cq; | |
595 | Demod.posCount = 1; | |
596 | } | |
7d5ebac9 MHS |
597 | break; |
598 | ||
599 | case DEMOD_PHASE_REF_TRAINING: | |
600 | if(Demod.posCount < 8) { | |
51d4f6f1 | 601 | CHECK_FOR_SUBCARRIER(); |
602 | if (v > SUBCARRIER_DETECT_THRESHOLD) { | |
603 | // set the reference phase (will code a logic '1') by averaging over 32 1/fs. | |
604 | // note: synchronization time > 80 1/fs | |
605 | Demod.sumI += ci; | |
606 | Demod.sumQ += cq; | |
607 | Demod.posCount++; | |
608 | } else { // subcarrier lost | |
609 | Demod.state = DEMOD_UNSYNCD; | |
7d5ebac9 | 610 | } |
51d4f6f1 | 611 | } else { |
612 | Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF; | |
7d5ebac9 | 613 | } |
7d5ebac9 MHS |
614 | break; |
615 | ||
616 | case DEMOD_AWAITING_FALLING_EDGE_OF_SOF: | |
617 | MAKE_SOFT_DECISION(); | |
51d4f6f1 | 618 | if(v < 0) { // logic '0' detected |
7d5ebac9 | 619 | Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF; |
51d4f6f1 | 620 | Demod.posCount = 0; // start of SOF sequence |
7d5ebac9 | 621 | } else { |
51d4f6f1 | 622 | if(Demod.posCount > 200/4) { // maximum length of TR1 = 200 1/fs |
7d5ebac9 MHS |
623 | Demod.state = DEMOD_UNSYNCD; |
624 | } | |
625 | } | |
626 | Demod.posCount++; | |
627 | break; | |
628 | ||
629 | case DEMOD_GOT_FALLING_EDGE_OF_SOF: | |
51d4f6f1 | 630 | Demod.posCount++; |
7d5ebac9 MHS |
631 | MAKE_SOFT_DECISION(); |
632 | if(v > 0) { | |
51d4f6f1 | 633 | if(Demod.posCount < 9*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges |
7d5ebac9 MHS |
634 | Demod.state = DEMOD_UNSYNCD; |
635 | } else { | |
636 | LED_C_ON(); // Got SOF | |
637 | Demod.state = DEMOD_AWAITING_START_BIT; | |
638 | Demod.posCount = 0; | |
639 | Demod.len = 0; | |
51d4f6f1 | 640 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. |
7d5ebac9 MHS |
641 | Demod.metricN = 0; |
642 | Demod.metric = 0; | |
51d4f6f1 | 643 | */ |
7d5ebac9 MHS |
644 | } |
645 | } else { | |
51d4f6f1 | 646 | if(Demod.posCount > 12*2) { // low phase of SOF too long (> 12 etu) |
7d5ebac9 | 647 | Demod.state = DEMOD_UNSYNCD; |
09c66f1f | 648 | LED_C_OFF(); |
7d5ebac9 MHS |
649 | } |
650 | } | |
7d5ebac9 MHS |
651 | break; |
652 | ||
653 | case DEMOD_AWAITING_START_BIT: | |
51d4f6f1 | 654 | Demod.posCount++; |
7d5ebac9 MHS |
655 | MAKE_SOFT_DECISION(); |
656 | if(v > 0) { | |
51d4f6f1 | 657 | if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs |
7d5ebac9 | 658 | Demod.state = DEMOD_UNSYNCD; |
09c66f1f | 659 | LED_C_OFF(); |
7d5ebac9 | 660 | } |
51d4f6f1 | 661 | } else { // start bit detected |
7d5ebac9 | 662 | Demod.bitCount = 0; |
51d4f6f1 | 663 | Demod.posCount = 1; // this was the first half |
7d5ebac9 MHS |
664 | Demod.thisBit = v; |
665 | Demod.shiftReg = 0; | |
666 | Demod.state = DEMOD_RECEIVING_DATA; | |
667 | } | |
668 | break; | |
669 | ||
670 | case DEMOD_RECEIVING_DATA: | |
671 | MAKE_SOFT_DECISION(); | |
51d4f6f1 | 672 | if(Demod.posCount == 0) { // first half of bit |
7d5ebac9 MHS |
673 | Demod.thisBit = v; |
674 | Demod.posCount = 1; | |
51d4f6f1 | 675 | } else { // second half of bit |
7d5ebac9 MHS |
676 | Demod.thisBit += v; |
677 | ||
51d4f6f1 | 678 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. |
7d5ebac9 MHS |
679 | if(Demod.thisBit > 0) { |
680 | Demod.metric += Demod.thisBit; | |
681 | } else { | |
682 | Demod.metric -= Demod.thisBit; | |
683 | } | |
684 | (Demod.metricN)++; | |
dd57061c | 685 | */ |
7d5ebac9 MHS |
686 | |
687 | Demod.shiftReg >>= 1; | |
51d4f6f1 | 688 | if(Demod.thisBit > 0) { // logic '1' |
7d5ebac9 MHS |
689 | Demod.shiftReg |= 0x200; |
690 | } | |
691 | ||
692 | Demod.bitCount++; | |
693 | if(Demod.bitCount == 10) { | |
694 | uint16_t s = Demod.shiftReg; | |
51d4f6f1 | 695 | if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0' |
7d5ebac9 MHS |
696 | uint8_t b = (s >> 1); |
697 | Demod.output[Demod.len] = b; | |
698 | Demod.len++; | |
699 | Demod.state = DEMOD_AWAITING_START_BIT; | |
7d5ebac9 MHS |
700 | } else { |
701 | Demod.state = DEMOD_UNSYNCD; | |
09c66f1f | 702 | LED_C_OFF(); |
703 | if(s == 0x000) { | |
51d4f6f1 | 704 | // This is EOF (start, stop and all data bits == '0' |
09c66f1f | 705 | return TRUE; |
706 | } | |
7d5ebac9 MHS |
707 | } |
708 | } | |
709 | Demod.posCount = 0; | |
710 | } | |
711 | break; | |
712 | ||
713 | default: | |
714 | Demod.state = DEMOD_UNSYNCD; | |
09c66f1f | 715 | LED_C_OFF(); |
7d5ebac9 MHS |
716 | break; |
717 | } | |
718 | ||
7d5ebac9 MHS |
719 | return FALSE; |
720 | } | |
67ac4bf7 | 721 | |
722 | ||
aeadbdb2 MHS |
723 | static void DemodReset() |
724 | { | |
725 | // Clear out the state of the "UART" that receives from the tag. | |
aeadbdb2 MHS |
726 | Demod.len = 0; |
727 | Demod.state = DEMOD_UNSYNCD; | |
51d4f6f1 | 728 | Demod.posCount = 0; |
aeadbdb2 | 729 | memset(Demod.output, 0x00, MAX_FRAME_SIZE); |
7d5ebac9 | 730 | } |
67ac4bf7 | 731 | |
732 | ||
7d5ebac9 MHS |
733 | static void DemodInit(uint8_t *data) |
734 | { | |
735 | Demod.output = data; | |
736 | DemodReset(); | |
aeadbdb2 MHS |
737 | } |
738 | ||
67ac4bf7 | 739 | |
15c4dc5a | 740 | /* |
355c8b4a | 741 | * Demodulate the samples we received from the tag, also log to tracebuffer |
15c4dc5a | 742 | * quiet: set to 'TRUE' to disable debug output |
743 | */ | |
51d4f6f1 | 744 | static void GetSamplesFor14443bDemod(int n, bool quiet) |
15c4dc5a | 745 | { |
7d5ebac9 | 746 | int max = 0; |
51d4f6f1 | 747 | bool gotFrame = FALSE; |
7d5ebac9 MHS |
748 | int lastRxCounter, ci, cq, samples = 0; |
749 | ||
750 | // Allocate memory from BigBuf for some buffers | |
751 | // free all previous allocations first | |
752 | BigBuf_free(); | |
dd57061c | 753 | |
7d5ebac9 MHS |
754 | // The response (tag -> reader) that we're receiving. |
755 | uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE); | |
dd57061c | 756 | |
7d5ebac9 | 757 | // The DMA buffer, used to stream samples from the FPGA |
705bfa10 | 758 | int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); |
15c4dc5a | 759 | |
7d5ebac9 MHS |
760 | // Set up the demodulator for tag -> reader responses. |
761 | DemodInit(receivedResponse); | |
15c4dc5a | 762 | |
7d5ebac9 | 763 | // Setup and start DMA. |
705bfa10 | 764 | FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); |
15c4dc5a | 765 | |
67ac4bf7 | 766 | int8_t *upTo = dmaBuf; |
705bfa10 | 767 | lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; |
15c4dc5a | 768 | |
7d5ebac9 | 769 | // Signal field is ON with the appropriate LED: |
51d4f6f1 | 770 | LED_D_ON(); |
7d5ebac9 | 771 | // And put the FPGA in the appropriate mode |
da586b17 | 772 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); |
15c4dc5a | 773 | |
7d5ebac9 MHS |
774 | for(;;) { |
775 | int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR; | |
776 | if(behindBy > max) max = behindBy; | |
15c4dc5a | 777 | |
705bfa10 | 778 | while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1)) > 2) { |
7d5ebac9 MHS |
779 | ci = upTo[0]; |
780 | cq = upTo[1]; | |
781 | upTo += 2; | |
705bfa10 | 782 | if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { |
0d9a86c7 | 783 | upTo = dmaBuf; |
7d5ebac9 | 784 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo; |
705bfa10 | 785 | AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; |
7d5ebac9 MHS |
786 | } |
787 | lastRxCounter -= 2; | |
788 | if(lastRxCounter <= 0) { | |
705bfa10 | 789 | lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; |
7d5ebac9 | 790 | } |
15c4dc5a | 791 | |
7d5ebac9 | 792 | samples += 2; |
15c4dc5a | 793 | |
51d4f6f1 | 794 | if(Handle14443bSamplesDemod(ci, cq)) { |
795 | gotFrame = TRUE; | |
796 | break; | |
7d5ebac9 MHS |
797 | } |
798 | } | |
15c4dc5a | 799 | |
51d4f6f1 | 800 | if(samples > n || gotFrame) { |
7d5ebac9 MHS |
801 | break; |
802 | } | |
803 | } | |
51d4f6f1 | 804 | |
7d5ebac9 | 805 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; |
51d4f6f1 | 806 | |
807 | if (!quiet) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max, samples, gotFrame, Demod.len, Demod.sumI, Demod.sumQ); | |
355c8b4a MHS |
808 | //Tracing |
809 | if (tracing && Demod.len > 0) { | |
810 | uint8_t parity[MAX_PARITY_SIZE]; | |
0d9a86c7 | 811 | LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE); |
355c8b4a | 812 | } |
15c4dc5a | 813 | } |
814 | ||
67ac4bf7 | 815 | |
15c4dc5a | 816 | //----------------------------------------------------------------------------- |
817 | // Transmit the command (to the tag) that was placed in ToSend[]. | |
818 | //----------------------------------------------------------------------------- | |
51d4f6f1 | 819 | static void TransmitFor14443b(void) |
15c4dc5a | 820 | { |
7d5ebac9 | 821 | int c; |
15c4dc5a | 822 | |
7d5ebac9 | 823 | FpgaSetupSsc(); |
15c4dc5a | 824 | |
7d5ebac9 MHS |
825 | while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
826 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
827 | } | |
15c4dc5a | 828 | |
7d5ebac9 | 829 | // Signal field is ON with the appropriate Red LED |
15c4dc5a | 830 | LED_D_ON(); |
831 | // Signal we are transmitting with the Green LED | |
832 | LED_B_ON(); | |
51d4f6f1 | 833 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); |
7d5ebac9 MHS |
834 | |
835 | for(c = 0; c < 10;) { | |
836 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
837 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
838 | c++; | |
839 | } | |
840 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
841 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
842 | (void)r; | |
843 | } | |
844 | WDT_HIT(); | |
845 | } | |
846 | ||
847 | c = 0; | |
848 | for(;;) { | |
849 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
850 | AT91C_BASE_SSC->SSC_THR = ToSend[c]; | |
851 | c++; | |
852 | if(c >= ToSendMax) { | |
853 | break; | |
854 | } | |
855 | } | |
856 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
857 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
858 | (void)r; | |
859 | } | |
860 | WDT_HIT(); | |
861 | } | |
862 | LED_B_OFF(); // Finished sending | |
15c4dc5a | 863 | } |
864 | ||
67ac4bf7 | 865 | |
15c4dc5a | 866 | //----------------------------------------------------------------------------- |
867 | // Code a layer 2 command (string of octets, including CRC) into ToSend[], | |
51d4f6f1 | 868 | // so that it is ready to transmit to the tag using TransmitFor14443b(). |
15c4dc5a | 869 | //----------------------------------------------------------------------------- |
7cf3ef20 | 870 | static void CodeIso14443bAsReader(const uint8_t *cmd, int len) |
15c4dc5a | 871 | { |
7d5ebac9 MHS |
872 | int i, j; |
873 | uint8_t b; | |
874 | ||
875 | ToSendReset(); | |
876 | ||
877 | // Establish initial reference level | |
878 | for(i = 0; i < 40; i++) { | |
879 | ToSendStuffBit(1); | |
880 | } | |
881 | // Send SOF | |
882 | for(i = 0; i < 10; i++) { | |
883 | ToSendStuffBit(0); | |
884 | } | |
885 | ||
886 | for(i = 0; i < len; i++) { | |
887 | // Stop bits/EGT | |
888 | ToSendStuffBit(1); | |
889 | ToSendStuffBit(1); | |
890 | // Start bit | |
891 | ToSendStuffBit(0); | |
892 | // Data bits | |
893 | b = cmd[i]; | |
894 | for(j = 0; j < 8; j++) { | |
895 | if(b & 1) { | |
896 | ToSendStuffBit(1); | |
897 | } else { | |
898 | ToSendStuffBit(0); | |
899 | } | |
900 | b >>= 1; | |
901 | } | |
902 | } | |
903 | // Send EOF | |
904 | ToSendStuffBit(1); | |
905 | for(i = 0; i < 10; i++) { | |
906 | ToSendStuffBit(0); | |
907 | } | |
908 | for(i = 0; i < 8; i++) { | |
909 | ToSendStuffBit(1); | |
910 | } | |
911 | ||
912 | // And then a little more, to make sure that the last character makes | |
913 | // it out before we switch to rx mode. | |
914 | for(i = 0; i < 24; i++) { | |
915 | ToSendStuffBit(1); | |
916 | } | |
917 | ||
918 | // Convert from last character reference to length | |
919 | ToSendMax++; | |
15c4dc5a | 920 | } |
921 | ||
67ac4bf7 | 922 | |
355c8b4a MHS |
923 | /** |
924 | Convenience function to encode, transmit and trace iso 14443b comms | |
925 | **/ | |
926 | static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len) | |
927 | { | |
928 | CodeIso14443bAsReader(cmd, len); | |
51d4f6f1 | 929 | TransmitFor14443b(); |
355c8b4a MHS |
930 | if (tracing) { |
931 | uint8_t parity[MAX_PARITY_SIZE]; | |
355c8b4a MHS |
932 | LogTrace(cmd,len, 0, 0, parity, TRUE); |
933 | } | |
934 | } | |
935 | ||
4be27083 FM |
936 | /* Sends an APDU to the tag |
937 | * TODO: check CRC and preamble | |
938 | */ | |
939 | int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response) | |
940 | { | |
941 | uint8_t message_frame[message_length + 4]; | |
942 | // PCB | |
943 | message_frame[0] = 0x0A | pcb_blocknum; | |
944 | pcb_blocknum ^= 1; | |
945 | // CID | |
946 | message_frame[1] = 0; | |
947 | // INF | |
948 | memcpy(message_frame + 2, message, message_length); | |
949 | // EDC (CRC) | |
950 | ComputeCrc14443(CRC_14443_B, message_frame, message_length + 2, &message_frame[message_length + 2], &message_frame[message_length + 3]); | |
951 | // send | |
952 | CodeAndTransmit14443bAsReader(message_frame, message_length + 4); | |
953 | // get response | |
954 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT*100, TRUE); | |
955 | if(Demod.len < 3) | |
956 | { | |
957 | return 0; | |
958 | } | |
959 | // TODO: Check CRC | |
960 | // copy response contents | |
961 | if(response != NULL) | |
962 | { | |
963 | memcpy(response, Demod.output, Demod.len); | |
964 | } | |
965 | return Demod.len; | |
966 | } | |
967 | ||
968 | /* Perform the ISO 14443 B Card Selection procedure | |
969 | * Currently does NOT do any collision handling. | |
970 | * It expects 0-1 cards in the device's range. | |
971 | * TODO: Support multiple cards (perform anticollision) | |
972 | * TODO: Verify CRC checksums | |
973 | */ | |
974 | int iso14443b_select_card() | |
975 | { | |
976 | // WUPB command (including CRC) | |
977 | // Note: WUPB wakes up all tags, REQB doesn't wake up tags in HALT state | |
978 | static const uint8_t wupb[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; | |
979 | // ATTRIB command (with space for CRC) | |
980 | uint8_t attrib[] = { 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00}; | |
981 | ||
982 | // first, wake up the tag | |
983 | CodeAndTransmit14443bAsReader(wupb, sizeof(wupb)); | |
984 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
985 | // ATQB too short? | |
986 | if (Demod.len < 14) | |
987 | { | |
988 | return 2; | |
989 | } | |
990 | ||
991 | // select the tag | |
992 | // copy the PUPI to ATTRIB | |
993 | memcpy(attrib + 1, Demod.output + 1, 4); | |
994 | /* copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into | |
995 | ATTRIB (Param 3) */ | |
996 | attrib[7] = Demod.output[10] & 0x0F; | |
997 | ComputeCrc14443(CRC_14443_B, attrib, 9, attrib + 9, attrib + 10); | |
998 | CodeAndTransmit14443bAsReader(attrib, sizeof(attrib)); | |
999 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
1000 | // Answer to ATTRIB too short? | |
1001 | if(Demod.len < 3) | |
1002 | { | |
1003 | return 2; | |
1004 | } | |
1005 | // reset PCB block number | |
1006 | pcb_blocknum = 0; | |
1007 | return 1; | |
1008 | } | |
1009 | ||
1010 | // Set up ISO 14443 Type B communication (similar to iso14443a_setup) | |
1011 | void iso14443b_setup() { | |
1012 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
1013 | // Set up the synchronous serial port | |
1014 | FpgaSetupSsc(); | |
1015 | // connect Demodulated Signal to ADC: | |
1016 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
1017 | ||
1018 | // Signal field is on with the appropriate LED | |
1019 | LED_D_ON(); | |
1020 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); | |
1021 | ||
1022 | // Start the timer | |
1023 | StartCountSspClk(); | |
1024 | ||
1025 | DemodReset(); | |
1026 | UartReset(); | |
1027 | } | |
67ac4bf7 | 1028 | |
15c4dc5a | 1029 | //----------------------------------------------------------------------------- |
51d4f6f1 | 1030 | // Read a SRI512 ISO 14443B tag. |
15c4dc5a | 1031 | // |
1032 | // SRI512 tags are just simple memory tags, here we're looking at making a dump | |
1033 | // of the contents of the memory. No anticollision algorithm is done, we assume | |
1034 | // we have a single tag in the field. | |
1035 | // | |
1036 | // I tried to be systematic and check every answer of the tag, every CRC, etc... | |
1037 | //----------------------------------------------------------------------------- | |
51d4f6f1 | 1038 | void ReadSTMemoryIso14443b(uint32_t dwLast) |
15c4dc5a | 1039 | { |
7d5ebac9 | 1040 | uint8_t i = 0x00; |
15c4dc5a | 1041 | |
7d5ebac9 MHS |
1042 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
1043 | // Make sure that we start from off, since the tags are stateful; | |
1044 | // confusing things will happen if we don't reset them between reads. | |
1045 | LED_D_OFF(); | |
1046 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
1047 | SpinDelay(200); | |
15c4dc5a | 1048 | |
7d5ebac9 MHS |
1049 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
1050 | FpgaSetupSsc(); | |
15c4dc5a | 1051 | |
7d5ebac9 MHS |
1052 | // Now give it time to spin up. |
1053 | // Signal field is on with the appropriate LED | |
1054 | LED_D_ON(); | |
705bfa10 | 1055 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); |
7d5ebac9 | 1056 | SpinDelay(200); |
15c4dc5a | 1057 | |
5f605b8f | 1058 | clear_trace(); |
1059 | set_tracing(TRUE); | |
1060 | ||
7d5ebac9 | 1061 | // First command: wake up the tag using the INITIATE command |
51d4f6f1 | 1062 | uint8_t cmd1[] = {0x06, 0x00, 0x97, 0x5b}; |
355c8b4a | 1063 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); |
51d4f6f1 | 1064 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
15c4dc5a | 1065 | |
7d5ebac9 | 1066 | if (Demod.len == 0) { |
705bfa10 | 1067 | DbpString("No response from tag"); |
1068 | return; | |
7d5ebac9 | 1069 | } else { |
705bfa10 | 1070 | Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x", |
1071 | Demod.output[0], Demod.output[1], Demod.output[2]); | |
7d5ebac9 | 1072 | } |
705bfa10 | 1073 | |
7d5ebac9 MHS |
1074 | // There is a response, SELECT the uid |
1075 | DbpString("Now SELECT tag:"); | |
1076 | cmd1[0] = 0x0E; // 0x0E is SELECT | |
1077 | cmd1[1] = Demod.output[0]; | |
1078 | ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); | |
355c8b4a | 1079 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); |
51d4f6f1 | 1080 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
7d5ebac9 | 1081 | if (Demod.len != 3) { |
51d4f6f1 | 1082 | Dbprintf("Expected 3 bytes from tag, got %d", Demod.len); |
1083 | return; | |
7d5ebac9 MHS |
1084 | } |
1085 | // Check the CRC of the answer: | |
1086 | ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]); | |
1087 | if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) { | |
51d4f6f1 | 1088 | DbpString("CRC Error reading select response."); |
1089 | return; | |
7d5ebac9 MHS |
1090 | } |
1091 | // Check response from the tag: should be the same UID as the command we just sent: | |
1092 | if (cmd1[1] != Demod.output[0]) { | |
132a0217 | 1093 | Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]); |
51d4f6f1 | 1094 | return; |
7d5ebac9 | 1095 | } |
705bfa10 | 1096 | |
7d5ebac9 MHS |
1097 | // Tag is now selected, |
1098 | // First get the tag's UID: | |
1099 | cmd1[0] = 0x0B; | |
1100 | ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]); | |
355c8b4a | 1101 | CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one |
51d4f6f1 | 1102 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
7d5ebac9 | 1103 | if (Demod.len != 10) { |
51d4f6f1 | 1104 | Dbprintf("Expected 10 bytes from tag, got %d", Demod.len); |
1105 | return; | |
7d5ebac9 MHS |
1106 | } |
1107 | // The check the CRC of the answer (use cmd1 as temporary variable): | |
1108 | ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]); | |
51d4f6f1 | 1109 | if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) { |
132a0217 | 1110 | Dbprintf("CRC Error reading block! Expected: %04x got: %04x", |
705bfa10 | 1111 | (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]); |
51d4f6f1 | 1112 | // Do not return;, let's go on... (we should retry, maybe ?) |
7d5ebac9 MHS |
1113 | } |
1114 | Dbprintf("Tag UID (64 bits): %08x %08x", | |
705bfa10 | 1115 | (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4], |
1116 | (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]); | |
15c4dc5a | 1117 | |
7d5ebac9 | 1118 | // Now loop to read all 16 blocks, address from 0 to last block |
132a0217 | 1119 | Dbprintf("Tag memory dump, block 0 to %d", dwLast); |
7d5ebac9 MHS |
1120 | cmd1[0] = 0x08; |
1121 | i = 0x00; | |
1122 | dwLast++; | |
1123 | for (;;) { | |
51d4f6f1 | 1124 | if (i == dwLast) { |
7d5ebac9 MHS |
1125 | DbpString("System area block (0xff):"); |
1126 | i = 0xff; | |
1127 | } | |
1128 | cmd1[1] = i; | |
1129 | ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); | |
355c8b4a | 1130 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); |
51d4f6f1 | 1131 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); |
7d5ebac9 | 1132 | if (Demod.len != 6) { // Check if we got an answer from the tag |
51d4f6f1 | 1133 | DbpString("Expected 6 bytes from tag, got less..."); |
1134 | return; | |
7d5ebac9 MHS |
1135 | } |
1136 | // The check the CRC of the answer (use cmd1 as temporary variable): | |
1137 | ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]); | |
51d4f6f1 | 1138 | if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) { |
132a0217 | 1139 | Dbprintf("CRC Error reading block! Expected: %04x got: %04x", |
705bfa10 | 1140 | (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]); |
51d4f6f1 | 1141 | // Do not return;, let's go on... (we should retry, maybe ?) |
7d5ebac9 MHS |
1142 | } |
1143 | // Now print out the memory location: | |
132a0217 | 1144 | Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i, |
705bfa10 | 1145 | (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], |
1146 | (Demod.output[4]<<8)+Demod.output[5]); | |
7d5ebac9 | 1147 | if (i == 0xff) { |
51d4f6f1 | 1148 | break; |
7d5ebac9 MHS |
1149 | } |
1150 | i++; | |
1151 | } | |
15c4dc5a | 1152 | } |
1153 | ||
1154 | ||
1155 | //============================================================================= | |
1156 | // Finally, the `sniffer' combines elements from both the reader and | |
1157 | // simulated tag, to show both sides of the conversation. | |
1158 | //============================================================================= | |
1159 | ||
1160 | //----------------------------------------------------------------------------- | |
1161 | // Record the sequence of commands sent by the reader to the tag, with | |
1162 | // triggering so that we start recording at the point that the tag is moved | |
1163 | // near the reader. | |
1164 | //----------------------------------------------------------------------------- | |
1165 | /* | |
1166 | * Memory usage for this function, (within BigBuf) | |
5b95953d | 1167 | * Last Received command (reader->tag) - MAX_FRAME_SIZE |
1168 | * Last Received command (tag->reader) - MAX_FRAME_SIZE | |
705bfa10 | 1169 | * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE |
5b95953d | 1170 | * Demodulated samples received - all the rest |
15c4dc5a | 1171 | */ |
51d4f6f1 | 1172 | void RAMFUNC SnoopIso14443b(void) |
15c4dc5a | 1173 | { |
7d5ebac9 MHS |
1174 | // We won't start recording the frames that we acquire until we trigger; |
1175 | // a good trigger condition to get started is probably when we see a | |
1176 | // response from the tag. | |
5b95953d | 1177 | int triggered = TRUE; // TODO: set and evaluate trigger condition |
15c4dc5a | 1178 | |
7d5ebac9 | 1179 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
f71f4deb | 1180 | BigBuf_free(); |
15c4dc5a | 1181 | |
aeadbdb2 MHS |
1182 | clear_trace(); |
1183 | set_tracing(TRUE); | |
1184 | ||
7d5ebac9 | 1185 | // The DMA buffer, used to stream samples from the FPGA |
705bfa10 | 1186 | int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); |
7d5ebac9 | 1187 | int lastRxCounter; |
67ac4bf7 | 1188 | int8_t *upTo; |
7d5ebac9 MHS |
1189 | int ci, cq; |
1190 | int maxBehindBy = 0; | |
1191 | ||
1192 | // Count of samples received so far, so that we can include timing | |
1193 | // information in the trace buffer. | |
1194 | int samples = 0; | |
15c4dc5a | 1195 | |
7d5ebac9 MHS |
1196 | DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); |
1197 | UartInit(BigBuf_malloc(MAX_FRAME_SIZE)); | |
15c4dc5a | 1198 | |
7d5ebac9 MHS |
1199 | // Print some debug information about the buffer sizes |
1200 | Dbprintf("Snooping buffers initialized:"); | |
1201 | Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen()); | |
aeadbdb2 MHS |
1202 | Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE); |
1203 | Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE); | |
705bfa10 | 1204 | Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE); |
e30c654b | 1205 | |
51d4f6f1 | 1206 | // Signal field is off, no reader signal, no tag signal |
1207 | LEDsoff(); | |
aeadbdb2 MHS |
1208 | |
1209 | // And put the FPGA in the appropriate mode | |
da586b17 | 1210 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP); |
7d5ebac9 MHS |
1211 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
1212 | ||
1213 | // Setup for the DMA. | |
1214 | FpgaSetupSsc(); | |
1215 | upTo = dmaBuf; | |
705bfa10 | 1216 | lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; |
1217 | FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); | |
aeadbdb2 | 1218 | uint8_t parity[MAX_PARITY_SIZE]; |
5b95953d | 1219 | |
1220 | bool TagIsActive = FALSE; | |
1221 | bool ReaderIsActive = FALSE; | |
dd57061c | 1222 | |
7d5ebac9 MHS |
1223 | // And now we loop, receiving samples. |
1224 | for(;;) { | |
1225 | int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & | |
705bfa10 | 1226 | (ISO14443B_DMA_BUFFER_SIZE-1); |
7d5ebac9 MHS |
1227 | if(behindBy > maxBehindBy) { |
1228 | maxBehindBy = behindBy; | |
7d5ebac9 | 1229 | } |
51d4f6f1 | 1230 | |
7d5ebac9 MHS |
1231 | if(behindBy < 2) continue; |
1232 | ||
1233 | ci = upTo[0]; | |
1234 | cq = upTo[1]; | |
1235 | upTo += 2; | |
1236 | lastRxCounter -= 2; | |
705bfa10 | 1237 | if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { |
0d9a86c7 | 1238 | upTo = dmaBuf; |
705bfa10 | 1239 | lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; |
0d9a86c7 | 1240 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; |
705bfa10 | 1241 | AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; |
51d4f6f1 | 1242 | WDT_HIT(); |
705bfa10 | 1243 | if(behindBy > (9*ISO14443B_DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not? |
132a0217 | 1244 | Dbprintf("blew circular buffer! behindBy=%d", behindBy); |
51d4f6f1 | 1245 | break; |
1246 | } | |
1247 | if(!tracing) { | |
1248 | DbpString("Reached trace limit"); | |
1249 | break; | |
1250 | } | |
1251 | if(BUTTON_PRESS()) { | |
1252 | DbpString("cancelled"); | |
1253 | break; | |
1254 | } | |
7d5ebac9 | 1255 | } |
15c4dc5a | 1256 | |
7d5ebac9 | 1257 | samples += 2; |
15c4dc5a | 1258 | |
5b95953d | 1259 | if (!TagIsActive) { // no need to try decoding reader data if the tag is sending |
51d4f6f1 | 1260 | if(Handle14443bUartBit(ci & 0x01)) { |
5b95953d | 1261 | if(triggered && tracing) { |
51d4f6f1 | 1262 | LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); |
5b95953d | 1263 | } |
5b95953d | 1264 | /* And ready to receive another command. */ |
1265 | UartReset(); | |
1266 | /* And also reset the demod code, which might have been */ | |
1267 | /* false-triggered by the commands from the reader. */ | |
1268 | DemodReset(); | |
aeadbdb2 | 1269 | } |
51d4f6f1 | 1270 | if(Handle14443bUartBit(cq & 0x01)) { |
5b95953d | 1271 | if(triggered && tracing) { |
51d4f6f1 | 1272 | LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); |
5b95953d | 1273 | } |
5b95953d | 1274 | /* And ready to receive another command. */ |
1275 | UartReset(); | |
1276 | /* And also reset the demod code, which might have been */ | |
1277 | /* false-triggered by the commands from the reader. */ | |
1278 | DemodReset(); | |
1279 | } | |
46734099 | 1280 | ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF); |
aeadbdb2 | 1281 | } |
15c4dc5a | 1282 | |
5b95953d | 1283 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time |
46734099 | 1284 | if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) { |
15c4dc5a | 1285 | |
5b95953d | 1286 | //Use samples as a time measurement |
1287 | if(tracing) | |
1288 | { | |
1289 | uint8_t parity[MAX_PARITY_SIZE]; | |
09c66f1f | 1290 | LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE); |
5b95953d | 1291 | } |
1292 | triggered = TRUE; | |
15c4dc5a | 1293 | |
5b95953d | 1294 | // And ready to receive another response. |
1295 | DemodReset(); | |
1296 | } | |
d5875804 | 1297 | TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF); |
aeadbdb2 | 1298 | } |
15c4dc5a | 1299 | |
7d5ebac9 | 1300 | } |
51d4f6f1 | 1301 | |
aeadbdb2 | 1302 | FpgaDisableSscDma(); |
51d4f6f1 | 1303 | LEDsoff(); |
aeadbdb2 | 1304 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; |
15c4dc5a | 1305 | DbpString("Snoop statistics:"); |
355c8b4a | 1306 | Dbprintf(" Max behind by: %i", maxBehindBy); |
15c4dc5a | 1307 | Dbprintf(" Uart State: %x", Uart.state); |
1308 | Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt); | |
1309 | Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax); | |
3000dc4e | 1310 | Dbprintf(" Trace length: %i", BigBuf_get_traceLen()); |
15c4dc5a | 1311 | } |
7cf3ef20 | 1312 | |
67ac4bf7 | 1313 | |
7cf3ef20 | 1314 | /* |
1315 | * Send raw command to tag ISO14443B | |
1316 | * @Input | |
1317 | * datalen len of buffer data | |
1318 | * recv bool when true wait for data from tag and send to client | |
1319 | * powerfield bool leave the field on when true | |
1320 | * data buffer with byte to send | |
1321 | * | |
1322 | * @Output | |
1323 | * none | |
1324 | * | |
1325 | */ | |
67ac4bf7 | 1326 | void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[]) |
7cf3ef20 | 1327 | { |
7d5ebac9 | 1328 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
51d4f6f1 | 1329 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
1330 | FpgaSetupSsc(); | |
5f605b8f | 1331 | |
9d84e689 | 1332 | if (datalen){ |
1333 | set_tracing(TRUE); | |
1334 | ||
1335 | CodeAndTransmit14443bAsReader(data, datalen); | |
1336 | ||
1337 | if(recv) { | |
1338 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
1339 | uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE); | |
1340 | cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen); | |
1341 | } | |
dd57061c | 1342 | } |
355c8b4a | 1343 | |
51d4f6f1 | 1344 | if(!powerfield) { |
7d5ebac9 MHS |
1345 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1346 | LED_D_OFF(); | |
1347 | } | |
7cf3ef20 | 1348 | } |
1349 |