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1//-----------------------------------------------------------------------------\r
2// General-purpose miscellany.\r
3//\r
4// Jonathan Westhues, April 2006.\r
5//-----------------------------------------------------------------------------\r
6\r
7module mux8(sel, y, x0, x1, x2, x3, x4, x5, x6, x7);\r
8 input [2:0] sel;\r
9 input x0, x1, x2, x3, x4, x5, x6, x7;\r
10 output y;\r
11 reg y;\r
12\r
13always @(x0 or x1 or x2 or x3 or x4 or x5 or x6 or x7 or sel)\r
14begin\r
15 case (sel)\r
16 3'b000: y = x0;\r
17 3'b001: y = x1;\r
18 3'b010: y = x2;\r
19 3'b011: y = x3;\r
20 3'b100: y = x4;\r
21 3'b101: y = x5;\r
22 3'b110: y = x6;\r
23 3'b111: y = x7;\r
24 endcase\r
25end\r
26\r
27endmodule\r
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