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Commit | Line | Data |
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1 | MEMORY \r | |
2 | {\r | |
3 | /* AT91SAM7S256 has 256k Flash and 64k RAM */\r | |
4 | /* Important note: the correct ORIGIN for bootphase1 is 0x00100000 and for bootphase2 is 0x00100200\r | |
5 | However, this will confuse the currently deployed flash code which expects logical and and not\r | |
6 | physical addresses and performs no sanity checks at all. If confronted with physical addresses, \r | |
7 | it will happily erase everything and brick the device. So for the time being pretend these addresses\r | |
8 | to start at 0x0 while updating all the flash code with proper sanity checks, then come back later and\r | |
9 | fix the addresses. -- Henryk Plötz <henryk@ploetzli.ch> 2009-08-27 */\r | |
10 | bootphase1 : ORIGIN = 0x00000000, LENGTH = 0x200 /* Phase 1 bootloader: Copies real bootloader to RAM */\r | |
11 | bootphase2 : ORIGIN = 0x00000200, LENGTH = 0x2000 - 0x200 /* Main bootloader code, stored in Flash, executed from RAM */\r | |
12 | ram : ORIGIN = 0x00200000, LENGTH = 32K\r | |
13 | }\r | |
14 | \r | |
15 | \r | |
16 | SECTIONS\r | |
17 | {\r | |
18 | . = 0;\r | |
19 | \r | |
20 | bootphase1 : {\r | |
21 | *(.startup) \r | |
22 | *(.bootphase1)\r | |
23 | } >bootphase1\r | |
24 | \r | |
25 | bootphase2 : {\r | |
26 | __bootphase2_start__ = .;\r | |
27 | *(.startphase2)\r | |
28 | *(.text)\r | |
29 | *(.glue_7)\r | |
30 | *(.rodata)\r | |
31 | *(.data)\r | |
32 | . = ALIGN( 32 / 8 );\r | |
33 | __bootphase2_end__ = .;\r | |
34 | } >ram AT>bootphase2\r | |
35 | \r | |
36 | .bss : {\r | |
37 | __bss_start__ = .; \r | |
38 | *(.bss)\r | |
39 | } >ram\r | |
40 | \r | |
41 | . = ALIGN( 32 / 8 );\r | |
42 | __bss_end__ = .;\r | |
43 | }\r |