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1 | //----------------------------------------------------------------------------- | |
2 | // Jonathan Westhues, split Nov 2006 | |
3 | // | |
4 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
5 | // at your option, any later version. See the LICENSE.txt file for the text of | |
6 | // the license. | |
7 | //----------------------------------------------------------------------------- | |
8 | // Routines to support ISO 14443B. This includes both the reader software and | |
9 | // the `fake tag' modes. | |
10 | //----------------------------------------------------------------------------- | |
11 | ||
12 | #include "proxmark3.h" | |
13 | #include "apps.h" | |
14 | #include "util.h" | |
15 | #include "string.h" | |
16 | ||
17 | #include "iso14443crc.h" | |
18 | ||
19 | #define RECEIVE_SAMPLES_TIMEOUT 200000 | |
20 | #define ISO14443B_DMA_BUFFER_SIZE 512 | |
21 | ||
22 | uint8_t PowerOn = TRUE; | |
23 | //============================================================================= | |
24 | // An ISO 14443 Type B tag. We listen for commands from the reader, using | |
25 | // a UART kind of thing that's implemented in software. When we get a | |
26 | // frame (i.e., a group of bytes between SOF and EOF), we check the CRC. | |
27 | // If it's good, then we can do something appropriate with it, and send | |
28 | // a response. | |
29 | //============================================================================= | |
30 | ||
31 | //----------------------------------------------------------------------------- | |
32 | // Code up a string of octets at layer 2 (including CRC, we don't generate | |
33 | // that here) so that they can be transmitted to the reader. Doesn't transmit | |
34 | // them yet, just leaves them ready to send in ToSend[]. | |
35 | //----------------------------------------------------------------------------- | |
36 | static void CodeIso14443bAsTag(const uint8_t *cmd, int len) | |
37 | { | |
38 | int i; | |
39 | ||
40 | ToSendReset(); | |
41 | ||
42 | // Transmit a burst of ones, as the initial thing that lets the | |
43 | // reader get phase sync. This (TR1) must be > 80/fs, per spec, | |
44 | // but tag that I've tried (a Paypass) exceeds that by a fair bit, | |
45 | // so I will too. | |
46 | for(i = 0; i < 20; i++) { | |
47 | ToSendStuffBit(1); | |
48 | ToSendStuffBit(1); | |
49 | ToSendStuffBit(1); | |
50 | ToSendStuffBit(1); | |
51 | } | |
52 | ||
53 | // Send SOF. | |
54 | for(i = 0; i < 10; i++) { | |
55 | ToSendStuffBit(0); | |
56 | ToSendStuffBit(0); | |
57 | ToSendStuffBit(0); | |
58 | ToSendStuffBit(0); | |
59 | } | |
60 | for(i = 0; i < 2; i++) { | |
61 | ToSendStuffBit(1); | |
62 | ToSendStuffBit(1); | |
63 | ToSendStuffBit(1); | |
64 | ToSendStuffBit(1); | |
65 | } | |
66 | ||
67 | for(i = 0; i < len; i++) { | |
68 | int j; | |
69 | uint8_t b = cmd[i]; | |
70 | ||
71 | // Start bit | |
72 | ToSendStuffBit(0); | |
73 | ToSendStuffBit(0); | |
74 | ToSendStuffBit(0); | |
75 | ToSendStuffBit(0); | |
76 | ||
77 | // Data bits | |
78 | for(j = 0; j < 8; j++) { | |
79 | if(b & 1) { | |
80 | ToSendStuffBit(1); | |
81 | ToSendStuffBit(1); | |
82 | ToSendStuffBit(1); | |
83 | ToSendStuffBit(1); | |
84 | } else { | |
85 | ToSendStuffBit(0); | |
86 | ToSendStuffBit(0); | |
87 | ToSendStuffBit(0); | |
88 | ToSendStuffBit(0); | |
89 | } | |
90 | b >>= 1; | |
91 | } | |
92 | ||
93 | // Stop bit | |
94 | ToSendStuffBit(1); | |
95 | ToSendStuffBit(1); | |
96 | ToSendStuffBit(1); | |
97 | ToSendStuffBit(1); | |
98 | } | |
99 | ||
100 | // Send EOF. | |
101 | for(i = 0; i < 10; i++) { | |
102 | ToSendStuffBit(0); | |
103 | ToSendStuffBit(0); | |
104 | ToSendStuffBit(0); | |
105 | ToSendStuffBit(0); | |
106 | } | |
107 | for(i = 0; i < 2; i++) { | |
108 | ToSendStuffBit(1); | |
109 | ToSendStuffBit(1); | |
110 | ToSendStuffBit(1); | |
111 | ToSendStuffBit(1); | |
112 | } | |
113 | ||
114 | // Convert from last byte pos to length | |
115 | ToSendMax++; | |
116 | } | |
117 | ||
118 | //----------------------------------------------------------------------------- | |
119 | // The software UART that receives commands from the reader, and its state | |
120 | // variables. | |
121 | //----------------------------------------------------------------------------- | |
122 | static struct { | |
123 | enum { | |
124 | STATE_UNSYNCD, | |
125 | STATE_GOT_FALLING_EDGE_OF_SOF, | |
126 | STATE_AWAITING_START_BIT, | |
127 | STATE_RECEIVING_DATA | |
128 | } state; | |
129 | uint16_t shiftReg; | |
130 | int bitCnt; | |
131 | int byteCnt; | |
132 | int byteCntMax; | |
133 | int posCnt; | |
134 | uint8_t *output; | |
135 | } Uart; | |
136 | ||
137 | /* Receive & handle a bit coming from the reader. | |
138 | * | |
139 | * This function is called 4 times per bit (every 2 subcarrier cycles). | |
140 | * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us | |
141 | * | |
142 | * LED handling: | |
143 | * LED A -> ON once we have received the SOF and are expecting the rest. | |
144 | * LED A -> OFF once we have received EOF or are in error state or unsynced | |
145 | * | |
146 | * Returns: true if we received a EOF | |
147 | * false if we are still waiting for some more | |
148 | */ | |
149 | static RAMFUNC int Handle14443bUartBit(uint8_t bit) | |
150 | { | |
151 | switch(Uart.state) { | |
152 | case STATE_UNSYNCD: | |
153 | if(!bit) { | |
154 | // we went low, so this could be the beginning | |
155 | // of an SOF | |
156 | Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF; | |
157 | Uart.posCnt = 0; | |
158 | Uart.bitCnt = 0; | |
159 | } | |
160 | break; | |
161 | ||
162 | case STATE_GOT_FALLING_EDGE_OF_SOF: | |
163 | Uart.posCnt++; | |
164 | if(Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit | |
165 | if(bit) { | |
166 | if(Uart.bitCnt > 9) { | |
167 | // we've seen enough consecutive | |
168 | // zeros that it's a valid SOF | |
169 | Uart.posCnt = 0; | |
170 | Uart.byteCnt = 0; | |
171 | Uart.state = STATE_AWAITING_START_BIT; | |
172 | LED_A_ON(); // Indicate we got a valid SOF | |
173 | } else { | |
174 | // didn't stay down long enough | |
175 | // before going high, error | |
176 | Uart.state = STATE_UNSYNCD; | |
177 | } | |
178 | } else { | |
179 | // do nothing, keep waiting | |
180 | } | |
181 | Uart.bitCnt++; | |
182 | } | |
183 | if(Uart.posCnt >= 4) Uart.posCnt = 0; | |
184 | if(Uart.bitCnt > 12) { | |
185 | // Give up if we see too many zeros without | |
186 | // a one, too. | |
187 | LED_A_OFF(); | |
188 | Uart.state = STATE_UNSYNCD; | |
189 | } | |
190 | break; | |
191 | ||
192 | case STATE_AWAITING_START_BIT: | |
193 | Uart.posCnt++; | |
194 | if(bit) { | |
195 | if(Uart.posCnt > 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs | |
196 | // stayed high for too long between | |
197 | // characters, error | |
198 | Uart.state = STATE_UNSYNCD; | |
199 | } | |
200 | } else { | |
201 | // falling edge, this starts the data byte | |
202 | Uart.posCnt = 0; | |
203 | Uart.bitCnt = 0; | |
204 | Uart.shiftReg = 0; | |
205 | Uart.state = STATE_RECEIVING_DATA; | |
206 | } | |
207 | break; | |
208 | ||
209 | case STATE_RECEIVING_DATA: | |
210 | Uart.posCnt++; | |
211 | if(Uart.posCnt == 2) { | |
212 | // time to sample a bit | |
213 | Uart.shiftReg >>= 1; | |
214 | if(bit) { | |
215 | Uart.shiftReg |= 0x200; | |
216 | } | |
217 | Uart.bitCnt++; | |
218 | } | |
219 | if(Uart.posCnt >= 4) { | |
220 | Uart.posCnt = 0; | |
221 | } | |
222 | if(Uart.bitCnt == 10) { | |
223 | if((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001)) | |
224 | { | |
225 | // this is a data byte, with correct | |
226 | // start and stop bits | |
227 | Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff; | |
228 | Uart.byteCnt++; | |
229 | ||
230 | if(Uart.byteCnt >= Uart.byteCntMax) { | |
231 | // Buffer overflowed, give up | |
232 | LED_A_OFF(); | |
233 | Uart.state = STATE_UNSYNCD; | |
234 | } else { | |
235 | // so get the next byte now | |
236 | Uart.posCnt = 0; | |
237 | Uart.state = STATE_AWAITING_START_BIT; | |
238 | } | |
239 | } else if (Uart.shiftReg == 0x000) { | |
240 | // this is an EOF byte | |
241 | LED_A_OFF(); // Finished receiving | |
242 | Uart.state = STATE_UNSYNCD; | |
243 | if (Uart.byteCnt != 0) { | |
244 | return TRUE; | |
245 | } | |
246 | } else { | |
247 | // this is an error | |
248 | LED_A_OFF(); | |
249 | Uart.state = STATE_UNSYNCD; | |
250 | } | |
251 | } | |
252 | break; | |
253 | ||
254 | default: | |
255 | LED_A_OFF(); | |
256 | Uart.state = STATE_UNSYNCD; | |
257 | break; | |
258 | } | |
259 | ||
260 | return FALSE; | |
261 | } | |
262 | ||
263 | ||
264 | static void UartReset() | |
265 | { | |
266 | Uart.byteCntMax = MAX_FRAME_SIZE; | |
267 | Uart.state = STATE_UNSYNCD; | |
268 | Uart.byteCnt = 0; | |
269 | Uart.bitCnt = 0; | |
270 | memset(Uart.output, 0x00, MAX_FRAME_SIZE); | |
271 | } | |
272 | ||
273 | ||
274 | static void UartInit(uint8_t *data) | |
275 | { | |
276 | Uart.output = data; | |
277 | UartReset(); | |
278 | } | |
279 | ||
280 | ||
281 | //----------------------------------------------------------------------------- | |
282 | // Receive a command (from the reader to us, where we are the simulated tag), | |
283 | // and store it in the given buffer, up to the given maximum length. Keeps | |
284 | // spinning, waiting for a well-framed command, until either we get one | |
285 | // (returns TRUE) or someone presses the pushbutton on the board (FALSE). | |
286 | // | |
287 | // Assume that we're called with the SSC (to the FPGA) and ADC path set | |
288 | // correctly. | |
289 | //----------------------------------------------------------------------------- | |
290 | static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) | |
291 | { | |
292 | // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen | |
293 | // only, since we are receiving, not transmitting). | |
294 | // Signal field is off with the appropriate LED | |
295 | LED_D_OFF(); | |
296 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION); | |
297 | ||
298 | // Now run a `software UART' on the stream of incoming samples. | |
299 | UartInit(received); | |
300 | ||
301 | for(;;) { | |
302 | WDT_HIT(); | |
303 | ||
304 | if(BUTTON_PRESS()) return FALSE; | |
305 | ||
306 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
307 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
308 | for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) { | |
309 | if(Handle14443bUartBit(b & mask)) { | |
310 | *len = Uart.byteCnt; | |
311 | return TRUE; | |
312 | } | |
313 | } | |
314 | } | |
315 | } | |
316 | ||
317 | return FALSE; | |
318 | } | |
319 | ||
320 | //----------------------------------------------------------------------------- | |
321 | // Main loop of simulated tag: receive commands from reader, decide what | |
322 | // response to send, and send it. | |
323 | //----------------------------------------------------------------------------- | |
324 | void SimulateIso14443bTag(void) | |
325 | { | |
326 | // the only commands we understand is WUPB, AFI=0, Select All, N=1: | |
327 | static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB | |
328 | // ... and REQB, AFI=0, Normal Request, N=1: | |
329 | static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB | |
330 | // ... and HLTB | |
331 | static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB | |
332 | // ... and ATTRIB | |
333 | static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB | |
334 | ||
335 | // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922, | |
336 | // supports only 106kBit/s in both directions, max frame size = 32Bytes, | |
337 | // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported: | |
338 | static const uint8_t response1[] = { | |
339 | 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22, | |
340 | 0x00, 0x21, 0x85, 0x5e, 0xd7 | |
341 | }; | |
342 | // response to HLTB and ATTRIB | |
343 | static const uint8_t response2[] = {0x00, 0x78, 0xF0}; | |
344 | ||
345 | uint8_t parity[MAX_PARITY_SIZE]; | |
346 | ||
347 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
348 | ||
349 | clear_trace(); | |
350 | set_tracing(TRUE); | |
351 | ||
352 | const uint8_t *resp; | |
353 | uint8_t *respCode; | |
354 | uint16_t respLen, respCodeLen; | |
355 | ||
356 | // allocate command receive buffer | |
357 | BigBuf_free(); | |
358 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); | |
359 | ||
360 | uint16_t len; | |
361 | uint16_t cmdsRecvd = 0; | |
362 | ||
363 | // prepare the (only one) tag answer: | |
364 | CodeIso14443bAsTag(response1, sizeof(response1)); | |
365 | uint8_t *resp1Code = BigBuf_malloc(ToSendMax); | |
366 | memcpy(resp1Code, ToSend, ToSendMax); | |
367 | uint16_t resp1CodeLen = ToSendMax; | |
368 | ||
369 | // prepare the (other) tag answer: | |
370 | CodeIso14443bAsTag(response2, sizeof(response2)); | |
371 | uint8_t *resp2Code = BigBuf_malloc(ToSendMax); | |
372 | memcpy(resp2Code, ToSend, ToSendMax); | |
373 | uint16_t resp2CodeLen = ToSendMax; | |
374 | ||
375 | // We need to listen to the high-frequency, peak-detected path. | |
376 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
377 | FpgaSetupSsc(); | |
378 | ||
379 | cmdsRecvd = 0; | |
380 | ||
381 | for(;;) { | |
382 | ||
383 | if(!GetIso14443bCommandFromReader(receivedCmd, &len)) { | |
384 | Dbprintf("button pressed, received %d commands", cmdsRecvd); | |
385 | break; | |
386 | } | |
387 | ||
388 | if (tracing) { | |
389 | LogTrace(receivedCmd, len, 0, 0, parity, TRUE); | |
390 | } | |
391 | ||
392 | // Good, look at the command now. | |
393 | if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0) | |
394 | || (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) { | |
395 | resp = response1; | |
396 | respLen = sizeof(response1); | |
397 | respCode = resp1Code; | |
398 | respCodeLen = resp1CodeLen; | |
399 | } else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0]) | |
400 | || (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) { | |
401 | resp = response2; | |
402 | respLen = sizeof(response2); | |
403 | respCode = resp2Code; | |
404 | respCodeLen = resp2CodeLen; | |
405 | } else { | |
406 | Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd); | |
407 | // And print whether the CRC fails, just for good measure | |
408 | uint8_t b1, b2; | |
409 | if (len >= 3){ // if crc exists | |
410 | ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2); | |
411 | if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) { | |
412 | // Not so good, try again. | |
413 | DbpString("+++CRC fail"); | |
414 | ||
415 | } else { | |
416 | DbpString("CRC passes"); | |
417 | } | |
418 | } | |
419 | //get rid of compiler warning | |
420 | respCodeLen = 0; | |
421 | resp = response1; | |
422 | respLen = 0; | |
423 | respCode = resp1Code; | |
424 | //don't crash at new command just wait and see if reader will send other new cmds. | |
425 | //break; | |
426 | } | |
427 | ||
428 | cmdsRecvd++; | |
429 | ||
430 | if(cmdsRecvd > 0x30) { | |
431 | DbpString("many commands later..."); | |
432 | break; | |
433 | } | |
434 | ||
435 | if(respCodeLen <= 0) continue; | |
436 | ||
437 | // Modulate BPSK | |
438 | // Signal field is off with the appropriate LED | |
439 | LED_D_OFF(); | |
440 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK); | |
441 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
442 | FpgaSetupSsc(); | |
443 | ||
444 | uint8_t c; | |
445 | // clear receiving shift register and holding register | |
446 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
447 | c = AT91C_BASE_SSC->SSC_RHR; (void) c; | |
448 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
449 | c = AT91C_BASE_SSC->SSC_RHR; (void) c; | |
450 | ||
451 | // Clear TXRDY: | |
452 | AT91C_BASE_SSC->SSC_THR = 0x00; | |
453 | ||
454 | // Transmit the response. | |
455 | uint16_t FpgaSendQueueDelay = 0; | |
456 | uint16_t i = 0; | |
457 | for(;i < respCodeLen; ) { | |
458 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
459 | AT91C_BASE_SSC->SSC_THR = respCode[i++]; | |
460 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
461 | } | |
462 | if(BUTTON_PRESS()) break; | |
463 | } | |
464 | ||
465 | // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: | |
466 | uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; | |
467 | for (i = 0; i <= fpga_queued_bits/8 + 1; ) { | |
468 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
469 | AT91C_BASE_SSC->SSC_THR = 0x00; | |
470 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
471 | i++; | |
472 | } | |
473 | } | |
474 | ||
475 | // trace the response: | |
476 | if (tracing) LogTrace(resp, respLen, 0, 0, parity, FALSE); | |
477 | } | |
478 | FpgaDisableSscDma(); | |
479 | } | |
480 | ||
481 | //============================================================================= | |
482 | // An ISO 14443 Type B reader. We take layer two commands, code them | |
483 | // appropriately, and then send them to the tag. We then listen for the | |
484 | // tag's response, which we leave in the buffer to be demodulated on the | |
485 | // PC side. | |
486 | //============================================================================= | |
487 | ||
488 | static struct { | |
489 | enum { | |
490 | DEMOD_UNSYNCD, | |
491 | DEMOD_PHASE_REF_TRAINING, | |
492 | DEMOD_AWAITING_FALLING_EDGE_OF_SOF, | |
493 | DEMOD_GOT_FALLING_EDGE_OF_SOF, | |
494 | DEMOD_AWAITING_START_BIT, | |
495 | DEMOD_RECEIVING_DATA | |
496 | } state; | |
497 | int bitCount; | |
498 | int posCount; | |
499 | int thisBit; | |
500 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. | |
501 | int metric; | |
502 | int metricN; | |
503 | */ | |
504 | uint16_t shiftReg; | |
505 | uint8_t *output; | |
506 | int len; | |
507 | int sumI; | |
508 | int sumQ; | |
509 | } Demod; | |
510 | ||
511 | /* | |
512 | * Handles reception of a bit from the tag | |
513 | * | |
514 | * This function is called 2 times per bit (every 4 subcarrier cycles). | |
515 | * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us | |
516 | * | |
517 | * LED handling: | |
518 | * LED C -> ON once we have received the SOF and are expecting the rest. | |
519 | * LED C -> OFF once we have received EOF or are unsynced | |
520 | * | |
521 | * Returns: true if we received a EOF | |
522 | * false if we are still waiting for some more | |
523 | * | |
524 | */ | |
525 | static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) | |
526 | { | |
527 | int v; | |
528 | ||
529 | // The soft decision on the bit uses an estimate of just the | |
530 | // quadrant of the reference angle, not the exact angle. | |
531 | #define MAKE_SOFT_DECISION() { \ | |
532 | if(Demod.sumI > 0) { \ | |
533 | v = ci; \ | |
534 | } else { \ | |
535 | v = -ci; \ | |
536 | } \ | |
537 | if(Demod.sumQ > 0) { \ | |
538 | v += cq; \ | |
539 | } else { \ | |
540 | v -= cq; \ | |
541 | } \ | |
542 | } | |
543 | ||
544 | #define SUBCARRIER_DETECT_THRESHOLD 8 | |
545 | ||
546 | // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq) | |
547 | /* #define CHECK_FOR_SUBCARRIER() { \ | |
548 | v = ci; \ | |
549 | if(v < 0) v = -v; \ | |
550 | if(cq > 0) { \ | |
551 | v += cq; \ | |
552 | } else { \ | |
553 | v -= cq; \ | |
554 | } \ | |
555 | } | |
556 | */ | |
557 | // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq))) | |
558 | #define CHECK_FOR_SUBCARRIER() { \ | |
559 | if(ci < 0) { \ | |
560 | if(cq < 0) { /* ci < 0, cq < 0 */ \ | |
561 | if (cq < ci) { \ | |
562 | v = -cq - (ci >> 1); \ | |
563 | } else { \ | |
564 | v = -ci - (cq >> 1); \ | |
565 | } \ | |
566 | } else { /* ci < 0, cq >= 0 */ \ | |
567 | if (cq < -ci) { \ | |
568 | v = -ci + (cq >> 1); \ | |
569 | } else { \ | |
570 | v = cq - (ci >> 1); \ | |
571 | } \ | |
572 | } \ | |
573 | } else { \ | |
574 | if(cq < 0) { /* ci >= 0, cq < 0 */ \ | |
575 | if (-cq < ci) { \ | |
576 | v = ci - (cq >> 1); \ | |
577 | } else { \ | |
578 | v = -cq + (ci >> 1); \ | |
579 | } \ | |
580 | } else { /* ci >= 0, cq >= 0 */ \ | |
581 | if (cq < ci) { \ | |
582 | v = ci + (cq >> 1); \ | |
583 | } else { \ | |
584 | v = cq + (ci >> 1); \ | |
585 | } \ | |
586 | } \ | |
587 | } \ | |
588 | } | |
589 | ||
590 | switch(Demod.state) { | |
591 | case DEMOD_UNSYNCD: | |
592 | CHECK_FOR_SUBCARRIER(); | |
593 | if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected | |
594 | Demod.state = DEMOD_PHASE_REF_TRAINING; | |
595 | Demod.sumI = ci; | |
596 | Demod.sumQ = cq; | |
597 | Demod.posCount = 1; | |
598 | } | |
599 | break; | |
600 | ||
601 | case DEMOD_PHASE_REF_TRAINING: | |
602 | if(Demod.posCount < 10*2) { | |
603 | CHECK_FOR_SUBCARRIER(); | |
604 | if (v > SUBCARRIER_DETECT_THRESHOLD) { | |
605 | // set the reference phase (will code a logic '1') by averaging over 32 1/fs. | |
606 | // note: synchronization time > 80 1/fs | |
607 | Demod.sumI += ci; | |
608 | Demod.sumQ += cq; | |
609 | Demod.posCount++; | |
610 | } else { // subcarrier lost | |
611 | Demod.state = DEMOD_UNSYNCD; | |
612 | } | |
613 | } else { | |
614 | Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF; | |
615 | } | |
616 | break; | |
617 | ||
618 | case DEMOD_AWAITING_FALLING_EDGE_OF_SOF: | |
619 | MAKE_SOFT_DECISION(); | |
620 | if(v < 0) { // logic '0' detected | |
621 | Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF; | |
622 | Demod.posCount = 0; // start of SOF sequence | |
623 | } else { | |
624 | //if(Demod.posCount > 200/4) { // maximum length of TR1 = 200 1/fs | |
625 | if(Demod.posCount > 25*2) { // maximum length of TR1 = 200 1/fs | |
626 | Demod.state = DEMOD_UNSYNCD; | |
627 | } | |
628 | } | |
629 | Demod.posCount++; | |
630 | break; | |
631 | ||
632 | case DEMOD_GOT_FALLING_EDGE_OF_SOF: | |
633 | Demod.posCount++; | |
634 | MAKE_SOFT_DECISION(); | |
635 | if(v > 0) { | |
636 | if(Demod.posCount < 10*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges | |
637 | Demod.state = DEMOD_UNSYNCD; | |
638 | } else { | |
639 | Demod.state = DEMOD_AWAITING_START_BIT; | |
640 | Demod.posCount = 0; | |
641 | Demod.len = 0; | |
642 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. | |
643 | Demod.metricN = 0; | |
644 | Demod.metric = 0; | |
645 | */ | |
646 | } | |
647 | } else { | |
648 | if(Demod.posCount > 13*2) { // low phase of SOF too long (> 12 etu) | |
649 | Demod.state = DEMOD_UNSYNCD; | |
650 | LED_C_OFF(); | |
651 | } | |
652 | } | |
653 | break; | |
654 | ||
655 | case DEMOD_AWAITING_START_BIT: | |
656 | Demod.posCount++; | |
657 | MAKE_SOFT_DECISION(); | |
658 | if(v > 0) { | |
659 | if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs | |
660 | Demod.state = DEMOD_UNSYNCD; | |
661 | LED_C_OFF(); | |
662 | } | |
663 | } else { // start bit detected | |
664 | Demod.bitCount = 0; | |
665 | Demod.posCount = 1; // this was the first half | |
666 | Demod.thisBit = v; | |
667 | Demod.shiftReg = 0; | |
668 | Demod.state = DEMOD_RECEIVING_DATA; | |
669 | } | |
670 | break; | |
671 | ||
672 | case DEMOD_RECEIVING_DATA: | |
673 | MAKE_SOFT_DECISION(); | |
674 | if(Demod.posCount == 0) { // first half of bit | |
675 | Demod.thisBit = v; | |
676 | Demod.posCount = 1; | |
677 | } else { // second half of bit | |
678 | Demod.thisBit += v; | |
679 | ||
680 | /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. | |
681 | if(Demod.thisBit > 0) { | |
682 | Demod.metric += Demod.thisBit; | |
683 | } else { | |
684 | Demod.metric -= Demod.thisBit; | |
685 | } | |
686 | (Demod.metricN)++; | |
687 | */ | |
688 | ||
689 | Demod.shiftReg >>= 1; | |
690 | if(Demod.thisBit > 0) { // logic '1' | |
691 | Demod.shiftReg |= 0x200; | |
692 | } | |
693 | ||
694 | Demod.bitCount++; | |
695 | if(Demod.bitCount == 10) { | |
696 | LED_C_ON(); | |
697 | uint16_t s = Demod.shiftReg; | |
698 | if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0' | |
699 | uint8_t b = (s >> 1); | |
700 | Demod.output[Demod.len] = b; | |
701 | Demod.len++; | |
702 | Demod.state = DEMOD_AWAITING_START_BIT; | |
703 | } else { | |
704 | Demod.state = DEMOD_UNSYNCD; | |
705 | LED_C_OFF(); | |
706 | if(s == 0x000) { | |
707 | // This is EOF (start, stop and all data bits == '0' | |
708 | return TRUE; | |
709 | } | |
710 | } | |
711 | } | |
712 | Demod.posCount = 0; | |
713 | } | |
714 | break; | |
715 | ||
716 | default: | |
717 | Demod.state = DEMOD_UNSYNCD; | |
718 | LED_C_OFF(); | |
719 | break; | |
720 | } | |
721 | return FALSE; | |
722 | } | |
723 | ||
724 | ||
725 | static void DemodReset() | |
726 | { | |
727 | // Clear out the state of the "UART" that receives from the tag. | |
728 | Demod.len = 0; | |
729 | Demod.state = DEMOD_UNSYNCD; | |
730 | Demod.posCount = 0; | |
731 | memset(Demod.output, 0x00, MAX_FRAME_SIZE); | |
732 | } | |
733 | ||
734 | ||
735 | static void DemodInit(uint8_t *data) | |
736 | { | |
737 | Demod.output = data; | |
738 | DemodReset(); | |
739 | } | |
740 | ||
741 | ||
742 | /* | |
743 | * Demodulate the samples we received from the tag, also log to tracebuffer | |
744 | * quiet: set to 'TRUE' to disable debug output | |
745 | */ | |
746 | static void GetSamplesFor14443bDemod(int n, bool quiet) | |
747 | { | |
748 | int max = 0; | |
749 | bool gotFrame = FALSE; | |
750 | int lastRxCounter, ci, cq, samples = 0; | |
751 | ||
752 | // Allocate memory from BigBuf for some buffers | |
753 | // free all previous allocations first | |
754 | BigBuf_free(); | |
755 | ||
756 | // And put the FPGA in the appropriate mode | |
757 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); | |
758 | ||
759 | // The response (tag -> reader) that we're receiving. | |
760 | uint8_t *resp = BigBuf_malloc(MAX_FRAME_SIZE); | |
761 | ||
762 | // Set up the demodulator for tag -> reader responses. | |
763 | DemodInit(resp); | |
764 | ||
765 | // The DMA buffer, used to stream samples from the FPGA | |
766 | int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); | |
767 | ||
768 | ||
769 | int8_t *upTo = dmaBuf; | |
770 | lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; | |
771 | ||
772 | // Signal field is ON with the appropriate LED: | |
773 | LED_D_ON(); | |
774 | ||
775 | // Setup and start DMA. | |
776 | FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); | |
777 | ||
778 | ||
779 | for(;;) { | |
780 | int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR; | |
781 | if(behindBy > max) max = behindBy; | |
782 | ||
783 | while(((lastRxCounter-AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1)) > 2) { | |
784 | ci = upTo[0]; | |
785 | cq = upTo[1]; | |
786 | upTo += 2; | |
787 | if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { | |
788 | upTo = dmaBuf; | |
789 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo; | |
790 | AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; | |
791 | } | |
792 | lastRxCounter -= 2; | |
793 | if(lastRxCounter <= 0) { | |
794 | lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; | |
795 | } | |
796 | ||
797 | samples += 2; | |
798 | ||
799 | if(Handle14443bSamplesDemod(ci, cq)) { | |
800 | gotFrame = TRUE; | |
801 | break; | |
802 | } | |
803 | } | |
804 | ||
805 | if(samples > n || gotFrame) { | |
806 | break; | |
807 | } | |
808 | } | |
809 | ||
810 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; | |
811 | ||
812 | if (!quiet) { | |
813 | Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", | |
814 | max, | |
815 | samples, | |
816 | gotFrame, | |
817 | Demod.len, | |
818 | Demod.sumI, | |
819 | Demod.sumQ | |
820 | ); | |
821 | } | |
822 | ||
823 | //Tracing | |
824 | if (tracing && Demod.len > 0) { | |
825 | uint8_t parity[MAX_PARITY_SIZE]; | |
826 | LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE); | |
827 | } | |
828 | } | |
829 | ||
830 | ||
831 | //----------------------------------------------------------------------------- | |
832 | // Transmit the command (to the tag) that was placed in ToSend[]. | |
833 | //----------------------------------------------------------------------------- | |
834 | static void TransmitFor14443b(void) | |
835 | { | |
836 | int c; | |
837 | ||
838 | FpgaSetupSsc(); | |
839 | ||
840 | while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
841 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
842 | } | |
843 | ||
844 | // Signal field is ON with the appropriate Red LED | |
845 | LED_D_ON(); | |
846 | // Signal we are transmitting with the Green LED | |
847 | LED_B_ON(); | |
848 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); | |
849 | if ( !PowerOn ) | |
850 | SpinDelay(200); | |
851 | ||
852 | for(c = 0; c < 10;) { | |
853 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
854 | AT91C_BASE_SSC->SSC_THR = 0xff; | |
855 | c++; | |
856 | } | |
857 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
858 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
859 | (void)r; | |
860 | } | |
861 | WDT_HIT(); | |
862 | } | |
863 | ||
864 | c = 0; | |
865 | for(;;) { | |
866 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
867 | AT91C_BASE_SSC->SSC_THR = ToSend[c]; | |
868 | c++; | |
869 | if(c >= ToSendMax) { | |
870 | break; | |
871 | } | |
872 | } | |
873 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { | |
874 | volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; | |
875 | (void)r; | |
876 | } | |
877 | WDT_HIT(); | |
878 | } | |
879 | LED_B_OFF(); // Finished sending | |
880 | } | |
881 | ||
882 | ||
883 | //----------------------------------------------------------------------------- | |
884 | // Code a layer 2 command (string of octets, including CRC) into ToSend[], | |
885 | // so that it is ready to transmit to the tag using TransmitFor14443b(). | |
886 | //----------------------------------------------------------------------------- | |
887 | static void CodeIso14443bAsReader(const uint8_t *cmd, int len) | |
888 | { | |
889 | int i, j; | |
890 | uint8_t b; | |
891 | ||
892 | ToSendReset(); | |
893 | ||
894 | // Establish initial reference level | |
895 | for(i = 0; i < 80; i++) { | |
896 | ToSendStuffBit(1); | |
897 | } | |
898 | // Send SOF | |
899 | for(i = 0; i < 11; i++) { | |
900 | ToSendStuffBit(0); | |
901 | } | |
902 | ||
903 | for(i = 0; i < len; i++) { | |
904 | // Stop bits/EGT | |
905 | ToSendStuffBit(1); | |
906 | ToSendStuffBit(1); | |
907 | // Start bit | |
908 | ToSendStuffBit(0); | |
909 | // Data bits | |
910 | b = cmd[i]; | |
911 | for(j = 0; j < 8; j++) { | |
912 | if(b & 1) { | |
913 | ToSendStuffBit(1); | |
914 | } else { | |
915 | ToSendStuffBit(0); | |
916 | } | |
917 | b >>= 1; | |
918 | } | |
919 | } | |
920 | // Send EOF | |
921 | ToSendStuffBit(1); | |
922 | for(i = 0; i < 11; i++) { | |
923 | ToSendStuffBit(0); | |
924 | } | |
925 | for(i = 0; i < 8; i++) { | |
926 | ToSendStuffBit(1); | |
927 | } | |
928 | ||
929 | // And then a little more, to make sure that the last character makes | |
930 | // it out before we switch to rx mode. | |
931 | for(i = 0; i < 10; i++) { | |
932 | ToSendStuffBit(1); | |
933 | } | |
934 | ||
935 | // Convert from last character reference to length | |
936 | ToSendMax++; | |
937 | } | |
938 | ||
939 | ||
940 | /** | |
941 | Convenience function to encode, transmit and trace iso 14443b comms | |
942 | **/ | |
943 | static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len) | |
944 | { | |
945 | CodeIso14443bAsReader(cmd, len); | |
946 | TransmitFor14443b(); | |
947 | if (tracing) { | |
948 | uint8_t parity[MAX_PARITY_SIZE]; | |
949 | LogTrace(cmd,len, 0, 0, parity, TRUE); | |
950 | } | |
951 | } | |
952 | ||
953 | ||
954 | //----------------------------------------------------------------------------- | |
955 | // Read a SRI512 ISO 14443B tag. | |
956 | // | |
957 | // SRI512 tags are just simple memory tags, here we're looking at making a dump | |
958 | // of the contents of the memory. No anticollision algorithm is done, we assume | |
959 | // we have a single tag in the field. | |
960 | // | |
961 | // I tried to be systematic and check every answer of the tag, every CRC, etc... | |
962 | //----------------------------------------------------------------------------- | |
963 | void ReadSTMemoryIso14443b(uint32_t dwLast) | |
964 | { | |
965 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
966 | BigBuf_free(); | |
967 | ||
968 | clear_trace(); | |
969 | set_tracing(TRUE); | |
970 | ||
971 | uint8_t i = 0x00; | |
972 | ||
973 | // Make sure that we start from off, since the tags are stateful; | |
974 | // confusing things will happen if we don't reset them between reads. | |
975 | LED_D_OFF(); | |
976 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
977 | SpinDelay(200); | |
978 | ||
979 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
980 | FpgaSetupSsc(); | |
981 | ||
982 | // Now give it time to spin up. | |
983 | // Signal field is on with the appropriate LED | |
984 | LED_D_ON(); | |
985 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); | |
986 | SpinDelay(200); | |
987 | ||
988 | // First command: wake up the tag using the INITIATE command | |
989 | uint8_t cmd1[] = {0x06, 0x00, 0x97, 0x5b}; | |
990 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); | |
991 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
992 | ||
993 | if (Demod.len == 0) { | |
994 | DbpString("No response from tag"); | |
995 | return; | |
996 | } else { | |
997 | Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x", | |
998 | Demod.output[0], Demod.output[1], Demod.output[2]); | |
999 | } | |
1000 | ||
1001 | // There is a response, SELECT the uid | |
1002 | DbpString("Now SELECT tag:"); | |
1003 | cmd1[0] = 0x0E; // 0x0E is SELECT | |
1004 | cmd1[1] = Demod.output[0]; | |
1005 | ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); | |
1006 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); | |
1007 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
1008 | if (Demod.len != 3) { | |
1009 | Dbprintf("Expected 3 bytes from tag, got %d", Demod.len); | |
1010 | return; | |
1011 | } | |
1012 | // Check the CRC of the answer: | |
1013 | ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]); | |
1014 | if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) { | |
1015 | DbpString("CRC Error reading select response."); | |
1016 | return; | |
1017 | } | |
1018 | // Check response from the tag: should be the same UID as the command we just sent: | |
1019 | if (cmd1[1] != Demod.output[0]) { | |
1020 | Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]); | |
1021 | return; | |
1022 | } | |
1023 | ||
1024 | // Tag is now selected, | |
1025 | // First get the tag's UID: | |
1026 | cmd1[0] = 0x0B; | |
1027 | ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]); | |
1028 | CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one | |
1029 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
1030 | if (Demod.len != 10) { | |
1031 | Dbprintf("Expected 10 bytes from tag, got %d", Demod.len); | |
1032 | return; | |
1033 | } | |
1034 | // The check the CRC of the answer (use cmd1 as temporary variable): | |
1035 | ComputeCrc14443(CRC_14443_B, Demod.output, 8, &cmd1[2], &cmd1[3]); | |
1036 | if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) { | |
1037 | Dbprintf("CRC Error reading block! Expected: %04x got: %04x", | |
1038 | (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]); | |
1039 | // Do not return;, let's go on... (we should retry, maybe ?) | |
1040 | } | |
1041 | Dbprintf("Tag UID (64 bits): %08x %08x", | |
1042 | (Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4], | |
1043 | (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]); | |
1044 | ||
1045 | // Now loop to read all 16 blocks, address from 0 to last block | |
1046 | Dbprintf("Tag memory dump, block 0 to %d", dwLast); | |
1047 | cmd1[0] = 0x08; | |
1048 | i = 0x00; | |
1049 | dwLast++; | |
1050 | for (;;) { | |
1051 | if (i == dwLast) { | |
1052 | DbpString("System area block (0xff):"); | |
1053 | i = 0xff; | |
1054 | } | |
1055 | cmd1[1] = i; | |
1056 | ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); | |
1057 | CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); | |
1058 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); | |
1059 | if (Demod.len != 6) { // Check if we got an answer from the tag | |
1060 | DbpString("Expected 6 bytes from tag, got less..."); | |
1061 | return; | |
1062 | } | |
1063 | // The check the CRC of the answer (use cmd1 as temporary variable): | |
1064 | ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]); | |
1065 | if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) { | |
1066 | Dbprintf("CRC Error reading block! Expected: %04x got: %04x", | |
1067 | (cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]); | |
1068 | // Do not return;, let's go on... (we should retry, maybe ?) | |
1069 | } | |
1070 | // Now print out the memory location: | |
1071 | Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i, | |
1072 | (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], | |
1073 | (Demod.output[4]<<8)+Demod.output[5]); | |
1074 | if (i == 0xff) { | |
1075 | break; | |
1076 | } | |
1077 | i++; | |
1078 | } | |
1079 | } | |
1080 | ||
1081 | ||
1082 | //============================================================================= | |
1083 | // Finally, the `sniffer' combines elements from both the reader and | |
1084 | // simulated tag, to show both sides of the conversation. | |
1085 | //============================================================================= | |
1086 | ||
1087 | //----------------------------------------------------------------------------- | |
1088 | // Record the sequence of commands sent by the reader to the tag, with | |
1089 | // triggering so that we start recording at the point that the tag is moved | |
1090 | // near the reader. | |
1091 | //----------------------------------------------------------------------------- | |
1092 | /* | |
1093 | * Memory usage for this function, (within BigBuf) | |
1094 | * Last Received command (reader->tag) - MAX_FRAME_SIZE | |
1095 | * Last Received command (tag->reader) - MAX_FRAME_SIZE | |
1096 | * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE | |
1097 | * Demodulated samples received - all the rest | |
1098 | */ | |
1099 | void RAMFUNC SnoopIso14443b(void) | |
1100 | { | |
1101 | // We won't start recording the frames that we acquire until we trigger; | |
1102 | // a good trigger condition to get started is probably when we see a | |
1103 | // response from the tag. | |
1104 | int triggered = TRUE; // TODO: set and evaluate trigger condition | |
1105 | ||
1106 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
1107 | BigBuf_free(); | |
1108 | ||
1109 | clear_trace(); | |
1110 | set_tracing(TRUE); | |
1111 | ||
1112 | // The DMA buffer, used to stream samples from the FPGA | |
1113 | int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); | |
1114 | int lastRxCounter; | |
1115 | int8_t *upTo; | |
1116 | int ci, cq; | |
1117 | int maxBehindBy = 0; | |
1118 | ||
1119 | // Count of samples received so far, so that we can include timing | |
1120 | // information in the trace buffer. | |
1121 | int samples = 0; | |
1122 | ||
1123 | DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); | |
1124 | UartInit(BigBuf_malloc(MAX_FRAME_SIZE)); | |
1125 | ||
1126 | // Print some debug information about the buffer sizes | |
1127 | Dbprintf("Snooping buffers initialized:"); | |
1128 | Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen()); | |
1129 | Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE); | |
1130 | Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE); | |
1131 | Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE); | |
1132 | ||
1133 | // Signal field is off, no reader signal, no tag signal | |
1134 | LEDsoff(); | |
1135 | ||
1136 | // And put the FPGA in the appropriate mode | |
1137 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP); | |
1138 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
1139 | ||
1140 | // Setup for the DMA. | |
1141 | FpgaSetupSsc(); | |
1142 | upTo = dmaBuf; | |
1143 | lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; | |
1144 | FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); | |
1145 | uint8_t parity[MAX_PARITY_SIZE]; | |
1146 | ||
1147 | bool TagIsActive = FALSE; | |
1148 | bool ReaderIsActive = FALSE; | |
1149 | ||
1150 | // And now we loop, receiving samples. | |
1151 | for(;;) { | |
1152 | int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & | |
1153 | (ISO14443B_DMA_BUFFER_SIZE-1); | |
1154 | if(behindBy > maxBehindBy) { | |
1155 | maxBehindBy = behindBy; | |
1156 | } | |
1157 | ||
1158 | if(behindBy < 2) continue; | |
1159 | ||
1160 | ci = upTo[0]; | |
1161 | cq = upTo[1]; | |
1162 | upTo += 2; | |
1163 | lastRxCounter -= 2; | |
1164 | if(upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { | |
1165 | upTo = dmaBuf; | |
1166 | lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; | |
1167 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
1168 | AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; | |
1169 | WDT_HIT(); | |
1170 | if(behindBy > (9*ISO14443B_DMA_BUFFER_SIZE/10)) { // TODO: understand whether we can increase/decrease as we want or not? | |
1171 | Dbprintf("blew circular buffer! behindBy=%d", behindBy); | |
1172 | break; | |
1173 | } | |
1174 | if(!tracing) { | |
1175 | DbpString("Reached trace limit"); | |
1176 | break; | |
1177 | } | |
1178 | if(BUTTON_PRESS()) { | |
1179 | DbpString("cancelled"); | |
1180 | break; | |
1181 | } | |
1182 | } | |
1183 | ||
1184 | samples += 2; | |
1185 | ||
1186 | if (!TagIsActive) { // no need to try decoding reader data if the tag is sending | |
1187 | if(Handle14443bUartBit(ci & 0x01)) { | |
1188 | if(triggered && tracing) { | |
1189 | LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); | |
1190 | } | |
1191 | /* And ready to receive another command. */ | |
1192 | UartReset(); | |
1193 | /* And also reset the demod code, which might have been */ | |
1194 | /* false-triggered by the commands from the reader. */ | |
1195 | DemodReset(); | |
1196 | } | |
1197 | if(Handle14443bUartBit(cq & 0x01)) { | |
1198 | if(triggered && tracing) { | |
1199 | LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); | |
1200 | } | |
1201 | /* And ready to receive another command. */ | |
1202 | UartReset(); | |
1203 | /* And also reset the demod code, which might have been */ | |
1204 | /* false-triggered by the commands from the reader. */ | |
1205 | DemodReset(); | |
1206 | } | |
1207 | ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF); | |
1208 | } | |
1209 | ||
1210 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time | |
1211 | if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) { | |
1212 | ||
1213 | //Use samples as a time measurement | |
1214 | if(tracing) | |
1215 | { | |
1216 | //uint8_t parity[MAX_PARITY_SIZE]; | |
1217 | LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE); | |
1218 | } | |
1219 | triggered = TRUE; | |
1220 | ||
1221 | // And ready to receive another response. | |
1222 | DemodReset(); | |
1223 | } | |
1224 | TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF); | |
1225 | } | |
1226 | ||
1227 | } | |
1228 | ||
1229 | FpgaDisableSscDma(); | |
1230 | LEDsoff(); | |
1231 | AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; | |
1232 | DbpString("Snoop statistics:"); | |
1233 | Dbprintf(" Max behind by: %i", maxBehindBy); | |
1234 | Dbprintf(" Uart State: %x", Uart.state); | |
1235 | Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt); | |
1236 | Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax); | |
1237 | Dbprintf(" Trace length: %i", BigBuf_get_traceLen()); | |
1238 | } | |
1239 | ||
1240 | ||
1241 | /* | |
1242 | * Send raw command to tag ISO14443B | |
1243 | * @Input | |
1244 | * datalen len of buffer data | |
1245 | * recv bool when true wait for data from tag and send to client | |
1246 | * powerfield bool leave the field on when true | |
1247 | * data buffer with byte to send | |
1248 | * | |
1249 | * @Output | |
1250 | * none | |
1251 | * | |
1252 | */ | |
1253 | void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[]) | |
1254 | { | |
1255 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); | |
1256 | BigBuf_free(); | |
1257 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); | |
1258 | if ( !PowerOn ){ | |
1259 | FpgaSetupSsc(); | |
1260 | } | |
1261 | ||
1262 | if ( datalen == 0 && recv == 0 && powerfield == 0){ | |
1263 | clear_trace(); | |
1264 | } else { | |
1265 | set_tracing(TRUE); | |
1266 | CodeAndTransmit14443bAsReader(data, datalen); | |
1267 | } | |
1268 | ||
1269 | if(recv) { | |
1270 | GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, FALSE); | |
1271 | uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE); | |
1272 | cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen); | |
1273 | } | |
1274 | ||
1275 | if(!powerfield) { | |
1276 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
1277 | FpgaDisableSscDma(); | |
1278 | LED_D_OFF(); | |
1279 | PowerOn = 0; | |
1280 | } | |
1281 | } | |
1282 |